Lines Matching +full:align +full:- +full:end
1 // SPDX-License-Identifier: GPL-2.0
11 * PCI-PCI bridges cleanup, sorted resource allocation.
39 resource_size_t end; member
50 list_del(&dev_res->list); in free_list()
56 * add_to_list() - Add a new resource tracker to the list
71 return -ENOMEM; in add_to_list()
73 tmp->res = res; in add_to_list()
74 tmp->dev = dev; in add_to_list()
75 tmp->start = res->start; in add_to_list()
76 tmp->end = res->end; in add_to_list()
77 tmp->flags = res->flags; in add_to_list()
78 tmp->add_size = add_size; in add_to_list()
79 tmp->min_align = min_align; in add_to_list()
81 list_add(&tmp->list, head); in add_to_list()
91 if (dev_res->res == res) { in remove_from_list()
92 list_del(&dev_res->list); in remove_from_list()
105 if (dev_res->res == res) in res_to_dev_res()
118 return dev_res ? dev_res->add_size : 0; in get_res_add_size()
127 return dev_res ? dev_res->min_align : 0; in get_res_add_align()
142 if (r->flags & IORESOURCE_PCI_FIXED) in pdev_sort_resources()
145 if (!(r->flags) || r->parent) in pdev_sort_resources()
158 tmp->res = r; in pdev_sort_resources()
159 tmp->dev = dev; in pdev_sort_resources()
164 resource_size_t align; in pdev_sort_resources() local
166 align = pci_resource_alignment(dev_res->dev, in pdev_sort_resources()
167 dev_res->res); in pdev_sort_resources()
169 if (r_align > align) { in pdev_sort_resources()
170 n = &dev_res->list; in pdev_sort_resources()
175 list_add_tail(&tmp->list, n); in pdev_sort_resources()
181 u16 class = dev->class >> 8; in __dev_sort_resources()
200 res->start = 0; in reset_resource()
201 res->end = 0; in reset_resource()
202 res->flags = 0; in reset_resource()
206 * reassign_resources_sorted() - Satisfy any additional resource requests
223 resource_size_t add_size, align; in reassign_resources_sorted() local
229 res = add_res->res; in reassign_resources_sorted()
232 if (!res->flags) in reassign_resources_sorted()
237 if (dev_res->res == res) { in reassign_resources_sorted()
245 idx = res - &add_res->dev->resource[0]; in reassign_resources_sorted()
246 res_name = pci_resource_name(add_res->dev, idx); in reassign_resources_sorted()
247 add_size = add_res->add_size; in reassign_resources_sorted()
248 align = add_res->min_align; in reassign_resources_sorted()
250 resource_set_range(res, align, add_size); in reassign_resources_sorted()
251 if (pci_assign_resource(add_res->dev, idx)) in reassign_resources_sorted()
254 res->flags |= add_res->flags & in reassign_resources_sorted()
256 if (pci_reassign_resource(add_res->dev, idx, in reassign_resources_sorted()
257 add_size, align)) in reassign_resources_sorted()
258 pci_info(add_res->dev, "%s %pR: failed to add %llx\n", in reassign_resources_sorted()
263 list_del(&add_res->list); in reassign_resources_sorted()
269 * assign_requested_resources_sorted() - Satisfy resource requests
286 res = dev_res->res; in assign_requested_resources_sorted()
287 idx = res - &dev_res->dev->resource[0]; in assign_requested_resources_sorted()
289 pci_assign_resource(dev_res->dev, idx)) { in assign_requested_resources_sorted()
297 (!(res->flags & IORESOURCE_ROM_ENABLE)))) in assign_requested_resources_sorted()
299 dev_res->dev, res, in assign_requested_resources_sorted()
315 mask |= fail_res->flags; in pci_fail_res_type_mask()
319 * allocate pref in non-pref range. Will release all assigned in pci_fail_res_type_mask()
320 * non-pref sibling resources according to that bit. in pci_fail_res_type_mask()
327 if (res->flags & IORESOURCE_IO) in pci_need_to_release()
331 if (res->flags & IORESOURCE_PREFETCH) { in pci_need_to_release()
334 /* Count pref if its parent is non-pref */ in pci_need_to_release()
336 !(res->parent->flags & IORESOURCE_PREFETCH)) in pci_need_to_release()
342 if (res->flags & IORESOURCE_MEM) in pci_need_to_release()
367 * MMIO. If assigned pref MMIO's parent is non-pref MMIO in __assign_resources_sorted()
368 * and non-pref MMIO assignment fails, will release that in __assign_resources_sorted()
370 * 3. If non-pref MMIO assignment fails or pref MMIO in __assign_resources_sorted()
371 * assignment fails, will release assigned non-pref MMIO. in __assign_resources_sorted()
378 resource_size_t add_align, align; in __assign_resources_sorted() local
384 /* Save original start, end, flags etc at first */ in __assign_resources_sorted()
386 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) { in __assign_resources_sorted()
394 dev_res->res->end += get_res_add_size(realloc_head, in __assign_resources_sorted()
395 dev_res->res); in __assign_resources_sorted()
399 * 1. bridge resource -- IORESOURCE_STARTALIGN in __assign_resources_sorted()
400 * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN in __assign_resources_sorted()
403 if (!(dev_res->res->flags & IORESOURCE_STARTALIGN)) in __assign_resources_sorted()
406 add_align = get_res_add_align(realloc_head, dev_res->res); in __assign_resources_sorted()
415 if (add_align > dev_res->res->start) { in __assign_resources_sorted()
416 resource_size_t r_size = resource_size(dev_res->res); in __assign_resources_sorted()
418 dev_res->res->start = add_align; in __assign_resources_sorted()
419 dev_res->res->end = add_align + r_size - 1; in __assign_resources_sorted()
422 align = pci_resource_alignment(dev_res2->dev, in __assign_resources_sorted()
423 dev_res2->res); in __assign_resources_sorted()
424 if (add_align > align) { in __assign_resources_sorted()
425 list_move_tail(&dev_res->list, in __assign_resources_sorted()
426 &dev_res2->list); in __assign_resources_sorted()
441 remove_from_list(realloc_head, dev_res->res); in __assign_resources_sorted()
451 if (dev_res->res->parent && in __assign_resources_sorted()
452 !pci_need_to_release(fail_type, dev_res->res)) { in __assign_resources_sorted()
454 remove_from_list(realloc_head, dev_res->res); in __assign_resources_sorted()
455 remove_from_list(&save_head, dev_res->res); in __assign_resources_sorted()
456 list_del(&dev_res->list); in __assign_resources_sorted()
463 if (dev_res->res->parent) in __assign_resources_sorted()
464 release_resource(dev_res->res); in __assign_resources_sorted()
465 /* Restore start/end/flags from saved list */ in __assign_resources_sorted()
467 struct resource *res = save_res->res; in __assign_resources_sorted()
469 res->start = save_res->start; in __assign_resources_sorted()
470 res->end = save_res->end; in __assign_resources_sorted()
471 res->flags = save_res->flags; in __assign_resources_sorted()
476 /* Satisfy the must-have resource requests */ in __assign_resources_sorted()
503 list_for_each_entry(dev, &bus->devices, bus_list) in pbus_assign_resources_sorted()
511 struct pci_dev *bridge = bus->self; in pci_setup_cardbus()
516 &bus->busn_res); in pci_setup_cardbus()
518 res = bus->resource[0]; in pci_setup_cardbus()
519 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
520 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
529 region.end); in pci_setup_cardbus()
532 res = bus->resource[1]; in pci_setup_cardbus()
533 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
534 if (res->flags & IORESOURCE_IO) { in pci_setup_cardbus()
539 region.end); in pci_setup_cardbus()
542 res = bus->resource[2]; in pci_setup_cardbus()
543 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
544 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
549 region.end); in pci_setup_cardbus()
552 res = bus->resource[3]; in pci_setup_cardbus()
553 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_cardbus()
554 if (res->flags & IORESOURCE_MEM) { in pci_setup_cardbus()
559 region.end); in pci_setup_cardbus()
565 * Initialize bridges with base/limit values we have collected. PCI-to-PCI
572 * bridges which support 32-bit I/O. This update requires two config space
575 * 64-bit prefetchable MMIO.
588 if (bridge->io_window_1k) in pci_setup_bridge_io()
592 res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_setup_bridge_io()
594 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_io()
595 if (res->flags & IORESOURCE_IO) { in pci_setup_bridge_io()
598 io_limit_lo = (region.end >> 8) & io_mask; in pci_setup_bridge_io()
601 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16); in pci_setup_bridge_io()
624 res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_setup_bridge_mmio()
626 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_mmio()
627 if (res->flags & IORESOURCE_MEM) { in pci_setup_bridge_mmio()
629 l |= region.end & 0xfff00000; in pci_setup_bridge_mmio()
646 * PCI_PREF_BASE_UPPER32 was non-zero, this temporarily disables in pci_setup_bridge_mmio_pref()
653 res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_setup_bridge_mmio_pref()
655 pcibios_resource_to_bus(bridge->bus, ®ion, res); in pci_setup_bridge_mmio_pref()
656 if (res->flags & IORESOURCE_PREFETCH) { in pci_setup_bridge_mmio_pref()
658 l |= region.end & 0xfff00000; in pci_setup_bridge_mmio_pref()
659 if (res->flags & IORESOURCE_MEM_64) { in pci_setup_bridge_mmio_pref()
661 lu = upper_32_bits(region.end); in pci_setup_bridge_mmio_pref()
676 struct pci_dev *bridge = bus->self; in __pci_setup_bridge()
679 &bus->busn_res); in __pci_setup_bridge()
690 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl); in __pci_setup_bridge()
715 if ((bridge->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_claim_bridge_resource()
719 return -EINVAL; /* Clipping didn't change anything */ in pci_claim_bridge_resource()
732 return -EINVAL; in pci_claim_bridge_resource()
738 return -EINVAL; in pci_claim_bridge_resource()
743 * ranges. If not, the respective base/limit registers must be read-only
748 struct pci_dev *bridge = bus->self; in pci_bridge_check_ranges()
751 b_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_check_ranges()
752 b_res->flags |= IORESOURCE_MEM; in pci_bridge_check_ranges()
754 if (bridge->io_window) { in pci_bridge_check_ranges()
755 b_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_check_ranges()
756 b_res->flags |= IORESOURCE_IO; in pci_bridge_check_ranges()
759 if (bridge->pref_window) { in pci_bridge_check_ranges()
760 b_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_check_ranges()
761 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH; in pci_bridge_check_ranges()
762 if (bridge->pref_64_window) { in pci_bridge_check_ranges()
763 b_res->flags |= IORESOURCE_MEM_64 | in pci_bridge_check_ranges()
770 * Helper function for sizing routines. Assigned resources have non-NULL
789 if (r && (r->flags & type_mask) == type && !r->parent) in find_bus_resource_of_type()
791 if (r && (r->flags & type_mask) == type && !r_assigned) in find_bus_resource_of_type()
803 resource_size_t align) in calculate_iosize() argument
820 size = ALIGN(max(size, add_size) + children_add_size, align); in calculate_iosize()
829 resource_size_t align) in calculate_memsize() argument
837 return ALIGN(max(size, old_size), align); in calculate_memsize()
852 resource_size_t align = 1, arch_align; in window_alignment() local
855 align = PCI_P2P_DEFAULT_MEM_ALIGN; in window_alignment()
858 * Per spec, I/O windows are 4K-aligned, but some bridges have in window_alignment()
861 if (bus->self && bus->self->io_window_1k) in window_alignment()
862 align = PCI_P2P_DEFAULT_IO_ALIGN_1K; in window_alignment()
864 align = PCI_P2P_DEFAULT_IO_ALIGN; in window_alignment()
868 return max(align, arch_align); in window_alignment()
872 * pbus_size_io() - Size the I/O window of a given bus
879 * Sizing the I/O windows of the PCI-PCI bridge is trivial, since these
880 * windows have 1K or 4K granularity and the I/O ranges of non-bridge PCI
893 resource_size_t min_align, align; in pbus_size_io() local
899 if (b_res->parent) in pbus_size_io()
903 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_io()
909 if (r->parent || !(r->flags & IORESOURCE_IO)) in pbus_size_io()
914 /* Might be re-aligned for ISA */ in pbus_size_io()
919 align = pci_resource_alignment(dev, r); in pbus_size_io()
920 if (align > min_align) in pbus_size_io()
921 min_align = align; in pbus_size_io()
939 if (bus->self && (b_res->start || b_res->end)) in pbus_size_io()
940 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_io()
941 b_res, &bus->busn_res); in pbus_size_io()
942 b_res->flags = 0; in pbus_size_io()
947 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_io()
948 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_io()
949 add_to_list(realloc_head, bus->self, b_res, size1-size0, in pbus_size_io()
951 pci_info(bus->self, "bridge window %pR to %pR add_size %llx\n", in pbus_size_io()
952 b_res, &bus->busn_res, in pbus_size_io()
953 (unsigned long long) size1 - size0); in pbus_size_io()
960 resource_size_t align = 0; in calculate_mem_align() local
969 if (!align) in calculate_mem_align()
971 else if (ALIGN(align + min_align, min_align) < align1) in calculate_mem_align()
973 align += aligns[order]; in calculate_mem_align()
980 * pbus_upstream_space_available - Check no upstream resource limits allocation
985 * @align: Required alignment for the resource
995 resource_size_t align) in pbus_upstream_space_available() argument
999 .align = align, in pbus_upstream_space_available()
1004 while ((bus = bus->parent)) { in pbus_upstream_space_available()
1009 if (!r || !r->parent || (r->flags & mask) != type) in pbus_upstream_space_available()
1017 pci_dbg(bus->self, in pbus_upstream_space_available()
1019 r, &bus->busn_res, &gap); in pbus_upstream_space_available()
1024 if (bus->self) { in pbus_upstream_space_available()
1025 pci_info(bus->self, in pbus_upstream_space_available()
1027 r, &bus->busn_res, in pbus_upstream_space_available()
1029 pci_name(downstream->self), in pbus_upstream_space_available()
1030 &downstream->busn_res); in pbus_upstream_space_available()
1041 * pbus_size_mem() - Size the memory window of a given bus
1055 * Return -ENOSPC if there's no available bus resource of the desired
1056 * type. Otherwise, set the bus resource start/end to indicate the
1066 resource_size_t min_align, win_align, align, size, size0, size1 = 0; in pbus_size_mem() local
1076 return -ENOSPC; in pbus_size_mem()
1079 if (b_res->parent) in pbus_size_mem()
1086 list_for_each_entry(dev, &bus->devices, bus_list) { in pbus_size_mem()
1094 if (r->parent || (r->flags & IORESOURCE_PCI_FIXED) || in pbus_size_mem()
1095 ((r->flags & mask) != type && in pbus_size_mem()
1096 (r->flags & mask) != type2 && in pbus_size_mem()
1097 (r->flags & mask) != type3)) in pbus_size_mem()
1105 r->end = r->start - 1; in pbus_size_mem()
1117 align = pci_resource_alignment(dev, r); in pbus_size_mem()
1118 order = __ffs(align) - __ffs(SZ_1M); in pbus_size_mem()
1123 r_name, r, (unsigned long long) align); in pbus_size_mem()
1124 r->flags = 0; in pbus_size_mem()
1127 size += max(r_size, align); in pbus_size_mem()
1129 * Exclude ranges with size > align from calculation of in pbus_size_mem()
1132 if (r_size <= align) in pbus_size_mem()
1133 aligns[order] += align; in pbus_size_mem()
1145 win_align = window_alignment(bus, b_res->flags); in pbus_size_mem()
1150 if (bus->self && size0 && in pbus_size_mem()
1156 pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n", in pbus_size_mem()
1157 b_res, &bus->busn_res); in pbus_size_mem()
1165 if (bus->self && size1 && in pbus_size_mem()
1172 pci_info(bus->self, in pbus_size_mem()
1174 b_res, &bus->busn_res); in pbus_size_mem()
1179 if (bus->self && (b_res->start || b_res->end)) in pbus_size_mem()
1180 pci_info(bus->self, "disabling bridge window %pR to %pR (unused)\n", in pbus_size_mem()
1181 b_res, &bus->busn_res); in pbus_size_mem()
1182 b_res->flags = 0; in pbus_size_mem()
1185 b_res->start = min_align; in pbus_size_mem()
1186 b_res->end = size0 + min_align - 1; in pbus_size_mem()
1187 b_res->flags |= IORESOURCE_STARTALIGN; in pbus_size_mem()
1188 if (bus->self && size1 > size0 && realloc_head) { in pbus_size_mem()
1189 add_to_list(realloc_head, bus->self, b_res, size1-size0, add_align); in pbus_size_mem()
1190 pci_info(bus->self, "bridge window %pR to %pR add_size %llx add_align %llx\n", in pbus_size_mem()
1191 b_res, &bus->busn_res, in pbus_size_mem()
1192 (unsigned long long) (size1 - size0), in pbus_size_mem()
1200 if (res->flags & IORESOURCE_IO) in pci_cardbus_resource_alignment()
1202 if (res->flags & IORESOURCE_MEM) in pci_cardbus_resource_alignment()
1210 struct pci_dev *bridge = bus->self; in pci_bus_size_cardbus()
1215 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_0_WINDOW]; in pci_bus_size_cardbus()
1216 if (b_res->parent) in pci_bus_size_cardbus()
1223 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1225 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1231 b_res = &bridge->resource[PCI_CB_BRIDGE_IO_1_WINDOW]; in pci_bus_size_cardbus()
1232 if (b_res->parent) in pci_bus_size_cardbus()
1235 b_res->flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1237 b_res->end -= pci_cardbus_io_size; in pci_bus_size_cardbus()
1259 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_0_WINDOW]; in pci_bus_size_cardbus()
1260 if (b_res->parent) in pci_bus_size_cardbus()
1269 b_res->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | in pci_bus_size_cardbus()
1272 b_res->end -= pci_cardbus_mem_size; in pci_bus_size_cardbus()
1282 b_res = &bridge->resource[PCI_CB_BRIDGE_MEM_1_WINDOW]; in pci_bus_size_cardbus()
1283 if (b_res->parent) in pci_bus_size_cardbus()
1286 b_res->flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; in pci_bus_size_cardbus()
1288 b_res->end -= b_res_3_size; in pci_bus_size_cardbus()
1307 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_size_bridges()
1308 struct pci_bus *b = dev->subordinate; in __pci_bus_size_bridges()
1312 switch (dev->hdr_type) { in __pci_bus_size_bridges()
1326 host = to_pci_host_bridge(bus->bridge); in __pci_bus_size_bridges()
1327 if (!host->size_windows) in __pci_bus_size_bridges()
1330 if (pref && (pref->flags & IORESOURCE_PREFETCH)) in __pci_bus_size_bridges()
1332 hdr_type = -1; /* Intentionally invalid - not a PCI device. */ in __pci_bus_size_bridges()
1334 pref = &bus->self->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in __pci_bus_size_bridges()
1335 hdr_type = bus->self->hdr_type; in __pci_bus_size_bridges()
1345 if (bus->self->is_hotplug_bridge) { in __pci_bus_size_bridges()
1356 * If there's a 64-bit prefetchable MMIO window, compute in __pci_bus_size_bridges()
1357 * the size required to put all 64-bit prefetchable in __pci_bus_size_bridges()
1362 if (pref && (pref->flags & IORESOURCE_MEM_64)) { in __pci_bus_size_bridges()
1370 * If successful, all non-prefetchable resources in __pci_bus_size_bridges()
1371 * and any 32-bit prefetchable resources will go in in __pci_bus_size_bridges()
1372 * the non-prefetchable window. in __pci_bus_size_bridges()
1382 * If there is no 64-bit prefetchable window, compute the in __pci_bus_size_bridges()
1384 * 32-bit prefetchable window (if there is one). in __pci_bus_size_bridges()
1394 * If successful, only non-prefetchable resources in __pci_bus_size_bridges()
1395 * will go in the non-prefetchable window. in __pci_bus_size_bridges()
1407 * non-prefetchable window. This includes: in __pci_bus_size_bridges()
1409 * - all non-prefetchable resources in __pci_bus_size_bridges()
1410 * - 32-bit prefetchable resources if there's a 64-bit in __pci_bus_size_bridges()
1412 * - 64-bit prefetchable resources if there's no prefetchable in __pci_bus_size_bridges()
1416 * that used here. Specifically, we cannot put a 32-bit in __pci_bus_size_bridges()
1417 * prefetchable resource in a 64-bit prefetchable window. in __pci_bus_size_bridges()
1442 if ((r->flags & mask) == (parent_r->flags & mask) && in assign_fixed_resource_on_bus()
1459 if (r->parent || !(r->flags & IORESOURCE_PCI_FIXED) || in pdev_assign_fixed_resources()
1460 !(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) in pdev_assign_fixed_resources()
1463 b = dev->bus; in pdev_assign_fixed_resources()
1464 while (b && !r->parent) { in pdev_assign_fixed_resources()
1466 b = b->parent; in pdev_assign_fixed_resources()
1480 list_for_each_entry(dev, &bus->devices, bus_list) { in __pci_bus_assign_resources()
1483 b = dev->subordinate; in __pci_bus_assign_resources()
1489 switch (dev->hdr_type) { in __pci_bus_assign_resources()
1501 pci_domain_nr(b), b->number); in __pci_bus_assign_resources()
1518 struct resource *r = &dev->resource[i]; in pci_claim_device_resources()
1520 if (!r->flags || r->parent) in pci_claim_device_resources()
1532 struct resource *r = &dev->resource[i]; in pci_claim_bridge_resources()
1534 if (!r->flags || r->parent) in pci_claim_bridge_resources()
1546 list_for_each_entry(dev, &b->devices, bus_list) { in pci_bus_allocate_dev_resources()
1549 child = dev->subordinate; in pci_bus_allocate_dev_resources()
1560 * Carry out a depth-first search on the PCI bus tree to allocate in pci_bus_allocate_resources()
1564 if (b->self) { in pci_bus_allocate_resources()
1566 pci_claim_bridge_resources(b->self); in pci_bus_allocate_resources()
1569 list_for_each_entry(child, &b->children, node) in pci_bus_allocate_resources()
1589 b = bridge->subordinate; in __pci_bridge_assign_resources()
1595 switch (bridge->class >> 8) { in __pci_bridge_assign_resources()
1606 pci_domain_nr(b), b->number); in __pci_bridge_assign_resources()
1618 struct pci_dev *dev = bus->self; in pci_bridge_release_resources()
1624 b_res = &dev->resource[PCI_BRIDGE_RESOURCES]; in pci_bridge_release_resources()
1651 if (!r->parent) in pci_bridge_release_resources()
1657 type = old_flags = r->flags & PCI_RES_TYPE_MASK; in pci_bridge_release_resources()
1661 r->end = resource_size(r) - 1; in pci_bridge_release_resources()
1662 r->start = 0; in pci_bridge_release_resources()
1663 r->flags = 0; in pci_bridge_release_resources()
1670 r->flags = old_flags; in pci_bridge_release_resources()
1690 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_release_bridge_resources()
1691 struct pci_bus *b = dev->subordinate; in pci_bus_release_bridge_resources()
1697 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1708 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI) in pci_bus_release_bridge_resources()
1721 if (!res || !res->end || !res->flags) in pci_bus_dump_res()
1724 dev_info(&bus->dev, "resource %d %pR\n", i, res); in pci_bus_dump_res()
1736 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_dump_resources()
1737 b = dev->subordinate; in pci_bus_dump_resources()
1750 list_for_each_entry(child_bus, &bus->children, node) { in pci_bus_get_depth()
1762 * -1: undefined, will auto detect later
1769 undefined = -1,
1796 struct resource *r = &dev->resource[i + PCI_IOV_RESOURCES]; in iov_resources_unassigned()
1800 if (!r->flags) in iov_resources_unassigned()
1803 pcibios_resource_to_bus(dev->bus, ®ion, r); in iov_resources_unassigned()
1823 if (host->preserve_config) in pci_realloc_detect()
1846 if (res->parent) in adjust_bridge_window()
1853 add_size = new_size - size; in adjust_bridge_window()
1857 add_size = size - new_size; in adjust_bridge_window()
1874 resource_size_t size, align, tmp; in remove_dev_resource() local
1880 align = pci_resource_alignment(dev, res); in remove_dev_resource()
1881 align = align ? ALIGN(avail->start, align) - avail->start : 0; in remove_dev_resource()
1882 tmp = align + size; in remove_dev_resource()
1883 avail->start = min(avail->start + tmp, avail->end + 1); in remove_dev_resource()
1899 * the correct resource. Specifically we put 32-bit in remove_dev_resources()
1900 * prefetchable memory in non-prefetchable window in remove_dev_resources()
1901 * if there is an 64-bit prefetchable window. in remove_dev_resources()
1906 if ((res->flags & IORESOURCE_PREFETCH) && in remove_dev_resources()
1907 ((res->flags & IORESOURCE_MEM_64) == in remove_dev_resources()
1908 (mmio_pref->flags & IORESOURCE_MEM_64))) in remove_dev_resources()
1916 #define ALIGN_DOWN_IF_NONZERO(addr, align) \ argument
1917 ((align) ? ALIGN_DOWN((addr), (align)) : (addr))
1933 struct pci_dev *dev, *bridge = bus->self; in pci_bus_distribute_available_resources()
1934 resource_size_t io_per_b, mmio_per_b, mmio_pref_per_b, align; in pci_bus_distribute_available_resources() local
1936 io_res = &bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
1937 mmio_res = &bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1938 mmio_pref_res = &bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
1944 align = pci_resource_alignment(bridge, io_res); in pci_bus_distribute_available_resources()
1945 if (!io_res->parent && align) in pci_bus_distribute_available_resources()
1946 io.start = min(ALIGN(io.start, align), io.end + 1); in pci_bus_distribute_available_resources()
1948 align = pci_resource_alignment(bridge, mmio_res); in pci_bus_distribute_available_resources()
1949 if (!mmio_res->parent && align) in pci_bus_distribute_available_resources()
1950 mmio.start = min(ALIGN(mmio.start, align), mmio.end + 1); in pci_bus_distribute_available_resources()
1952 align = pci_resource_alignment(bridge, mmio_pref_res); in pci_bus_distribute_available_resources()
1953 if (!mmio_pref_res->parent && align) in pci_bus_distribute_available_resources()
1954 mmio_pref.start = min(ALIGN(mmio_pref.start, align), in pci_bus_distribute_available_resources()
1955 mmio_pref.end + 1); in pci_bus_distribute_available_resources()
1972 if (dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
1986 list_for_each_entry(dev, &bus->devices, bus_list) { in pci_bus_distribute_available_resources()
1987 if (!dev->is_virtfn) in pci_bus_distribute_available_resources()
1997 * split between non-hotplug bridges. This is to allow possible in pci_bus_distribute_available_resources()
2016 b = dev->subordinate; in pci_bus_distribute_available_resources()
2019 if (hotplug_bridges && !dev->is_hotplug_bridge) in pci_bus_distribute_available_resources()
2022 res = &dev->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bus_distribute_available_resources()
2026 * for bridge windows (align it down to avoid going above in pci_bus_distribute_available_resources()
2029 align = pci_resource_alignment(dev, res); in pci_bus_distribute_available_resources()
2030 resource_set_size(&io, ALIGN_DOWN_IF_NONZERO(io_per_b, align)); in pci_bus_distribute_available_resources()
2038 io.start -= resource_size(res); in pci_bus_distribute_available_resources()
2040 res = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2041 align = pci_resource_alignment(dev, res); in pci_bus_distribute_available_resources()
2043 ALIGN_DOWN_IF_NONZERO(mmio_per_b,align)); in pci_bus_distribute_available_resources()
2044 mmio.start -= resource_size(res); in pci_bus_distribute_available_resources()
2046 res = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bus_distribute_available_resources()
2047 align = pci_resource_alignment(dev, res); in pci_bus_distribute_available_resources()
2049 ALIGN_DOWN_IF_NONZERO(mmio_pref_per_b, align)); in pci_bus_distribute_available_resources()
2050 mmio_pref.start -= resource_size(res); in pci_bus_distribute_available_resources()
2055 io.start += io.end + 1; in pci_bus_distribute_available_resources()
2056 mmio.start += mmio.end + 1; in pci_bus_distribute_available_resources()
2057 mmio_pref.start += mmio_pref.end + 1; in pci_bus_distribute_available_resources()
2066 if (!bridge->is_hotplug_bridge) in pci_bridge_distribute_available_resources()
2072 available_io = bridge->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_distribute_available_resources()
2073 available_mmio = bridge->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2074 available_mmio_pref = bridge->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_distribute_available_resources()
2076 pci_bus_distribute_available_resources(bridge->subordinate, in pci_bridge_distribute_available_resources()
2092 r = &dev->resource[PCI_BRIDGE_IO_WINDOW]; in pci_bridge_resources_not_assigned()
2093 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2095 r = &dev->resource[PCI_BRIDGE_MEM_WINDOW]; in pci_bridge_resources_not_assigned()
2096 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2098 r = &dev->resource[PCI_BRIDGE_PREF_MEM_WINDOW]; in pci_bridge_resources_not_assigned()
2099 if (r->flags && !(r->flags & IORESOURCE_STARTALIGN)) in pci_bridge_resources_not_assigned()
2109 struct pci_dev *dev, *bridge = bus->self; in pci_root_bus_distribute_available_resources()
2114 b = dev->subordinate; in pci_root_bus_distribute_available_resources()
2152 dev_info(&bus->dev, "max bus depth: %d pci_try_num: %d\n", in pci_assign_unassigned_root_bus_resources()
2182 dev_info(&bus->dev, "Some PCI device resources are unassigned, try booting with pci=realloc\n"); in pci_assign_unassigned_root_bus_resources()
2184 …dev_info(&bus->dev, "Automatically enabled pci realloc, if you have problem, try booting with pci=… in pci_assign_unassigned_root_bus_resources()
2190 dev_info(&bus->dev, "No. %d try to assign unassigned res\n", in pci_assign_unassigned_root_bus_resources()
2202 pci_bus_release_bridge_resources(fail_res->dev->bus, in pci_assign_unassigned_root_bus_resources()
2203 fail_res->flags & PCI_RES_TYPE_MASK, in pci_assign_unassigned_root_bus_resources()
2208 struct resource *res = fail_res->res; in pci_assign_unassigned_root_bus_resources()
2211 res->start = fail_res->start; in pci_assign_unassigned_root_bus_resources()
2212 res->end = fail_res->end; in pci_assign_unassigned_root_bus_resources()
2213 res->flags = fail_res->flags; in pci_assign_unassigned_root_bus_resources()
2215 if (pci_is_bridge(fail_res->dev)) { in pci_assign_unassigned_root_bus_resources()
2216 idx = res - &fail_res->dev->resource[0]; in pci_assign_unassigned_root_bus_resources()
2219 res->flags = 0; in pci_assign_unassigned_root_bus_resources()
2239 if (ACPI_HANDLE(root_bus->bridge)) in pci_assign_unassigned_resources()
2240 acpi_ioapic_add(ACPI_HANDLE(root_bus->bridge)); in pci_assign_unassigned_resources()
2246 struct pci_bus *parent = bridge->subordinate; in pci_assign_unassigned_bridge_resources()
2286 pci_bus_release_bridge_resources(fail_res->dev->bus, in pci_assign_unassigned_bridge_resources()
2287 fail_res->flags & PCI_RES_TYPE_MASK, in pci_assign_unassigned_bridge_resources()
2292 struct resource *res = fail_res->res; in pci_assign_unassigned_bridge_resources()
2295 res->start = fail_res->start; in pci_assign_unassigned_bridge_resources()
2296 res->end = fail_res->end; in pci_assign_unassigned_bridge_resources()
2297 res->flags = fail_res->flags; in pci_assign_unassigned_bridge_resources()
2299 if (pci_is_bridge(fail_res->dev)) { in pci_assign_unassigned_bridge_resources()
2300 idx = res - &fail_res->dev->resource[0]; in pci_assign_unassigned_bridge_resources()
2303 res->flags = 0; in pci_assign_unassigned_bridge_resources()
2336 struct resource *res = &bridge->resource[i]; in pci_reassign_bridge_resources()
2339 if ((res->flags ^ type) & PCI_RES_TYPE_MASK) in pci_reassign_bridge_resources()
2343 if (res->child) in pci_reassign_bridge_resources()
2352 if (res->parent) in pci_reassign_bridge_resources()
2354 res->start = 0; in pci_reassign_bridge_resources()
2355 res->end = 0; in pci_reassign_bridge_resources()
2361 next = bridge->bus ? bridge->bus->self : NULL; in pci_reassign_bridge_resources()
2366 return -ENOENT; in pci_reassign_bridge_resources()
2369 __pci_bus_size_bridges(bridge->subordinate, &added); in pci_reassign_bridge_resources()
2374 ret = -ENOSPC; in pci_reassign_bridge_resources()
2380 if (bridge == dev_res->dev) in pci_reassign_bridge_resources()
2383 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2384 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2394 struct resource *res = dev_res->res; in pci_reassign_bridge_resources()
2396 res->start = dev_res->start; in pci_reassign_bridge_resources()
2397 res->end = dev_res->end; in pci_reassign_bridge_resources()
2398 res->flags = dev_res->flags; in pci_reassign_bridge_resources()
2404 struct resource *res = dev_res->res; in pci_reassign_bridge_resources()
2406 bridge = dev_res->dev; in pci_reassign_bridge_resources()
2407 i = res - bridge->resource; in pci_reassign_bridge_resources()
2409 res->start = dev_res->start; in pci_reassign_bridge_resources()
2410 res->end = dev_res->end; in pci_reassign_bridge_resources()
2411 res->flags = dev_res->flags; in pci_reassign_bridge_resources()
2414 pci_setup_bridge(bridge->subordinate); in pci_reassign_bridge_resources()
2431 __pci_bus_size_bridges(dev->subordinate, &add_list); in pci_assign_unassigned_bus_resources()