680 	struct mtk_phy_instance *instance)  in hs_slew_rate_calibrate()  argument
682 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in hs_slew_rate_calibrate()
694 	if (instance->eye_src)  in hs_slew_rate_calibrate()
709 		tmp |= FIELD_PREP(P2F_RG_MONCLK_SEL, instance->index >> 1);  in hs_slew_rate_calibrate()
738 		instance->index, fm_out, calibration_val,  in hs_slew_rate_calibrate()
750 	struct mtk_phy_instance *instance)  in u3_phy_instance_init()  argument
752 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in u3_phy_instance_init()
756 	if (instance->type_force_mode) {  in u3_phy_instance_init()
795 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in u3_phy_instance_init()
799 	struct mtk_phy_instance *instance)  in u2_phy_pll_26m_set()  argument
801 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_pll_26m_set()
818 	struct mtk_phy_instance *instance)  in u2_phy_instance_init()  argument
820 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_init()
822 	u32 index = instance->index;  in u2_phy_instance_init()
858 	u2_phy_pll_26m_set(tphy, instance);  in u2_phy_instance_init()
864 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_on()  argument
866 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_on()
868 	u32 index = instance->index;  in u2_phy_instance_power_on()
886 	struct mtk_phy_instance *instance)  in u2_phy_instance_power_off()  argument
888 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_power_off()
890 	u32 index = instance->index;  in u2_phy_instance_power_off()
909 	struct mtk_phy_instance *instance)  in u2_phy_instance_exit()  argument
911 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_exit()
913 	u32 index = instance->index;  in u2_phy_instance_exit()
923 				     struct mtk_phy_instance *instance,  in u2_phy_instance_set_mode()  argument
926 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_instance_set_mode()
948 	struct mtk_phy_instance *instance)  in pcie_phy_instance_init()  argument
950 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in pcie_phy_instance_init()
994 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in pcie_phy_instance_init()
998 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_on()  argument
1000 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_on()
1010 	struct mtk_phy_instance *instance)  in pcie_phy_instance_power_off()  argument
1013 	struct u3phy_banks *bank = &instance->u3_banks;  in pcie_phy_instance_power_off()
1023 	struct mtk_phy_instance *instance)  in sata_phy_instance_init()  argument
1025 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in sata_phy_instance_init()
1064 	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);  in sata_phy_instance_init()
1068 			      struct mtk_phy_instance *instance)  in phy_v1_banks_init()  argument
1070 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v1_banks_init()
1071 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v1_banks_init()
1073 	switch (instance->type) {  in phy_v1_banks_init()
1077 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;  in phy_v1_banks_init()
1083 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1084 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;  in phy_v1_banks_init()
1087 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;  in phy_v1_banks_init()
1096 			      struct mtk_phy_instance *instance)  in phy_v2_banks_init()  argument
1098 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_v2_banks_init()
1099 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_v2_banks_init()
1101 	switch (instance->type) {  in phy_v2_banks_init()
1103 		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;  in phy_v2_banks_init()
1104 		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;  in phy_v2_banks_init()
1105 		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;  in phy_v2_banks_init()
1109 		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;  in phy_v2_banks_init()
1110 		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;  in phy_v2_banks_init()
1111 		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;  in phy_v2_banks_init()
1112 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;  in phy_v2_banks_init()
1121 				struct mtk_phy_instance *instance)  in phy_parse_property()  argument
1123 	struct device *dev = &instance->phy->dev;  in phy_parse_property()
1125 	if (instance->type == PHY_TYPE_USB3)  in phy_parse_property()
1126 		instance->type_force_mode = device_property_read_bool(dev, "mediatek,force-mode");  in phy_parse_property()
1128 	if (instance->type != PHY_TYPE_USB2)  in phy_parse_property()
1131 	instance->bc12_en = device_property_read_bool(dev, "mediatek,bc12");  in phy_parse_property()
1133 				 &instance->eye_src);  in phy_parse_property()
1135 				 &instance->eye_vrt);  in phy_parse_property()
1137 				 &instance->eye_term);  in phy_parse_property()
1139 				 &instance->intr);  in phy_parse_property()
1141 				 &instance->discth);  in phy_parse_property()
1143 				 &instance->pre_emphasis);  in phy_parse_property()
1145 		instance->bc12_en, instance->eye_src,  in phy_parse_property()
1146 		instance->eye_vrt, instance->eye_term,  in phy_parse_property()
1147 		instance->intr, instance->discth);  in phy_parse_property()
1148 	dev_dbg(dev, "pre-emp:%d\n", instance->pre_emphasis);  in phy_parse_property()
1152 			     struct mtk_phy_instance *instance)  in u2_phy_props_set()  argument
1154 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in u2_phy_props_set()
1157 	if (instance->bc12_en) /* BC1.2 path Enable */  in u2_phy_props_set()
1160 	if (tphy->pdata->version < MTK_PHY_V3 && instance->eye_src)  in u2_phy_props_set()
1162 				     instance->eye_src);  in u2_phy_props_set()
1164 	if (instance->eye_vrt)  in u2_phy_props_set()
1166 				     instance->eye_vrt);  in u2_phy_props_set()
1168 	if (instance->eye_term)  in u2_phy_props_set()
1170 				     instance->eye_term);  in u2_phy_props_set()
1172 	if (instance->intr) {  in u2_phy_props_set()
1178 				     instance->intr);  in u2_phy_props_set()
1181 	if (instance->discth)  in u2_phy_props_set()
1183 				     instance->discth);  in u2_phy_props_set()
1185 	if (instance->pre_emphasis)  in u2_phy_props_set()
1187 				     instance->pre_emphasis);  in u2_phy_props_set()
1191 static int phy_type_syscon_get(struct mtk_phy_instance *instance,  in phy_type_syscon_get()  argument
1206 	instance->type_sw_reg = args.args[0];  in phy_type_syscon_get()
1207 	instance->type_sw_index = args.args[1] & 0x3; /* <=3 */  in phy_type_syscon_get()
1208 	instance->type_sw = syscon_node_to_regmap(args.np);  in phy_type_syscon_get()
1210 	dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n",  in phy_type_syscon_get()
1211 		 instance->type_sw_reg, instance->type_sw_index);  in phy_type_syscon_get()
1213 	return PTR_ERR_OR_ZERO(instance->type_sw);  in phy_type_syscon_get()
1216 static int phy_type_set(struct mtk_phy_instance *instance)  in phy_type_set()  argument
1221 	if (!instance->type_sw)  in phy_type_set()
1224 	switch (instance->type) {  in phy_type_set()
1242 	offset = instance->type_sw_index * BITS_PER_BYTE;  in phy_type_set()
1243 	regmap_update_bits(instance->type_sw, instance->type_sw_reg,  in phy_type_set()
1249 static int phy_efuse_get(struct mtk_tphy *tphy, struct mtk_phy_instance *instance)  in phy_efuse_get()  argument
1251 	struct device *dev = &instance->phy->dev;  in phy_efuse_get()
1256 		instance->efuse_sw_en = 0;  in phy_efuse_get()
1261 	instance->efuse_sw_en = device_property_read_bool(dev, "nvmem-cells");  in phy_efuse_get()
1262 	if (!instance->efuse_sw_en)  in phy_efuse_get()
1265 	switch (instance->type) {  in phy_efuse_get()
1267 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1274 		if (!instance->efuse_intr) {  in phy_efuse_get()
1276 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1280 		dev_dbg(dev, "u2 efuse - intr %x\n", instance->efuse_intr);  in phy_efuse_get()
1285 		ret = nvmem_cell_read_variable_le_u32(dev, "intr", &instance->efuse_intr);  in phy_efuse_get()
1291 		ret = nvmem_cell_read_variable_le_u32(dev, "rx_imp", &instance->efuse_rx_imp);  in phy_efuse_get()
1297 		ret = nvmem_cell_read_variable_le_u32(dev, "tx_imp", &instance->efuse_tx_imp);  in phy_efuse_get()
1304 		if (!instance->efuse_intr &&  in phy_efuse_get()
1305 		    !instance->efuse_rx_imp &&  in phy_efuse_get()
1306 		    !instance->efuse_tx_imp) {  in phy_efuse_get()
1308 			instance->efuse_sw_en = 0;  in phy_efuse_get()
1313 			instance->efuse_intr, instance->efuse_rx_imp,instance->efuse_tx_imp);  in phy_efuse_get()
1316 		dev_err(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_get()
1323 static void phy_efuse_set(struct mtk_phy_instance *instance)  in phy_efuse_set()  argument
1325 	struct device *dev = &instance->phy->dev;  in phy_efuse_set()
1326 	struct u2phy_banks *u2_banks = &instance->u2_banks;  in phy_efuse_set()
1327 	struct u3phy_banks *u3_banks = &instance->u3_banks;  in phy_efuse_set()
1329 	if (!instance->efuse_sw_en)  in phy_efuse_set()
1332 	switch (instance->type) {  in phy_efuse_set()
1337 				     instance->efuse_intr);  in phy_efuse_set()
1344 				    instance->efuse_tx_imp);  in phy_efuse_set()
1348 				    instance->efuse_rx_imp);  in phy_efuse_set()
1352 				    instance->efuse_intr);  in phy_efuse_set()
1355 		dev_warn(dev, "no sw efuse for type %d\n", instance->type);  in phy_efuse_set()
1362 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_init()  local
1366 	ret = clk_bulk_prepare_enable(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1370 	phy_efuse_set(instance);  in mtk_phy_init()
1372 	switch (instance->type) {  in mtk_phy_init()
1374 		u2_phy_instance_init(tphy, instance);  in mtk_phy_init()
1375 		u2_phy_props_set(tphy, instance);  in mtk_phy_init()
1378 		u3_phy_instance_init(tphy, instance);  in mtk_phy_init()
1381 		pcie_phy_instance_init(tphy, instance);  in mtk_phy_init()
1384 		sata_phy_instance_init(tphy, instance);  in mtk_phy_init()
1391 		clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_init()
1400 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_on()  local
1403 	if (instance->type == PHY_TYPE_USB2) {  in mtk_phy_power_on()
1404 		u2_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1405 		hs_slew_rate_calibrate(tphy, instance);  in mtk_phy_power_on()
1406 	} else if (instance->type == PHY_TYPE_PCIE) {  in mtk_phy_power_on()
1407 		pcie_phy_instance_power_on(tphy, instance);  in mtk_phy_power_on()
1415 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_power_off()  local
1418 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_power_off()
1419 		u2_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1420 	else if (instance->type == PHY_TYPE_PCIE)  in mtk_phy_power_off()
1421 		pcie_phy_instance_power_off(tphy, instance);  in mtk_phy_power_off()
1428 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_exit()  local
1431 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_exit()
1432 		u2_phy_instance_exit(tphy, instance);  in mtk_phy_exit()
1434 	clk_bulk_disable_unprepare(TPHY_CLKS_CNT, instance->clks);  in mtk_phy_exit()
1440 	struct mtk_phy_instance *instance = phy_get_drvdata(phy);  in mtk_phy_set_mode()  local
1443 	if (instance->type == PHY_TYPE_USB2)  in mtk_phy_set_mode()
1444 		u2_phy_instance_set_mode(tphy, instance, mode);  in mtk_phy_set_mode()
1453 	struct mtk_phy_instance *instance = NULL;  in mtk_phy_xlate()  local
1465 			instance = tphy->phys[index];  in mtk_phy_xlate()
1469 	if (!instance) {  in mtk_phy_xlate()
1474 	instance->type = args->args[0];  in mtk_phy_xlate()
1475 	if (!(instance->type == PHY_TYPE_USB2 ||  in mtk_phy_xlate()
1476 	      instance->type == PHY_TYPE_USB3 ||  in mtk_phy_xlate()
1477 	      instance->type == PHY_TYPE_PCIE ||  in mtk_phy_xlate()
1478 	      instance->type == PHY_TYPE_SATA ||  in mtk_phy_xlate()
1479 	      instance->type == PHY_TYPE_SGMII)) {  in mtk_phy_xlate()
1480 		dev_err(dev, "unsupported device type: %d\n", instance->type);  in mtk_phy_xlate()
1486 		phy_v1_banks_init(tphy, instance);  in mtk_phy_xlate()
1490 		phy_v2_banks_init(tphy, instance);  in mtk_phy_xlate()
1497 	ret = phy_efuse_get(tphy, instance);  in mtk_phy_xlate()
1501 	phy_parse_property(tphy, instance);  in mtk_phy_xlate()
1502 	phy_type_set(instance);  in mtk_phy_xlate()
1503 	phy_debugfs_init(instance);  in mtk_phy_xlate()
1505 	return instance->phy;  in mtk_phy_xlate()
1606 		struct mtk_phy_instance *instance;  in mtk_tphy_probe()  local
1612 		instance = devm_kzalloc(dev, sizeof(*instance), GFP_KERNEL);  in mtk_tphy_probe()
1613 		if (!instance)  in mtk_tphy_probe()
1616 		tphy->phys[port] = instance;  in mtk_tphy_probe()
1632 		instance->port_base = devm_ioremap_resource(subdev, &res);  in mtk_tphy_probe()
1633 		if (IS_ERR(instance->port_base))  in mtk_tphy_probe()
1634 			return PTR_ERR(instance->port_base);  in mtk_tphy_probe()
1636 		instance->phy = phy;  in mtk_tphy_probe()
1637 		instance->index = port;  in mtk_tphy_probe()
1638 		phy_set_drvdata(phy, instance);  in mtk_tphy_probe()
1641 		clks = instance->clks;  in mtk_tphy_probe()
1648 		retval = phy_type_syscon_get(instance, child_np);  in mtk_tphy_probe()