1 // SPDX-License-Identifier: GPL-2.0
8  * Author: Shyam Sundar S K <Shyam-sundar.S-[email protected]>
34 static void amd_pmf_cnqf_dump_defaults(struct apmf_dyn_slider_output *data, int idx)  in amd_pmf_cnqf_dump_defaults()  argument
38 	pr_debug("Dynamic Slider %s Defaults - BEGIN\n", idx ? "DC" : "AC");  in amd_pmf_cnqf_dump_defaults()
39 	pr_debug("size: %u\n", data->size);  in amd_pmf_cnqf_dump_defaults()
40 	pr_debug("flags: 0x%x\n", data->flags);  in amd_pmf_cnqf_dump_defaults()
43 	pr_debug("t_perf_to_turbo: %u ms\n", data->t_perf_to_turbo);  in amd_pmf_cnqf_dump_defaults()
44 	pr_debug("t_balanced_to_perf: %u ms\n", data->t_balanced_to_perf);  in amd_pmf_cnqf_dump_defaults()
45 	pr_debug("t_quiet_to_balanced: %u ms\n", data->t_quiet_to_balanced);  in amd_pmf_cnqf_dump_defaults()
46 	pr_debug("t_balanced_to_quiet: %u ms\n", data->t_balanced_to_quiet);  in amd_pmf_cnqf_dump_defaults()
47 	pr_debug("t_perf_to_balanced: %u ms\n", data->t_perf_to_balanced);  in amd_pmf_cnqf_dump_defaults()
48 	pr_debug("t_turbo_to_perf: %u ms\n", data->t_turbo_to_perf);  in amd_pmf_cnqf_dump_defaults()
51 		pr_debug("pfloor_%s: %u mW\n", state_as_str_cnqf(i), data->ps[i].pfloor);  in amd_pmf_cnqf_dump_defaults()
52 		pr_debug("fppt_%s: %u mW\n", state_as_str_cnqf(i), data->ps[i].fppt);  in amd_pmf_cnqf_dump_defaults()
53 		pr_debug("sppt_%s: %u mW\n", state_as_str_cnqf(i), data->ps[i].sppt);  in amd_pmf_cnqf_dump_defaults()
55 			 state_as_str_cnqf(i), data->ps[i].sppt_apu_only);  in amd_pmf_cnqf_dump_defaults()
56 		pr_debug("spl_%s: %u mW\n", state_as_str_cnqf(i), data->ps[i].spl);  in amd_pmf_cnqf_dump_defaults()
58 			 state_as_str_cnqf(i), data->ps[i].stt_min_limit);  in amd_pmf_cnqf_dump_defaults()
60 			 data->ps[i].stt_skintemp[STT_TEMP_APU]);  in amd_pmf_cnqf_dump_defaults()
62 			 data->ps[i].stt_skintemp[STT_TEMP_HS2]);  in amd_pmf_cnqf_dump_defaults()
63 		pr_debug("fan_id_%s: %u\n", state_as_str_cnqf(i), data->ps[i].fan_id);  in amd_pmf_cnqf_dump_defaults()
66 	pr_debug("Dynamic Slider %s Defaults - END\n", idx ? "DC" : "AC");  in amd_pmf_cnqf_dump_defaults()
69 static void amd_pmf_cnqf_dump_defaults(struct apmf_dyn_slider_output *data, int idx) {}  in amd_pmf_cnqf_dump_defaults()  argument
79 	amd_pmf_send_cmd(dev, SET_SPL, false, pc->spl, NULL);  in amd_pmf_set_cnqf()
80 	amd_pmf_send_cmd(dev, SET_FPPT, false, pc->fppt, NULL);  in amd_pmf_set_cnqf()
81 	amd_pmf_send_cmd(dev, SET_SPPT, false, pc->sppt, NULL);  in amd_pmf_set_cnqf()
82 	amd_pmf_send_cmd(dev, SET_SPPT_APU_ONLY, false, pc->sppt_apu_only, NULL);  in amd_pmf_set_cnqf()
83 	amd_pmf_send_cmd(dev, SET_STT_MIN_LIMIT, false, pc->stt_min, NULL);  in amd_pmf_set_cnqf()
85 			 fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_APU]), NULL);  in amd_pmf_set_cnqf()
87 			 fixp_q88_fromint(pc->stt_skin_temp[STT_TEMP_HS2]), NULL);  in amd_pmf_set_cnqf()
104 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
108 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
112 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
116 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
120 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
124 	tp->power_threshold = ts->power_floor;  in amd_pmf_update_power_threshold()
170 		return -EINVAL;  in amd_pmf_trans_cnqf()
181 		dev_dbg(dev->dev, "avg_power: %u mW total_power: %u mW count: %u timer: %u ms\n",  in amd_pmf_trans_cnqf()
186 		if (tp->timer >= tp->time_constant && tp->count) {  in amd_pmf_trans_cnqf()
187 			avg_power = tp->total_power / tp->count;  in amd_pmf_trans_cnqf()
190 			tp->timer = 0;  in amd_pmf_trans_cnqf()
191 			tp->total_power = 0;  in amd_pmf_trans_cnqf()
192 			tp->count = 0;  in amd_pmf_trans_cnqf()
194 			if ((tp->shifting_up && avg_power >= tp->power_threshold) ||  in amd_pmf_trans_cnqf()
195 			    (!tp->shifting_up && avg_power <= tp->power_threshold)) {  in amd_pmf_trans_cnqf()
196 				tp->priority = true;  in amd_pmf_trans_cnqf()
198 				tp->priority = false;  in amd_pmf_trans_cnqf()
203 	dev_dbg(dev->dev, "[CNQF] Avg power: %u mW socket power: %u mW mode:%s\n",  in amd_pmf_trans_cnqf()
207 	dev_dbg(dev->dev, "[CNQF] priority1: %u priority2: %u priority3: %u\n",  in amd_pmf_trans_cnqf()
212 	dev_dbg(dev->dev, "[CNQF] priority4: %u priority5: %u priority6: %u\n",  in amd_pmf_trans_cnqf()
225 				dev_dbg(dev->dev, "Moving to Mode :%s\n",  in amd_pmf_trans_cnqf()
236 static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output *out)  in amd_pmf_update_trans_data()  argument
241 	tp->time_constant = out->t_balanced_to_quiet;  in amd_pmf_update_trans_data()
242 	tp->target_mode = CNQF_MODE_QUIET;  in amd_pmf_update_trans_data()
243 	tp->shifting_up = false;  in amd_pmf_update_trans_data()
246 	tp->time_constant = out->t_balanced_to_perf;  in amd_pmf_update_trans_data()
247 	tp->target_mode = CNQF_MODE_PERFORMANCE;  in amd_pmf_update_trans_data()
248 	tp->shifting_up = true;  in amd_pmf_update_trans_data()
251 	tp->time_constant = out->t_quiet_to_balanced;  in amd_pmf_update_trans_data()
252 	tp->target_mode = CNQF_MODE_BALANCE;  in amd_pmf_update_trans_data()
253 	tp->shifting_up = true;  in amd_pmf_update_trans_data()
256 	tp->time_constant = out->t_perf_to_balanced;  in amd_pmf_update_trans_data()
257 	tp->target_mode = CNQF_MODE_BALANCE;  in amd_pmf_update_trans_data()
258 	tp->shifting_up = false;  in amd_pmf_update_trans_data()
261 	tp->time_constant = out->t_turbo_to_perf;  in amd_pmf_update_trans_data()
262 	tp->target_mode = CNQF_MODE_PERFORMANCE;  in amd_pmf_update_trans_data()
263 	tp->shifting_up = false;  in amd_pmf_update_trans_data()
266 	tp->time_constant = out->t_perf_to_turbo;  in amd_pmf_update_trans_data()
267 	tp->target_mode = CNQF_MODE_TURBO;  in amd_pmf_update_trans_data()
268 	tp->shifting_up = true;  in amd_pmf_update_trans_data()
271 static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output *out)  in amd_pmf_update_mode_set()  argument
277 	ms->power_floor = out->ps[APMF_CNQF_QUIET].pfloor;  in amd_pmf_update_mode_set()
278 	ms->power_control.fppt = out->ps[APMF_CNQF_QUIET].fppt;  in amd_pmf_update_mode_set()
279 	ms->power_control.sppt = out->ps[APMF_CNQF_QUIET].sppt;  in amd_pmf_update_mode_set()
280 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_QUIET].sppt_apu_only;  in amd_pmf_update_mode_set()
281 	ms->power_control.spl = out->ps[APMF_CNQF_QUIET].spl;  in amd_pmf_update_mode_set()
282 	ms->power_control.stt_min = out->ps[APMF_CNQF_QUIET].stt_min_limit;  in amd_pmf_update_mode_set()
283 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
284 		out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];  in amd_pmf_update_mode_set()
285 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
286 		out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];  in amd_pmf_update_mode_set()
287 	ms->fan_control.fan_id = out->ps[APMF_CNQF_QUIET].fan_id;  in amd_pmf_update_mode_set()
291 	ms->power_floor = out->ps[APMF_CNQF_BALANCE].pfloor;  in amd_pmf_update_mode_set()
292 	ms->power_control.fppt = out->ps[APMF_CNQF_BALANCE].fppt;  in amd_pmf_update_mode_set()
293 	ms->power_control.sppt = out->ps[APMF_CNQF_BALANCE].sppt;  in amd_pmf_update_mode_set()
294 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_BALANCE].sppt_apu_only;  in amd_pmf_update_mode_set()
295 	ms->power_control.spl = out->ps[APMF_CNQF_BALANCE].spl;  in amd_pmf_update_mode_set()
296 	ms->power_control.stt_min = out->ps[APMF_CNQF_BALANCE].stt_min_limit;  in amd_pmf_update_mode_set()
297 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
298 		out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];  in amd_pmf_update_mode_set()
299 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
300 		out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];  in amd_pmf_update_mode_set()
301 	ms->fan_control.fan_id = out->ps[APMF_CNQF_BALANCE].fan_id;  in amd_pmf_update_mode_set()
305 	ms->power_floor = out->ps[APMF_CNQF_PERFORMANCE].pfloor;  in amd_pmf_update_mode_set()
306 	ms->power_control.fppt = out->ps[APMF_CNQF_PERFORMANCE].fppt;  in amd_pmf_update_mode_set()
307 	ms->power_control.sppt = out->ps[APMF_CNQF_PERFORMANCE].sppt;  in amd_pmf_update_mode_set()
308 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;  in amd_pmf_update_mode_set()
309 	ms->power_control.spl = out->ps[APMF_CNQF_PERFORMANCE].spl;  in amd_pmf_update_mode_set()
310 	ms->power_control.stt_min = out->ps[APMF_CNQF_PERFORMANCE].stt_min_limit;  in amd_pmf_update_mode_set()
311 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
312 		out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];  in amd_pmf_update_mode_set()
313 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
314 		out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];  in amd_pmf_update_mode_set()
315 	ms->fan_control.fan_id = out->ps[APMF_CNQF_PERFORMANCE].fan_id;  in amd_pmf_update_mode_set()
319 	ms->power_floor = out->ps[APMF_CNQF_TURBO].pfloor;  in amd_pmf_update_mode_set()
320 	ms->power_control.fppt = out->ps[APMF_CNQF_TURBO].fppt;  in amd_pmf_update_mode_set()
321 	ms->power_control.sppt = out->ps[APMF_CNQF_TURBO].sppt;  in amd_pmf_update_mode_set()
322 	ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_TURBO].sppt_apu_only;  in amd_pmf_update_mode_set()
323 	ms->power_control.spl = out->ps[APMF_CNQF_TURBO].spl;  in amd_pmf_update_mode_set()
324 	ms->power_control.stt_min = out->ps[APMF_CNQF_TURBO].stt_min_limit;  in amd_pmf_update_mode_set()
325 	ms->power_control.stt_skin_temp[STT_TEMP_APU] =  in amd_pmf_update_mode_set()
326 		out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];  in amd_pmf_update_mode_set()
327 	ms->power_control.stt_skin_temp[STT_TEMP_HS2] =  in amd_pmf_update_mode_set()
328 		out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];  in amd_pmf_update_mode_set()
329 	ms->fan_control.fan_id = out->ps[APMF_CNQF_TURBO].fan_id;  in amd_pmf_update_mode_set()
334 	struct apmf_dyn_slider_output out = {};  in amd_pmf_check_flags()  local
337 		apmf_get_dyn_slider_def_ac(dev, &out);  in amd_pmf_check_flags()
339 		apmf_get_dyn_slider_def_dc(dev, &out);  in amd_pmf_check_flags()
341 	return out.flags;  in amd_pmf_check_flags()
346 	struct apmf_dyn_slider_output out;  in amd_pmf_load_defaults_cnqf()  local
354 			ret = apmf_get_dyn_slider_def_ac(dev, &out);  in amd_pmf_load_defaults_cnqf()
356 			ret = apmf_get_dyn_slider_def_dc(dev, &out);  in amd_pmf_load_defaults_cnqf()
358 			dev_err(dev->dev, "APMF apmf_get_dyn_slider_def_dc failed :%d\n", ret);  in amd_pmf_load_defaults_cnqf()
362 		amd_pmf_cnqf_dump_defaults(&out, i);  in amd_pmf_load_defaults_cnqf()
363 		amd_pmf_update_mode_set(i, &out);  in amd_pmf_load_defaults_cnqf()
364 		amd_pmf_update_trans_data(i, &out);  in amd_pmf_load_defaults_cnqf()
394 	pdev->cnqf_enabled = input;  in cnqf_enable_store()
396 	if (pdev->cnqf_enabled && is_pprof_balanced(pdev)) {  in cnqf_enable_store()
403 	dev_dbg(pdev->dev, "Received CnQF %s\n", str_on_off(input));  in cnqf_enable_store()
413 	return sysfs_emit(buf, "%s\n", str_on_off(pdev->cnqf_enabled));  in cnqf_enable_show()
424 	return pdev->cnqf_supported ? attr->mode : 0;  in cnqf_feature_is_visible()
439 	cancel_delayed_work_sync(&dev->work_buffer);  in amd_pmf_deinit_cnqf()
457 	dev->cnqf_supported = true;  in amd_pmf_init_cnqf()
458 	dev->cnqf_enabled = amd_pmf_check_flags(dev);  in amd_pmf_init_cnqf()
461 	if (dev->cnqf_enabled && is_pprof_balanced(dev)) {  in amd_pmf_init_cnqf()