Lines Matching full:lane

21 	unsigned int lane;  member
53 if (p_rt->lane != t_data->lane) in sdw_compute_slave_ports()
64 SDW_BLK_PKG_PER_PORT, p_rt->lane); in sdw_compute_slave_ports()
113 if (p_rt->lane != params->lane) in sdw_compute_master_ports()
119 SDW_BLK_PKG_PER_PORT, p_rt->lane); in sdw_compute_master_ports()
141 t_data.lane = params->lane; in sdw_compute_master_ports()
156 /* reset hstop for each lane */ in _sdw_compute_port_params()
159 if (params[i].lane != l) in _sdw_compute_port_params()
186 params[i].lane = group->lanes[i]; in sdw_compute_group_params()
211 if (rate == params[i].rate && p_rt->lane == params[i].lane) in sdw_compute_group_params()
220 /* reset column_needed for each lane */ in sdw_compute_group_params()
223 if (params[i].lane != l) in sdw_compute_group_params()
230 /* There is no control column for lane 1 and above */ in sdw_compute_group_params()
233 /* Column 0 is control column on lane 0 */ in sdw_compute_group_params()
234 if (params[i].lane == 0 && column_needed > sel_col - 1) in sdw_compute_group_params()
244 unsigned int rate, unsigned int lane) in sdw_add_element_group_count() argument
250 if (rate == group->rates[i] && lane == group->lanes[i]) in sdw_add_element_group_count()
279 group->lanes[group->count++] = lane; in sdw_add_element_group_count()
317 * Different ports could use different lane, add group element in sdw_get_group_count()
321 ret = sdw_add_element_group_count(group, rate, p_rt->lane); in sdw_get_group_count()
412 * is_lane_connected_to_all_peripherals: Check if the given manager lane connects to all peripherals
413 * So that all peripherals can use the manager lane.
416 * @lane: Lane number
418 static bool is_lane_connected_to_all_peripherals(struct sdw_master_runtime *m_rt, unsigned int lane) in is_lane_connected_to_all_peripherals() argument
427 if (slave_prop->lane_maps[i] == lane) { in is_lane_connected_to_all_peripherals()
429 "M lane %d is connected to P lane %d\n", in is_lane_connected_to_all_peripherals()
430 lane, i); in is_lane_connected_to_all_peripherals()
435 dev_dbg(&s_rt->slave->dev, "M lane %d is not connected\n", lane); in is_lane_connected_to_all_peripherals()
467 "Not all Peripherals are connected to M lane %d\n", in get_manager_lane()
472 dev_dbg(&s_rt->slave->dev, "M lane %d is used\n", m_lane); in get_manager_lane()
475 * Use non-zero manager lane, subtract the lane 0 in get_manager_lane()
483 /* No available multi lane found, only lane 0 can be used */ in get_manager_lane()
536 * Get the first s_rt that will be used to find the available lane that in sdw_compute_bus_params()
538 * multi-lane if we can't find any available lane for the first Peripheral. in sdw_compute_bus_params()
544 * Find the available Manager lane that connected to the first Peripheral. in sdw_compute_bus_params()
572 s_p_rt->lane = l; in sdw_compute_bus_params()
574 "Set P lane %d for port %d\n", in sdw_compute_bus_params()
586 m_p_rt->lane = m_lane; in sdw_compute_bus_params()