Lines Matching full:pl022
3 * A driver for the ARM PL022 PrimeCell SSP/SPI bus master.
12 * Initial adoption to PL022 by:
27 #include <linux/amba/pl022.h>
312 * for PL022 derivates
333 * struct pl022 - This is the private SSP driver data structure
360 struct pl022 { struct
421 * @pl022: SSP driver private data structure
428 static void internal_cs_control(struct pl022 *pl022, bool enable) in internal_cs_control() argument
432 tmp = readw(SSP_CSR(pl022->virtbase)); in internal_cs_control()
434 tmp &= ~BIT(pl022->cur_cs); in internal_cs_control()
436 tmp |= BIT(pl022->cur_cs); in internal_cs_control()
437 writew(tmp, SSP_CSR(pl022->virtbase)); in internal_cs_control()
442 struct pl022 *pl022 = spi_controller_get_devdata(spi->controller); in pl022_cs_control() local
443 if (pl022->vendor->internal_cs_ctrl) in pl022_cs_control()
444 internal_cs_control(pl022, enable); in pl022_cs_control()
449 * @pl022: SSP driver private data structure
451 static int flush(struct pl022 *pl022) in flush() argument
455 dev_dbg(&pl022->adev->dev, "flush\n"); in flush()
457 while (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) in flush()
458 readw(SSP_DR(pl022->virtbase)); in flush()
459 } while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_BSY) && limit--); in flush()
461 pl022->exp_fifo_level = 0; in flush()
468 * @pl022: SSP driver private data structure
470 static void restore_state(struct pl022 *pl022) in restore_state() argument
472 struct chip_data *chip = pl022->cur_chip; in restore_state()
474 if (pl022->vendor->extended_cr) in restore_state()
475 writel(chip->cr0, SSP_CR0(pl022->virtbase)); in restore_state()
477 writew(chip->cr0, SSP_CR0(pl022->virtbase)); in restore_state()
478 writew(chip->cr1, SSP_CR1(pl022->virtbase)); in restore_state()
479 writew(chip->dmacr, SSP_DMACR(pl022->virtbase)); in restore_state()
480 writew(chip->cpsr, SSP_CPSR(pl022->virtbase)); in restore_state()
481 writew(DISABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase)); in restore_state()
482 writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase)); in restore_state()
558 * @pl022: SSP driver private data structure
560 static void load_ssp_default_config(struct pl022 *pl022) in load_ssp_default_config() argument
562 if (pl022->vendor->pl023) { in load_ssp_default_config()
563 writel(DEFAULT_SSP_REG_CR0_ST_PL023, SSP_CR0(pl022->virtbase)); in load_ssp_default_config()
564 writew(DEFAULT_SSP_REG_CR1_ST_PL023, SSP_CR1(pl022->virtbase)); in load_ssp_default_config()
565 } else if (pl022->vendor->extended_cr) { in load_ssp_default_config()
566 writel(DEFAULT_SSP_REG_CR0_ST, SSP_CR0(pl022->virtbase)); in load_ssp_default_config()
567 writew(DEFAULT_SSP_REG_CR1_ST, SSP_CR1(pl022->virtbase)); in load_ssp_default_config()
569 writew(DEFAULT_SSP_REG_CR0, SSP_CR0(pl022->virtbase)); in load_ssp_default_config()
570 writew(DEFAULT_SSP_REG_CR1, SSP_CR1(pl022->virtbase)); in load_ssp_default_config()
572 writew(DEFAULT_SSP_REG_DMACR, SSP_DMACR(pl022->virtbase)); in load_ssp_default_config()
573 writew(DEFAULT_SSP_REG_CPSR, SSP_CPSR(pl022->virtbase)); in load_ssp_default_config()
574 writew(DISABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase)); in load_ssp_default_config()
575 writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase)); in load_ssp_default_config()
580 * set in pl022.
582 static void readwriter(struct pl022 *pl022) in readwriter() argument
595 dev_dbg(&pl022->adev->dev, in readwriter()
597 __func__, pl022->rx, pl022->rx_end, pl022->tx, pl022->tx_end); in readwriter()
600 while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) in readwriter()
601 && (pl022->rx < pl022->rx_end)) { in readwriter()
602 switch (pl022->read) { in readwriter()
604 readw(SSP_DR(pl022->virtbase)); in readwriter()
607 *(u8 *) (pl022->rx) = in readwriter()
608 readw(SSP_DR(pl022->virtbase)) & 0xFFU; in readwriter()
611 *(u16 *) (pl022->rx) = in readwriter()
612 (u16) readw(SSP_DR(pl022->virtbase)); in readwriter()
615 *(u32 *) (pl022->rx) = in readwriter()
616 readl(SSP_DR(pl022->virtbase)); in readwriter()
619 pl022->rx += (pl022->cur_chip->n_bytes); in readwriter()
620 pl022->exp_fifo_level--; in readwriter()
625 while ((pl022->exp_fifo_level < pl022->vendor->fifodepth) in readwriter()
626 && (pl022->tx < pl022->tx_end)) { in readwriter()
627 switch (pl022->write) { in readwriter()
629 writew(0x0, SSP_DR(pl022->virtbase)); in readwriter()
632 writew(*(u8 *) (pl022->tx), SSP_DR(pl022->virtbase)); in readwriter()
635 writew((*(u16 *) (pl022->tx)), SSP_DR(pl022->virtbase)); in readwriter()
638 writel(*(u32 *) (pl022->tx), SSP_DR(pl022->virtbase)); in readwriter()
641 pl022->tx += (pl022->cur_chip->n_bytes); in readwriter()
642 pl022->exp_fifo_level++; in readwriter()
649 while ((readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RNE) in readwriter()
650 && (pl022->rx < pl022->rx_end)) { in readwriter()
651 switch (pl022->read) { in readwriter()
653 readw(SSP_DR(pl022->virtbase)); in readwriter()
656 *(u8 *) (pl022->rx) = in readwriter()
657 readw(SSP_DR(pl022->virtbase)) & 0xFFU; in readwriter()
660 *(u16 *) (pl022->rx) = in readwriter()
661 (u16) readw(SSP_DR(pl022->virtbase)); in readwriter()
664 *(u32 *) (pl022->rx) = in readwriter()
665 readl(SSP_DR(pl022->virtbase)); in readwriter()
668 pl022->rx += (pl022->cur_chip->n_bytes); in readwriter()
669 pl022->exp_fifo_level--; in readwriter()
683 static void unmap_free_dma_scatter(struct pl022 *pl022) in unmap_free_dma_scatter() argument
686 dma_unmap_sg(pl022->dma_tx_channel->device->dev, pl022->sgt_tx.sgl, in unmap_free_dma_scatter()
687 pl022->sgt_tx.nents, DMA_TO_DEVICE); in unmap_free_dma_scatter()
688 dma_unmap_sg(pl022->dma_rx_channel->device->dev, pl022->sgt_rx.sgl, in unmap_free_dma_scatter()
689 pl022->sgt_rx.nents, DMA_FROM_DEVICE); in unmap_free_dma_scatter()
690 sg_free_table(&pl022->sgt_rx); in unmap_free_dma_scatter()
691 sg_free_table(&pl022->sgt_tx); in unmap_free_dma_scatter()
696 struct pl022 *pl022 = data; in dma_callback() local
698 BUG_ON(!pl022->sgt_rx.sgl); in dma_callback()
711 dma_sync_sg_for_cpu(&pl022->adev->dev, in dma_callback()
712 pl022->sgt_rx.sgl, in dma_callback()
713 pl022->sgt_rx.nents, in dma_callback()
716 for_each_sg(pl022->sgt_rx.sgl, sg, pl022->sgt_rx.nents, i) { in dma_callback()
717 dev_dbg(&pl022->adev->dev, "SPI RX SG ENTRY: %d", i); in dma_callback()
726 for_each_sg(pl022->sgt_tx.sgl, sg, pl022->sgt_tx.nents, i) { in dma_callback()
727 dev_dbg(&pl022->adev->dev, "SPI TX SG ENTRY: %d", i); in dma_callback()
739 unmap_free_dma_scatter(pl022); in dma_callback()
741 spi_finalize_current_transfer(pl022->host); in dma_callback()
744 static void setup_dma_scatter(struct pl022 *pl022, in setup_dma_scatter() argument
771 dev_dbg(&pl022->adev->dev, in setup_dma_scatter()
782 sg_set_page(sg, virt_to_page(pl022->dummypage), in setup_dma_scatter()
785 dev_dbg(&pl022->adev->dev, in setup_dma_scatter()
796 * @pl022: SSP driver's private data structure
798 static int configure_dma(struct pl022 *pl022) in configure_dma() argument
801 .src_addr = SSP_DR(pl022->phybase), in configure_dma()
806 .dst_addr = SSP_DR(pl022->phybase), in configure_dma()
813 struct dma_chan *rxchan = pl022->dma_rx_channel; in configure_dma()
814 struct dma_chan *txchan = pl022->dma_tx_channel; in configure_dma()
828 switch (pl022->rx_lev_trig) { in configure_dma()
845 rx_conf.src_maxburst = pl022->vendor->fifodepth >> 1; in configure_dma()
849 switch (pl022->tx_lev_trig) { in configure_dma()
866 tx_conf.dst_maxburst = pl022->vendor->fifodepth >> 1; in configure_dma()
870 switch (pl022->read) { in configure_dma()
886 switch (pl022->write) { in configure_dma()
913 pages = DIV_ROUND_UP(pl022->cur_transfer->len, PAGE_SIZE); in configure_dma()
914 dev_dbg(&pl022->adev->dev, "using %d pages for transfer\n", pages); in configure_dma()
916 ret = sg_alloc_table(&pl022->sgt_rx, pages, GFP_ATOMIC); in configure_dma()
920 ret = sg_alloc_table(&pl022->sgt_tx, pages, GFP_ATOMIC); in configure_dma()
925 setup_dma_scatter(pl022, pl022->rx, in configure_dma()
926 pl022->cur_transfer->len, &pl022->sgt_rx); in configure_dma()
927 setup_dma_scatter(pl022, pl022->tx, in configure_dma()
928 pl022->cur_transfer->len, &pl022->sgt_tx); in configure_dma()
931 rx_sglen = dma_map_sg(rxchan->device->dev, pl022->sgt_rx.sgl, in configure_dma()
932 pl022->sgt_rx.nents, DMA_FROM_DEVICE); in configure_dma()
936 tx_sglen = dma_map_sg(txchan->device->dev, pl022->sgt_tx.sgl, in configure_dma()
937 pl022->sgt_tx.nents, DMA_TO_DEVICE); in configure_dma()
943 pl022->sgt_rx.sgl, in configure_dma()
951 pl022->sgt_tx.sgl, in configure_dma()
960 rxdesc->callback_param = pl022; in configure_dma()
967 pl022->dma_running = true; in configure_dma()
975 dma_unmap_sg(txchan->device->dev, pl022->sgt_tx.sgl, in configure_dma()
976 pl022->sgt_tx.nents, DMA_TO_DEVICE); in configure_dma()
978 dma_unmap_sg(rxchan->device->dev, pl022->sgt_rx.sgl, in configure_dma()
979 pl022->sgt_rx.nents, DMA_FROM_DEVICE); in configure_dma()
981 sg_free_table(&pl022->sgt_tx); in configure_dma()
983 sg_free_table(&pl022->sgt_rx); in configure_dma()
988 static int pl022_dma_probe(struct pl022 *pl022) in pl022_dma_probe() argument
999 pl022->dma_rx_channel = dma_request_channel(mask, in pl022_dma_probe()
1000 pl022->host_info->dma_filter, in pl022_dma_probe()
1001 pl022->host_info->dma_rx_param); in pl022_dma_probe()
1002 if (!pl022->dma_rx_channel) { in pl022_dma_probe()
1003 dev_dbg(&pl022->adev->dev, "no RX DMA channel!\n"); in pl022_dma_probe()
1007 pl022->dma_tx_channel = dma_request_channel(mask, in pl022_dma_probe()
1008 pl022->host_info->dma_filter, in pl022_dma_probe()
1009 pl022->host_info->dma_tx_param); in pl022_dma_probe()
1010 if (!pl022->dma_tx_channel) { in pl022_dma_probe()
1011 dev_dbg(&pl022->adev->dev, "no TX DMA channel!\n"); in pl022_dma_probe()
1015 pl022->dummypage = kmalloc(PAGE_SIZE, GFP_KERNEL); in pl022_dma_probe()
1016 if (!pl022->dummypage) in pl022_dma_probe()
1019 dev_info(&pl022->adev->dev, "setup for DMA on RX %s, TX %s\n", in pl022_dma_probe()
1020 dma_chan_name(pl022->dma_rx_channel), in pl022_dma_probe()
1021 dma_chan_name(pl022->dma_tx_channel)); in pl022_dma_probe()
1026 dma_release_channel(pl022->dma_tx_channel); in pl022_dma_probe()
1028 dma_release_channel(pl022->dma_rx_channel); in pl022_dma_probe()
1029 pl022->dma_rx_channel = NULL; in pl022_dma_probe()
1031 dev_err(&pl022->adev->dev, in pl022_dma_probe()
1036 static int pl022_dma_autoprobe(struct pl022 *pl022) in pl022_dma_autoprobe() argument
1038 struct device *dev = &pl022->adev->dev; in pl022_dma_autoprobe()
1049 pl022->dma_rx_channel = chan; in pl022_dma_autoprobe()
1057 pl022->dma_tx_channel = chan; in pl022_dma_autoprobe()
1059 pl022->dummypage = kmalloc(PAGE_SIZE, GFP_KERNEL); in pl022_dma_autoprobe()
1060 if (!pl022->dummypage) { in pl022_dma_autoprobe()
1068 dma_release_channel(pl022->dma_tx_channel); in pl022_dma_autoprobe()
1069 pl022->dma_tx_channel = NULL; in pl022_dma_autoprobe()
1071 dma_release_channel(pl022->dma_rx_channel); in pl022_dma_autoprobe()
1072 pl022->dma_rx_channel = NULL; in pl022_dma_autoprobe()
1077 static void terminate_dma(struct pl022 *pl022) in terminate_dma() argument
1079 if (!pl022->dma_running) in terminate_dma()
1082 struct dma_chan *rxchan = pl022->dma_rx_channel; in terminate_dma()
1083 struct dma_chan *txchan = pl022->dma_tx_channel; in terminate_dma()
1087 unmap_free_dma_scatter(pl022); in terminate_dma()
1088 pl022->dma_running = false; in terminate_dma()
1091 static void pl022_dma_remove(struct pl022 *pl022) in pl022_dma_remove() argument
1093 terminate_dma(pl022); in pl022_dma_remove()
1094 if (pl022->dma_tx_channel) in pl022_dma_remove()
1095 dma_release_channel(pl022->dma_tx_channel); in pl022_dma_remove()
1096 if (pl022->dma_rx_channel) in pl022_dma_remove()
1097 dma_release_channel(pl022->dma_rx_channel); in pl022_dma_remove()
1098 kfree(pl022->dummypage); in pl022_dma_remove()
1102 static inline int configure_dma(struct pl022 *pl022) in configure_dma() argument
1107 static inline int pl022_dma_autoprobe(struct pl022 *pl022) in pl022_dma_autoprobe() argument
1112 static inline int pl022_dma_probe(struct pl022 *pl022) in pl022_dma_probe() argument
1117 static inline void terminate_dma(struct pl022 *pl022) in terminate_dma() argument
1121 static inline void pl022_dma_remove(struct pl022 *pl022) in pl022_dma_remove() argument
1141 struct pl022 *pl022 = dev_id; in pl022_interrupt_handler() local
1144 irq_status = readw(SSP_MIS(pl022->virtbase)); in pl022_interrupt_handler()
1159 dev_err(&pl022->adev->dev, "FIFO overrun\n"); in pl022_interrupt_handler()
1160 if (readw(SSP_SR(pl022->virtbase)) & SSP_SR_MASK_RFF) in pl022_interrupt_handler()
1161 dev_err(&pl022->adev->dev, in pl022_interrupt_handler()
1170 SSP_IMSC(pl022->virtbase)); in pl022_interrupt_handler()
1171 writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase)); in pl022_interrupt_handler()
1172 writew((readw(SSP_CR1(pl022->virtbase)) & in pl022_interrupt_handler()
1173 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); in pl022_interrupt_handler()
1174 pl022->cur_transfer->error |= SPI_TRANS_FAIL_IO; in pl022_interrupt_handler()
1175 spi_finalize_current_transfer(pl022->host); in pl022_interrupt_handler()
1179 readwriter(pl022); in pl022_interrupt_handler()
1181 if (pl022->tx == pl022->tx_end) { in pl022_interrupt_handler()
1183 writew((readw(SSP_IMSC(pl022->virtbase)) & in pl022_interrupt_handler()
1185 SSP_IMSC(pl022->virtbase)); in pl022_interrupt_handler()
1193 if (pl022->rx >= pl022->rx_end) { in pl022_interrupt_handler()
1195 SSP_IMSC(pl022->virtbase)); in pl022_interrupt_handler()
1196 writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase)); in pl022_interrupt_handler()
1197 if (unlikely(pl022->rx > pl022->rx_end)) { in pl022_interrupt_handler()
1198 dev_warn(&pl022->adev->dev, "read %u surplus " in pl022_interrupt_handler()
1201 (u32) (pl022->rx - pl022->rx_end)); in pl022_interrupt_handler()
1203 spi_finalize_current_transfer(pl022->host); in pl022_interrupt_handler()
1214 static int set_up_next_transfer(struct pl022 *pl022, in set_up_next_transfer() argument
1220 residue = pl022->cur_transfer->len % pl022->cur_chip->n_bytes; in set_up_next_transfer()
1222 dev_err(&pl022->adev->dev, in set_up_next_transfer()
1225 pl022->cur_transfer->len, in set_up_next_transfer()
1226 pl022->cur_chip->n_bytes); in set_up_next_transfer()
1227 dev_err(&pl022->adev->dev, "skipping this message\n"); in set_up_next_transfer()
1230 pl022->tx = (void *)transfer->tx_buf; in set_up_next_transfer()
1231 pl022->tx_end = pl022->tx + pl022->cur_transfer->len; in set_up_next_transfer()
1232 pl022->rx = (void *)transfer->rx_buf; in set_up_next_transfer()
1233 pl022->rx_end = pl022->rx + pl022->cur_transfer->len; in set_up_next_transfer()
1234 pl022->write = in set_up_next_transfer()
1235 pl022->tx ? pl022->cur_chip->write : WRITING_NULL; in set_up_next_transfer()
1236 pl022->read = pl022->rx ? pl022->cur_chip->read : READING_NULL; in set_up_next_transfer()
1240 static int do_interrupt_dma_transfer(struct pl022 *pl022) in do_interrupt_dma_transfer() argument
1250 ret = set_up_next_transfer(pl022, pl022->cur_transfer); in do_interrupt_dma_transfer()
1255 if (pl022->cur_chip->enable_dma) { in do_interrupt_dma_transfer()
1257 if (configure_dma(pl022)) { in do_interrupt_dma_transfer()
1258 dev_dbg(&pl022->adev->dev, in do_interrupt_dma_transfer()
1267 writew((readw(SSP_CR1(pl022->virtbase)) | SSP_CR1_MASK_SSE), in do_interrupt_dma_transfer()
1268 SSP_CR1(pl022->virtbase)); in do_interrupt_dma_transfer()
1269 writew(irqflags, SSP_IMSC(pl022->virtbase)); in do_interrupt_dma_transfer()
1273 static void print_current_status(struct pl022 *pl022) in print_current_status() argument
1278 if (pl022->vendor->extended_cr) in print_current_status()
1279 read_cr0 = readl(SSP_CR0(pl022->virtbase)); in print_current_status()
1281 read_cr0 = readw(SSP_CR0(pl022->virtbase)); in print_current_status()
1282 read_cr1 = readw(SSP_CR1(pl022->virtbase)); in print_current_status()
1283 read_dmacr = readw(SSP_DMACR(pl022->virtbase)); in print_current_status()
1284 read_sr = readw(SSP_SR(pl022->virtbase)); in print_current_status()
1286 dev_warn(&pl022->adev->dev, "spi-pl022 CR0: %x\n", read_cr0); in print_current_status()
1287 dev_warn(&pl022->adev->dev, "spi-pl022 CR1: %x\n", read_cr1); in print_current_status()
1288 dev_warn(&pl022->adev->dev, "spi-pl022 DMACR: %x\n", read_dmacr); in print_current_status()
1289 dev_warn(&pl022->adev->dev, "spi-pl022 SR: %x\n", read_sr); in print_current_status()
1290 dev_warn(&pl022->adev->dev, in print_current_status()
1291 "spi-pl022 exp_fifo_level/fifodepth: %u/%d\n", in print_current_status()
1292 pl022->exp_fifo_level, in print_current_status()
1293 pl022->vendor->fifodepth); in print_current_status()
1297 static int do_polling_transfer(struct pl022 *pl022) in do_polling_transfer() argument
1303 ret = set_up_next_transfer(pl022, pl022->cur_transfer); in do_polling_transfer()
1307 flush(pl022); in do_polling_transfer()
1308 writew((readw(SSP_CR1(pl022->virtbase)) | SSP_CR1_MASK_SSE), in do_polling_transfer()
1309 SSP_CR1(pl022->virtbase)); in do_polling_transfer()
1311 dev_dbg(&pl022->adev->dev, "polling transfer ongoing ...\n"); in do_polling_transfer()
1314 while (pl022->tx < pl022->tx_end || pl022->rx < pl022->rx_end) { in do_polling_transfer()
1316 readwriter(pl022); in do_polling_transfer()
1318 dev_warn(&pl022->adev->dev, in do_polling_transfer()
1320 print_current_status(pl022); in do_polling_transfer()
1332 struct pl022 *pl022 = spi_controller_get_devdata(host); in pl022_transfer_one() local
1334 pl022->cur_transfer = transfer; in pl022_transfer_one()
1337 pl022->cur_chip = spi_get_ctldata(spi); in pl022_transfer_one()
1338 pl022->cur_cs = spi_get_chipselect(spi, 0); in pl022_transfer_one()
1340 restore_state(pl022); in pl022_transfer_one()
1341 flush(pl022); in pl022_transfer_one()
1343 if (pl022->cur_chip->xfer_type == POLLING_TRANSFER) in pl022_transfer_one()
1344 return do_polling_transfer(pl022); in pl022_transfer_one()
1346 return do_interrupt_dma_transfer(pl022); in pl022_transfer_one()
1351 struct pl022 *pl022 = spi_controller_get_devdata(ctlr); in pl022_handle_err() local
1353 terminate_dma(pl022); in pl022_handle_err()
1354 writew(DISABLE_ALL_INTERRUPTS, SSP_IMSC(pl022->virtbase)); in pl022_handle_err()
1355 writew(CLEAR_ALL_INTERRUPTS, SSP_ICR(pl022->virtbase)); in pl022_handle_err()
1360 struct pl022 *pl022 = spi_controller_get_devdata(host); in pl022_unprepare_transfer_hardware() local
1363 writew((readw(SSP_CR1(pl022->virtbase)) & in pl022_unprepare_transfer_hardware()
1364 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); in pl022_unprepare_transfer_hardware()
1369 static int verify_controller_parameters(struct pl022 *pl022, in verify_controller_parameters() argument
1374 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1379 (!pl022->vendor->unidir)) { in verify_controller_parameters()
1380 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1387 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1394 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1405 if (pl022->vendor->fifodepth < 16) { in verify_controller_parameters()
1406 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1412 if (pl022->vendor->fifodepth < 32) { in verify_controller_parameters()
1413 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1419 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1430 if (pl022->vendor->fifodepth < 16) { in verify_controller_parameters()
1431 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1437 if (pl022->vendor->fifodepth < 32) { in verify_controller_parameters()
1438 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1444 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1451 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1457 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1462 if (pl022->vendor->extended_cr) { in verify_controller_parameters()
1467 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1473 dev_err(&pl022->adev->dev, in verify_controller_parameters()
1476 " ST version of PL022\n"); in verify_controller_parameters()
1489 static int calculate_effective_freq(struct pl022 *pl022, int freq, struct in calculate_effective_freq() argument
1497 rate = clk_get_rate(pl022->clk); in calculate_effective_freq()
1504 dev_warn(&pl022->adev->dev, in calculate_effective_freq()
1509 dev_err(&pl022->adev->dev, in calculate_effective_freq()
1551 WARN(!best_freq, "pl022: Matching cpsdvsr and scr not found for %d Hz rate \n", in calculate_effective_freq()
1556 dev_dbg(&pl022->adev->dev, in calculate_effective_freq()
1559 dev_dbg(&pl022->adev->dev, "SSP cpsdvsr = %d, scr = %d\n", in calculate_effective_freq()
1600 struct pl022 *pl022 = spi_controller_get_devdata(spi->controller); in pl022_setup() local
1627 of_property_read_u32(np, "pl022,interface", in pl022_setup()
1629 of_property_read_u32(np, "pl022,com-mode", in pl022_setup()
1631 of_property_read_u32(np, "pl022,rx-level-trig", in pl022_setup()
1633 of_property_read_u32(np, "pl022,tx-level-trig", in pl022_setup()
1635 of_property_read_u32(np, "pl022,ctrl-len", in pl022_setup()
1637 of_property_read_u32(np, "pl022,wait-state", in pl022_setup()
1639 of_property_read_u32(np, "pl022,duplex", in pl022_setup()
1659 status = calculate_effective_freq(pl022, in pl022_setup()
1678 status = verify_controller_parameters(pl022, chip_info); in pl022_setup()
1684 pl022->rx_lev_trig = chip_info->rx_lev_trig; in pl022_setup()
1685 pl022->tx_lev_trig = chip_info->tx_lev_trig; in pl022_setup()
1691 if ((bits <= 3) || (bits > pl022->vendor->max_bpw)) { in pl022_setup()
1695 pl022->vendor->max_bpw); in pl022_setup()
1720 && ((pl022->host_info)->enable_dma)) { in pl022_setup()
1739 if (pl022->vendor->extended_cr) { in pl022_setup()
1742 if (pl022->vendor->pl023) { in pl022_setup()
1747 /* These bits are in the PL022 but not PL023 */ in pl022_setup()
1795 if (pl022->vendor->loopback) { in pl022_setup()
1847 of_property_read_u32(np, "pl022,autosuspend-delay", in pl022_platform_data_dt_get()
1849 pd->rt = of_property_read_bool(np, "pl022,rt"); in pl022_platform_data_dt_get()
1860 struct pl022 *pl022 = NULL; /*Data for this driver */ in pl022_probe() local
1864 "ARM PL022 driver, device ID: 0x%08x\n", adev->periphid); in pl022_probe()
1874 host = spi_alloc_host(dev, sizeof(struct pl022)); in pl022_probe()
1880 pl022 = spi_controller_get_devdata(host); in pl022_probe()
1881 pl022->host = host; in pl022_probe()
1882 pl022->host_info = platform_info; in pl022_probe()
1883 pl022->adev = adev; in pl022_probe()
1884 pl022->vendor = id->data; in pl022_probe()
1904 * always MS bit first on the original pl022. in pl022_probe()
1907 if (pl022->vendor->extended_cr) in pl022_probe()
1916 pl022->phybase = adev->res.start; in pl022_probe()
1917 pl022->virtbase = devm_ioremap(dev, adev->res.start, in pl022_probe()
1919 if (pl022->virtbase == NULL) { in pl022_probe()
1924 &adev->res.start, pl022->virtbase); in pl022_probe()
1926 pl022->clk = devm_clk_get_enabled(&adev->dev, NULL); in pl022_probe()
1927 if (IS_ERR(pl022->clk)) { in pl022_probe()
1928 status = PTR_ERR(pl022->clk); in pl022_probe()
1934 writew((readw(SSP_CR1(pl022->virtbase)) & (~SSP_CR1_MASK_SSE)), in pl022_probe()
1935 SSP_CR1(pl022->virtbase)); in pl022_probe()
1936 load_ssp_default_config(pl022); in pl022_probe()
1939 0, "pl022", pl022); in pl022_probe()
1946 status = pl022_dma_autoprobe(pl022); in pl022_probe()
1956 status = pl022_dma_probe(pl022); in pl022_probe()
1962 amba_set_drvdata(adev, pl022); in pl022_probe()
1986 pl022_dma_remove(pl022); in pl022_probe()
1999 struct pl022 *pl022 = amba_get_drvdata(adev); in pl022_remove() local
2001 if (!pl022) in pl022_remove()
2010 load_ssp_default_config(pl022); in pl022_remove()
2011 if (pl022->host_info->enable_dma) in pl022_remove()
2012 pl022_dma_remove(pl022); in pl022_remove()
2020 struct pl022 *pl022 = dev_get_drvdata(dev); in pl022_suspend() local
2023 ret = spi_controller_suspend(pl022->host); in pl022_suspend()
2029 spi_controller_resume(pl022->host); in pl022_suspend()
2041 struct pl022 *pl022 = dev_get_drvdata(dev); in pl022_resume() local
2049 ret = spi_controller_resume(pl022->host); in pl022_resume()
2060 struct pl022 *pl022 = dev_get_drvdata(dev); in pl022_runtime_suspend() local
2062 clk_disable_unprepare(pl022->clk); in pl022_runtime_suspend()
2070 struct pl022 *pl022 = dev_get_drvdata(dev); in pl022_runtime_resume() local
2073 clk_prepare_enable(pl022->clk); in pl022_runtime_resume()
2127 * ARM PL022 variant, this has a 16bit wide
2146 * an official ARM number), this is a PL022 SSP block
2157 * PL022 variant that has a chip select control register whih
2171 .name = "ssp-pl022",
2192 MODULE_DESCRIPTION("PL022 SSP Controller Driver");