Lines Matching +full:ia32 +full:- +full:3 +full:a
1 /* SPDX-License-Identifier: GPL-2.0-only */
29 * handling of a memory error in userspace (we don't carry all the fields
31 * Currently, a length of 256 should be more than enough.
80 /* Non-Maskable Interrupt */
96 * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
103 * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
110 * CXL rev 3.0 section 8.2.9.2.1.3; Table 8-45
153 /* If set, the component must be re-initialized or re-enabled prior to use */
204 /* PCI/PCI-X Bus */
278 #define CPER_PCIE_SLOT_SHIFT 3
283 #define CPER_ARM_VALID_VENDOR_INFO BIT(3)
288 #define CPER_ARM_INFO_VALID_VIRT_ADDR BIT(3)
294 #define CPER_ARM_INFO_FLAGS_OVERFLOW BIT(3)
299 #define CPER_ARM_VENDOR_ERROR 3
305 #define CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT BIT(3)
318 #define CPER_ARM_ERR_OPERATION_MASK GENMASK(3,0)
341 * All tables and structs must be byte-packed to match CPER
401 /* IA32/X64 Processor Error Section, UEFI v2.7 sec N.2.4.2 */
408 /* IA32/X64 Processor Error Information Structure, UEFI v2.7 sec N.2.4.2.1 */
419 /* IA32/X64 Processor Context Information Structure, UEFI v2.7 sec N.2.4.2.2 */
434 u8 reserved[3]; /* must be zero */
437 u32 running_state; /* Bit 0 set - Processor running. PSCI = 0 */
481 /* Memory Error Section (UEFI >= v2.3), UEFI v2.8 sec N.2.5 */
546 u8 class_code[3];