Lines Matching +full:1 +full:hz

13 #define ADF4350_REG1	1
26 #define ADF4350_REG1_PRESCALER			(1 << 27)
29 #define ADF4350_REG2_COUNTER_RESET_EN		(1 << 3)
30 #define ADF4350_REG2_CP_THREESTATE_EN		(1 << 4)
31 #define ADF4350_REG2_POWER_DOWN_EN		(1 << 5)
32 #define ADF4350_REG2_PD_POLARITY_POS		(1 << 6)
33 #define ADF4350_REG2_LDP_6ns			(1 << 7)
36 #define ADF4350_REG2_LDF_INT_N			(1 << 8)
38 #define ADF4350_REG2_DOUBLE_BUFF_EN		(1 << 13)
40 #define ADF4350_REG2_RDIV2_EN			(1 << 24)
41 #define ADF4350_REG2_RMULT2_EN			(1 << 25)
45 #define ADF4350_MUXOUT_DVDD			1
55 #define ADF4350_REG3_12BIT_CSR_EN		(1 << 18)
56 #define ADF4351_REG3_CHARGE_CANCELLATION_EN	(1 << 21)
57 #define ADF4351_REG3_ANTI_BACKLASH_3ns_EN	(1 << 22)
58 #define ADF4351_REG3_BAND_SEL_CLOCK_MODE_HIGH	(1 << 23)
62 #define ADF4350_REG4_RF_OUT_EN			(1 << 5)
64 #define ADF4350_REG4_AUX_OUTPUT_EN		(1 << 8)
65 #define ADF4350_REG4_AUX_OUTPUT_FUND		(1 << 9)
67 #define ADF4350_REG4_MUTE_TILL_LOCK_EN		(1 << 10)
68 #define ADF4350_REG4_VCO_PWRDOWN_EN		(1 << 11)
72 #define ADF4350_REG4_FEEDBACK_FUND		(1 << 23)
76 #define ADF4350_REG5_LD_PIN_MODE_DIGITAL	(1 << 22)
80 #define ADF4350_MAX_OUT_FREQ		4400000000ULL /* Hz */
81 #define ADF4350_MIN_OUT_FREQ		137500000 /* Hz */
82 #define ADF4351_MIN_OUT_FREQ		34375000 /* Hz */
83 #define ADF4350_MIN_VCO_FREQ		2200000000ULL /* Hz */
84 #define ADF4350_MAX_FREQ_45_PRESC	3000000000ULL /* Hz */
85 #define ADF4350_MAX_FREQ_PFD		32000000 /* Hz */
86 #define ADF4350_MAX_BANDSEL_CLK		125000 /* Hz */
87 #define ADF4350_MAX_FREQ_REFIN		250000000 /* Hz */
95  * @clkin:		REFin frequency in Hz.
96  * @channel_spacing:	Channel spacing in Hz (influences MODULUS).
97  * @power_up_frequency:	Optional, If set in Hz the PLL tunes to the desired
103  * @r2_user_settings:	User defined settings for ADF4350/1 REGISTER_2.
104  * @r3_user_settings:	User defined settings for ADF4350/1 REGISTER_3.
105  * @r4_user_settings:	User defined settings for ADF4350/1 REGISTER_4.