1 /* SPDX-License-Identifier: GPL-2.0-or-later
21 #include <uapi/linux/spi/spi.h>
23 /* Max no. of CS supported per spi device */
36  * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
37  * and SPI infrastructure.
42  * struct spi_statistics - statistics for spi transfers
43  * @syncp:         seqcount to protect members in this struct for per-cpu update
44  *                 on 32-bit systems
46  * @messages:      number of spi-messages handled
95 		u64_stats_update_begin(&__lstats->syncp);		\
96 		u64_stats_add(&__lstats->field, count);			\
97 		u64_stats_update_end(&__lstats->syncp);			\
106 		u64_stats_update_begin(&__lstats->syncp);		\
107 		u64_stats_inc(&__lstats->field);			\
108 		u64_stats_update_end(&__lstats->syncp);			\
113  * struct spi_delay - SPI delay information
114  * @value: Value for the delay
115  * @unit: Unit for the delay
131  * struct spi_device - Controller side proxy for an SPI slave device
133  * @controller: SPI controller used with the device.
137  * @chip_select: Array of physical chipselect, spi->chipselect[i] gives
138  *	the corresponding physical CS for logical CS i.
139  * @mode: The spi mode defines how data is clocked out and in.
145  *	like eight or 12 bits are common.  In-memory wordsizes are
154  * @controller_data: Board-specific definitions for controller, such as
165  * @word_delay: delay to be inserted between consecutive
167  * @cs_setup: delay to be introduced by the controller after CS is asserted
168  * @cs_hold: delay to be introduced by the controller before CS is deasserted
169  * @cs_inactive: delay to be introduced by the controller after CS is
175  * A @spi_device is used to interchange data between an SPI slave
194 	 * TPM specification defines flow control over SPI. Client device
198 	 * only half-duplex, the wait state detection needs to be implemented
200 	 * control is expected from SPI controller.
206 	 * which is defined in 'include/uapi/linux/spi/spi.h'.
212 #define SPI_MODE_KERNEL_MASK	(~(BIT(29) - 1))
220 	struct spi_delay	word_delay; /* Inter-word delay */
221 	/* CS delays */
239 	 *  - memory packing (12 bit samples into low bits, others zeroed)
240 	 *  - priority
241 	 *  - chipselect delays
242 	 *  - ...
256 static inline struct spi_device *spi_dev_get(struct spi_device *spi)  in spi_dev_get()  argument
258 	return (spi && get_device(&spi->dev)) ? spi : NULL;  in spi_dev_get()
261 static inline void spi_dev_put(struct spi_device *spi)  in spi_dev_put()  argument
263 	if (spi)  in spi_dev_put()
264 		put_device(&spi->dev);  in spi_dev_put()
268 static inline void *spi_get_ctldata(const struct spi_device *spi)  in spi_get_ctldata()  argument
270 	return spi->controller_state;  in spi_get_ctldata()
273 static inline void spi_set_ctldata(struct spi_device *spi, void *state)  in spi_set_ctldata()  argument
275 	spi->controller_state = state;  in spi_set_ctldata()
280 static inline void spi_set_drvdata(struct spi_device *spi, void *data)  in spi_set_drvdata()  argument
282 	dev_set_drvdata(&spi->dev, data);  in spi_set_drvdata()
285 static inline void *spi_get_drvdata(const struct spi_device *spi)  in spi_get_drvdata()  argument
287 	return dev_get_drvdata(&spi->dev);  in spi_get_drvdata()
290 static inline u8 spi_get_chipselect(const struct spi_device *spi, u8 idx)  in spi_get_chipselect()  argument
292 	return spi->chip_select[idx];  in spi_get_chipselect()
295 static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect)  in spi_set_chipselect()  argument
297 	spi->chip_select[idx] = chipselect;  in spi_set_chipselect()
300 static inline struct gpio_desc *spi_get_csgpiod(const struct spi_device *spi, u8 idx)  in spi_get_csgpiod()  argument
302 	return spi->cs_gpiod[idx];  in spi_get_csgpiod()
305 static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod)  in spi_set_csgpiod()  argument
307 	spi->cs_gpiod[idx] = csgpiod;  in spi_set_csgpiod()
310 static inline bool spi_is_csgpiod(struct spi_device *spi)  in spi_is_csgpiod()  argument
315 		if (spi_get_csgpiod(spi, idx))  in spi_is_csgpiod()
322  * struct spi_driver - Host side "protocol" driver
323  * @id_table: List of SPI devices supported by this driver
324  * @probe: Binds this driver to the SPI device.  Drivers can verify
328  * @remove: Unbinds this driver from the SPI device
331  * @driver: SPI device drivers should initialize the name and owner
334  * This represents the kind of device driver that uses SPI messages to
335  * interact with the hardware at the other end of a SPI link.  It's called
337  * directly to SPI hardware (which is what the underlying SPI controller
348 	int			(*probe)(struct spi_device *spi);
349 	void			(*remove)(struct spi_device *spi);
350 	void			(*shutdown)(struct spi_device *spi);
360  * spi_unregister_driver - reverse effect of spi_register_driver
367 		driver_unregister(&sdrv->driver);  in spi_unregister_driver()
370 extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 chip_select);
377  * module_spi_driver() - Helper macro for registering a SPI driver
380  * Helper macro for SPI drivers which do not do anything special in module
389  * struct spi_controller - interface to SPI master or slave controller
392  * @bus_num: board-specific (and often SOC-specific) identifier for a
393  *	given SPI controller.
395  *	SPI slaves, and are numbered from zero to num_chipselects.
398  * @dma_alignment: SPI controller constraint on DMA buffers alignment.
403  *	supported. If set, the SPI core will reject any transfer with an
409  * @slave: indicates that this is an SPI slave controller
410  * @target: indicates that this is an SPI target controller
411  * @devm_allocated: whether the allocation of this struct is devres-managed
418  * @bus_lock_spinlock: spinlock for SPI bus locking
420  * @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
422  *	device's SPI controller; protocol code may call this.  This
426  * @set_cs_timing: optional hook for SPI devices to request SPI master
427  * controller for configuring specific CS setup time, hold time and inactive
428  * delay interms of clock counts
430  * @cleanup: frees controller-specific state
440  * @cur_msg: the currently in-flight message
441  * @cur_msg_completion: a completion for the current in-flight message
451  * @last_cs: the last chip_select that is recorded by set_cs, -1 on non chip
483  *                  - return 0 if the transfer is finished,
484  *                  - return 1 if the transfer is still in progress. When
489  *                    spi_transfer->error first, before calling
496  * @mem_ops: optimized/dedicated operations for interactions with SPI memory.
501  * @target_abort: abort the ongoing transfer request on an SPI target controller
502  * @cs_gpiods: Array of GPIO descriptors to use as chip select lines; one per CS
503  *	number. Any individual value may be NULL for CS lines that
504  *	are not GPIOs (driven by the SPI controller itself).
505  * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
506  *	GPIO descriptors. This will fill in @cs_gpiods and SPI devices will have
509  *	fill in this field with the first unused native CS, to be used by SPI
510  *	controller drivers that need to drive a native CS when using GPIO CS.
512  *	spi_register_controller() will validate all native CS (including the
513  *	unused native CS) against this value.
517  * @dummy_rx: dummy receive buffer for full-duplex devices
518  * @dummy_tx: dummy transmit buffer for full-duplex devices
523  *	time snapshot in @spi_transfer->ptp_sts as close as possible to the
524  *	moment in time when @spi_transfer->ptp_sts_word_pre and
525  *	@spi_transfer->ptp_sts_word_post were transmitted.
526  *	If the driver does not set this, the SPI core takes the snapshot as
527  *	close to the driver hand-over as possible.
532  * @defer_optimize_message: set to true if controller cannot pre-optimize messages
536  * Each SPI controller can communicate with one or more @spi_device
537  * children.  These make a small bus, sharing MOSI, MISO and SCK signals
542  * The driver for an SPI controller manages access to those devices through
544  * an SPI slave device.  For each such message it queues, it calls the
554 	 * board-specific. Usually that simplifies to being SoC-specific.
555 	 * example: one SoC has three SPI controllers, numbered 0..2,
556 	 * and one board's schematics might show it using SPI-2. Software
563 	 * might use board-specific GPIOs.
567 	/* Some SPI controllers pose alignment requirements on DMAable
580 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
581 #define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
594 #define SPI_CONTROLLER_GPIO_SS		BIT(5)	/* GPIO CS must select slave */
597 	 * The spi-controller has multi chip select capability and can
598 	 * assert/de-assert more than one chip select at once.
602 	/* Flag indicating if the allocation of this struct is devres-managed */
606 		/* Flag indicating this is an SPI slave controller */
608 		/* Flag indicating this is an SPI target controller */
616 	size_t (*max_transfer_size)(struct spi_device *spi);
617 	size_t (*max_message_size)(struct spi_device *spi);
622 	/* Used to avoid adding the same CS twice */
625 	/* Lock and mutex for SPI bus locking */
629 	/* Flag indicating that the SPI bus is locked for exclusive use */
633 	 * Setup mode and clock, etc (SPI driver may call many times).
639 	int			(*setup)(struct spi_device *spi);
642 	 * set_cs_timing() method is for SPI controllers that supports
643 	 * configuring CS timing.
645 	 * This hook allows SPI client drivers to request SPI controllers
646 	 * to configure specific CS timing through spi_set_cs_timing() after
649 	int (*set_cs_timing)(struct spi_device *spi);
656 	 * + For now there's no remove-from-queue operation, or
668 	 * + The message transfers use clock and SPI mode parameters
671 	int			(*transfer)(struct spi_device *spi,
675 	void			(*cleanup)(struct spi_device *spi);
685 					   struct spi_device *spi,
695 	 * Over time we expect SPI drivers to be phased over to this API.
733 	void (*set_cs)(struct spi_device *spi, bool enable);
734 	int (*transfer_one)(struct spi_controller *ctlr, struct spi_device *spi,
739 	/* Optimized handlers for SPI memory-like operations. */
760 	int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
763 	 * Driver sets this field to indicate it is able to snapshot SPI
779 	return dev_get_drvdata(&ctlr->dev);  in spi_controller_get_devdata()
785 	dev_set_drvdata(&ctlr->dev, data);  in spi_controller_set_devdata()
790 	if (!ctlr || !get_device(&ctlr->dev))  in spi_controller_get()
798 		put_device(&ctlr->dev);  in spi_controller_put()
803 	return IS_ENABLED(CONFIG_SPI_SLAVE) && ctlr->target;  in spi_controller_is_target()
823 /* The SPI driver core manages memory for the spi_controller classdev */
882 	return ERR_PTR(-ENODEV);  in acpi_spi_device_alloc()
892  * SPI resource management while processing a SPI message
900  * struct spi_res - SPI resource management structure
903  * @data:    extra data allocated for the specific use-case
905  * This is based on ideas from devres, but focused on life-cycle
914 /*---------------------------------------------------------------------------*/
917  * I/O INTERFACE between SPI controller and protocol drivers
925  * pointer.  (This is unlike most types of I/O API, because SPI hardware
934  * struct spi_transfer - a read/write buffer pair
935  * @tx_buf: data to be written (DMA-safe memory), or NULL
936  * @rx_buf: data to be read (DMA-safe memory), or NULL
951  * @cs_change_delay: delay between cs deassert and assert when
953  * @delay: delay to be introduced after this transfer before
956  * @word_delay: inter word delay to be introduced after each word size
958  * @effective_speed_hz: the effective SCK-speed that was used to
959  *      transfer this transfer. Set to 0 if the SPI bus driver does
967  *	within @tx_buf for which the SPI device is requesting that the time
968  *	snapshot for this transfer begins. Upon completing the SPI transfer,
977  *	purposefully (instead of setting to spi_transfer->len - 1) to denote
978  *	that a transfer-level snapshot taken from within the driver may still
980  * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
985  *	The timestamp must represent the time at which the SPI slave device has
990  * @error: Error status logged by SPI controller driver.
992  * SPI transfers always write the same number of bytes as they read.
1005  * In-memory data values are always in native CPU byte order, translated
1006  * from the wire byte order (big-endian except with SPI_LSB_FIRST).  So
1010  * When the word size of the SPI transfer is not a power-of-two multiple
1011  * of eight bits, those in-memory words include extra bits.  In-memory
1012  * words are always seen by protocol drivers as right-justified, so the
1015  * All SPI transfers start with the relevant chipselect active.  Normally
1026  * stay selected until the next transfer.  On multi-device SPI busses
1035  * When SPI can transfer in 1x,2x or 4x. It can get this transfer information
1036  * from device through @tx_nbits and @rx_nbits. In Bi-direction, these
1042  * Zero-initialize every field you don't set up explicitly, to
1074 #define	SPI_NBITS_SINGLE	0x01 /* 1-bit transfer */
1075 #define	SPI_NBITS_DUAL		0x02 /* 2-bit transfer */
1076 #define	SPI_NBITS_QUAD		0x04 /* 4-bit transfer */
1077 #define	SPI_NBITS_OCTAL	0x08 /* 8-bit transfer */
1079 	struct spi_delay	delay;  member
1095  * struct spi_message - one multi-segment SPI transaction
1097  * @spi: SPI device to which the transaction is queued
1098  * @pre_optimized: peripheral driver pre-optimized the message
1110  * @resources: for resource management when the SPI message is processed
1114  * in the sense that no other spi_message may use that SPI bus until that
1122  * Zero-initialize every field you don't set up explicitly, to
1129 	struct spi_device	*spi;  member
1145 	 * Some controller drivers (message-at-a-time queue processing)
1147 	 * others (with multi-message pipelines) could need a flag to
1171 	/* List of spi_res resources when the SPI message is processed */
1177 	INIT_LIST_HEAD(&m->transfers);  in spi_message_init_no_memset()
1178 	INIT_LIST_HEAD(&m->resources);  in spi_message_init_no_memset()
1190 	list_add_tail(&t->transfer_list, &m->transfers);  in spi_message_add_tail()
1196 	list_del(&t->transfer_list);  in spi_transfer_del()
1202 	return spi_delay_exec(&t->delay, t);  in spi_transfer_delay_exec()
1206  * spi_message_init_with_transfers - Initialize spi_message and append transfers
1208  * @xfers: An array of SPI transfers
1241 	spi_message_init_no_memset(&mwt->m);  in spi_message_alloc()
1243 		spi_message_add_tail(&mwt->t[i], &mwt->m);  in spi_message_alloc()
1245 	return &mwt->m;  in spi_message_alloc()
1253 extern int spi_optimize_message(struct spi_device *spi, struct spi_message *msg);
1255 extern int devm_spi_optimize_message(struct device *dev, struct spi_device *spi,
1258 extern int spi_setup(struct spi_device *spi);
1259 extern int spi_async(struct spi_device *spi, struct spi_message *message);
1260 extern int spi_target_abort(struct spi_device *spi);
1263 spi_max_message_size(struct spi_device *spi)  in spi_max_message_size()  argument
1265 	struct spi_controller *ctlr = spi->controller;  in spi_max_message_size()
1267 	if (!ctlr->max_message_size)  in spi_max_message_size()
1269 	return ctlr->max_message_size(spi);  in spi_max_message_size()
1273 spi_max_transfer_size(struct spi_device *spi)  in spi_max_transfer_size()  argument
1275 	struct spi_controller *ctlr = spi->controller;  in spi_max_transfer_size()
1277 	size_t msg_max = spi_max_message_size(spi);  in spi_max_transfer_size()
1279 	if (ctlr->max_transfer_size)  in spi_max_transfer_size()
1280 		tr_max = ctlr->max_transfer_size(spi);  in spi_max_transfer_size()
1287  * spi_is_bpw_supported - Check if bits per word is supported
1288  * @spi: SPI device
1291  * This function checks to see if the SPI controller supports @bpw.
1296 static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw)  in spi_is_bpw_supported()  argument
1298 	u32 bpw_mask = spi->controller->bits_per_word_mask;  in spi_is_bpw_supported()
1307  * spi_controller_xfer_timeout - Compute a suitable timeout value
1308  * @ctlr: SPI device
1320 	return max(xfer->len * 8 * 2 / (xfer->speed_hz / 1000), 500U);  in spi_controller_xfer_timeout()
1323 /*---------------------------------------------------------------------------*/
1325 /* SPI transfer replacement methods which make use of spi_res */
1332  * struct spi_replaced_transfers - structure describing the spi_transfer
1341  *                      are to get re-inserted
1343  * @inserted_transfers: array of spi_transfers of array-size @inserted,
1359 /*---------------------------------------------------------------------------*/
1361 /* SPI transfer transformation methods */
1370 /*---------------------------------------------------------------------------*/
1373  * All these synchronous SPI transfer routines are utilities layered
1378 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
1379 extern int spi_sync_locked(struct spi_device *spi, struct spi_message *message);
1384  * spi_sync_transfer - synchronous SPI data transfer
1385  * @spi: device with which data will be exchanged
1390  * Does a synchronous SPI data transfer of the given spi_transfer array.
1397 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,  in spi_sync_transfer()  argument
1404 	return spi_sync(spi, &msg);  in spi_sync_transfer()
1408  * spi_write - SPI synchronous write
1409  * @spi: device to which data will be written
1420 spi_write(struct spi_device *spi, const void *buf, size_t len)  in spi_write()  argument
1427 	return spi_sync_transfer(spi, &t, 1);  in spi_write()
1431  * spi_read - SPI synchronous read
1432  * @spi: device from which data will be read
1443 spi_read(struct spi_device *spi, void *buf, size_t len)  in spi_read()  argument
1450 	return spi_sync_transfer(spi, &t, 1);  in spi_read()
1454 extern int spi_write_then_read(struct spi_device *spi,
1459  * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
1460  * @spi: device with which data will be exchanged
1469 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)  in spi_w8r8()  argument
1474 	status = spi_write_then_read(spi, &cmd, 1, &result, 1);  in spi_w8r8()
1481  * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
1482  * @spi: device with which data will be exchanged
1486  * The number is returned in wire-order, which is at least sometimes
1487  * big-endian.
1494 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)  in spi_w8r16()  argument
1499 	status = spi_write_then_read(spi, &cmd, 1, &result, 2);  in spi_w8r16()
1506  * spi_w8r16be - SPI synchronous 8 bit write followed by 16 bit big-endian read
1507  * @spi: device with which data will be exchanged
1512  * convert the read 16 bit data word from big-endian to native endianness.
1519 static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)  in spi_w8r16be()  argument
1525 	status = spi_write_then_read(spi, &cmd, 1, &result, 2);  in spi_w8r16be()
1532 /*---------------------------------------------------------------------------*/
1535  * INTERFACE between board init code and SPI infrastructure.
1537  * No SPI driver ever sees these SPI device table segments, but
1538  * it's how the SPI core (or adapters that get hotplugged) grows
1541  * As a rule, SPI devices can't be probed.  Instead, board init code
1544  * support for non-static configurations too; enough to handle adding
1545  * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
1549  * struct spi_board_info - board-specific template for a SPI device
1552  *	data stored there is driver-specific.
1558  *	from the chip datasheet and board-specific signal quality issues.
1567  * When adding new SPI devices to the device tree, these structures serve
1573  * be stored in tables of board-specific device descriptors, which are
1619 	 *  - quirks like clock rate mattering when not selected
1627 /* Board init code may ignore whether SPI is configured or not */
1649 spi_add_device(struct spi_device *spi);
1654 extern void spi_unregister_device(struct spi_device *spi);
1665 	return list_is_last(&xfer->transfer_list, &ctlr->cur_msg->transfers);  in spi_transfer_is_last()