Lines Matching full:15

133 #define RT5660_L_MUTE				(0x1 << 15)
134 #define RT5660_L_MUTE_SFT			15
147 #define RT5660_IN_DF1				(0x1 << 15)
148 #define RT5660_IN_SFT1				15
157 #define RT5660_IN_DF3				(0x1 << 15)
158 #define RT5660_IN_SFT3				15
195 #define RT5660_M_ADCMIX_L			(0x1 << 15)
196 #define RT5660_M_ADCMIX_L_SFT			15
363 #define RT5660_PWR_I2S1				(0x1 << 15)
364 #define RT5660_PWR_I2S1_BIT			15
377 #define RT5660_PWR_ADC_S1F			(0x1 << 15)
378 #define RT5660_PWR_ADC_S1F_BIT			15
383 #define RT5660_PWR_VREF1			(0x1 << 15)
384 #define RT5660_PWR_VREF1_BIT			15
405 #define RT5660_PWR_BST1				(0x1 << 15)
406 #define RT5660_PWR_BST1_BIT			15
419 #define RT5660_PWR_OM_L				(0x1 << 15)
420 #define RT5660_PWR_OM_L_BIT			15
431 #define RT5660_PWR_SV				(0x1 << 15)
432 #define RT5660_PWR_SV_BIT			15
439 #define RT5660_I2S_MS_MASK			(0x1 << 15)
440 #define RT5660_I2S_MS_SFT			15
441 #define RT5660_I2S_MS_M				(0x0 << 15)
442 #define RT5660_I2S_MS_S				(0x1 << 15)
471 #define RT5660_I2S_BCLK_MS1_MASK		(0x1 << 15)
472 #define RT5660_I2S_BCLK_MS1_SFT			15
473 #define RT5660_I2S_BCLK_MS1_32			(0x0 << 15)
474 #define RT5660_I2S_BCLK_MS1_64			(0x1 << 15)
509 #define RT5660_DMIC_1_EN_MASK			(0x1 << 15)
510 #define RT5660_DMIC_1_EN_SFT			15
511 #define RT5660_DMIC_1_DIS			(0x0 << 15)
512 #define RT5660_DMIC_1_EN			(0x1 << 15)
588 #define RT5660_SPKVDD_DET_MASK			(0x1 << 15)
589 #define RT5660_SPKVDD_DET_SFT			15
590 #define RT5660_SPKVDD_DET_DIS			(0x0 << 15)
591 #define RT5660_SPKVDD_DET_EN			(0x1 << 15)
598 #define RT5660_MIC1_BS_MASK			(0x1 << 15)
599 #define RT5660_MIC1_BS_SFT			15
600 #define RT5660_MIC1_BS_9AV			(0x0 << 15)
601 #define RT5660_MIC1_BS_75AV			(0x1 << 15)
630 #define RT5660_EQ_SRC_MASK			(0x1 << 15)
631 #define RT5660_EQ_SRC_SFT			15
632 #define RT5660_EQ_SRC_DAC			(0x0 << 15)
633 #define RT5660_EQ_SRC_ADC			(0x1 << 15)
661 #define RT5660_IRQ_JD_MASK			(0x1 << 15)
662 #define RT5660_IRQ_JD_SFT			15
663 #define RT5660_IRQ_JD_BP			(0x0 << 15)
664 #define RT5660_IRQ_JD_NOR			(0x1 << 15)
687 #define RT5660_IRQ_MB1_OC_MASK			(0x1 << 15)
688 #define RT5660_IRQ_MB1_OC_SFT			15
689 #define RT5660_IRQ_MB1_OC_BP			(0x0 << 15)
690 #define RT5660_IRQ_MB1_OC_NOR			(0x1 << 15)
758 #define RT5660_SV_MASK				(0x1 << 15)
759 #define RT5660_SV_SFT				15
760 #define RT5660_SV_DIS				(0x0 << 15)
761 #define RT5660_SV_EN				(0x1 << 15)
782 #define RT5660_ZCD_SPO_MASK			(0x1 << 15)
783 #define RT5660_ZCD_SPO_SFT			15
784 #define RT5660_ZCD_SPO_DIS			(0x0 << 15)
785 #define RT5660_ZCD_SPO_EN			(0x1 << 15)