3  *  STM32 ALSA SoC Digital Audio Interface (I2S) driver.
143 /* Registers below apply to I2S version 1.1 and more */
208  * struct stm32_i2s_data - private data of I2S
209  * @conf: I2S configuration pointer
210  * @regmap: I2S register map pointer
216  * @i2sclk: kernel clock feeding the I2S clock generator
217  * @i2smclk: master clock from I2S mclk provider
219  * @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
220  * @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
222  * @phys_addr: I2S registers physical base address
230  * @i2s_clk_flg: flag set while exclusivity on I2S kernel clock is active
231  * @refcount: keep count of opened streams on I2S
233  * @set_i2s_clk_rate: set I2S kernel clock rate
234  * @put_i2s_clk_rate: put I2S kernel clock rate
261 	int (*set_i2s_clk_rate)(struct stm32_i2s_data *i2s, unsigned int rate);
262 	void (*put_i2s_clk_rate)(struct stm32_i2s_data *i2s);
266  * struct stm32_i2s_conf - I2S configuration
268  * @get_i2s_clk_parent: get parent clock of I2S kernel clock
272 	int (*get_i2s_clk_parent)(struct stm32_i2s_data *i2s);
283 static int stm32_i2s_get_parent_clk(struct stm32_i2s_data *i2s);
285 static int stm32_i2s_calc_clk_div(struct stm32_i2s_data *i2s,  in stm32_i2s_calc_clk_div()  argument
303 		dev_dbg(&i2s->pdev->dev, "Divider: 2*%d(div)+%d(odd) = %d\n",  in stm32_i2s_calc_clk_div()
307 	/* Division by three is not allowed by I2S prescaler */  in stm32_i2s_calc_clk_div()
309 		dev_err(&i2s->pdev->dev, "Wrong divider setting\n");  in stm32_i2s_calc_clk_div()
314 		dev_dbg(&i2s->pdev->dev,  in stm32_i2s_calc_clk_div()
318 	i2s->div = div;  in stm32_i2s_calc_clk_div()
319 	i2s->odd = odd;  in stm32_i2s_calc_clk_div()
320 	i2s->divider = divider;  in stm32_i2s_calc_clk_div()
325 static int stm32_i2s_set_clk_div(struct stm32_i2s_data *i2s)  in stm32_i2s_set_clk_div()  argument
329 	cgfr = I2S_CGFR_I2SDIV_SET(i2s->div) | (i2s->odd << I2S_CGFR_ODD_SHIFT);  in stm32_i2s_set_clk_div()
332 	return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2s_set_clk_div()
336 static bool stm32_i2s_rate_accurate(struct stm32_i2s_data *i2s,  in stm32_i2s_rate_accurate()  argument
339 	struct platform_device *pdev = i2s->pdev;  in stm32_i2s_rate_accurate()
363 static int stm32_i2s_set_parent_clock(struct stm32_i2s_data *i2s,  in stm32_i2s_set_parent_clock()  argument
366 	struct platform_device *pdev = i2s->pdev;  in stm32_i2s_set_parent_clock()
371 		parent_clk = i2s->x11kclk;  in stm32_i2s_set_parent_clock()
373 		parent_clk = i2s->x8kclk;  in stm32_i2s_set_parent_clock()
375 	ret = clk_set_parent(i2s->i2sclk, parent_clk);  in stm32_i2s_set_parent_clock()
383 static void stm32_i2s_put_parent_rate(struct stm32_i2s_data *i2s)  in stm32_i2s_put_parent_rate()  argument
385 	if (i2s->i2s_clk_flg) {  in stm32_i2s_put_parent_rate()
386 		i2s->i2s_clk_flg = false;  in stm32_i2s_put_parent_rate()
387 		clk_rate_exclusive_put(i2s->i2sclk);  in stm32_i2s_put_parent_rate()
391 static int stm32_i2s_set_parent_rate(struct stm32_i2s_data *i2s,  in stm32_i2s_set_parent_rate()  argument
394 	struct platform_device *pdev = i2s->pdev;  in stm32_i2s_set_parent_rate()
413 	if (!i2s->i2smclk)  in stm32_i2s_set_parent_rate()
416 	/* Request exclusivity, as the clock may be shared by I2S instances */  in stm32_i2s_set_parent_rate()
417 	clk_rate_exclusive_get(i2s->i2sclk);  in stm32_i2s_set_parent_rate()
418 	i2s->i2s_clk_flg = true;  in stm32_i2s_set_parent_rate()
424 	i2s_curr_rate = clk_get_rate(i2s->i2sclk);  in stm32_i2s_set_parent_rate()
425 	if (stm32_i2s_rate_accurate(i2s, i2s_clk_max_rate, i2s_curr_rate))  in stm32_i2s_set_parent_rate()
437 		i2s_new_rate = clk_round_rate(i2s->i2sclk, i2s_clk_rate);  in stm32_i2s_set_parent_rate()
438 		if (stm32_i2s_rate_accurate(i2s, i2s_clk_rate, i2s_new_rate)) {  in stm32_i2s_set_parent_rate()
439 			ret = clk_set_rate(i2s->i2sclk, i2s_clk_rate);  in stm32_i2s_set_parent_rate()
459 	stm32_i2s_put_parent_rate(i2s);  in stm32_i2s_set_parent_rate()
468 	struct stm32_i2s_data *i2s = mclk->i2s_data;  in stm32_i2smclk_round_rate()  local
471 	ret = stm32_i2s_calc_clk_div(i2s, *prate, rate);  in stm32_i2smclk_round_rate()
475 	mclk->freq = *prate / i2s->divider;  in stm32_i2smclk_round_rate()
492 	struct stm32_i2s_data *i2s = mclk->i2s_data;  in stm32_i2smclk_set_rate()  local
495 	ret = stm32_i2s_calc_clk_div(i2s, parent_rate, rate);  in stm32_i2smclk_set_rate()
499 	ret = stm32_i2s_set_clk_div(i2s);  in stm32_i2smclk_set_rate()
511 	struct stm32_i2s_data *i2s = mclk->i2s_data;  in stm32_i2smclk_enable()  local
513 	dev_dbg(&i2s->pdev->dev, "Enable master clock\n");  in stm32_i2smclk_enable()
515 	return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2smclk_enable()
522 	struct stm32_i2s_data *i2s = mclk->i2s_data;  in stm32_i2smclk_disable()  local
524 	dev_dbg(&i2s->pdev->dev, "Disable master clock\n");  in stm32_i2smclk_disable()
526 	regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, I2S_CGFR_MCKOE, 0);  in stm32_i2smclk_disable()
537 static int stm32_i2s_add_mclk_provider(struct stm32_i2s_data *i2s)  in stm32_i2s_add_mclk_provider()  argument
541 	struct device *dev = &i2s->pdev->dev;  in stm32_i2s_add_mclk_provider()
542 	const char *pname = __clk_get_name(i2s->i2sclk);  in stm32_i2s_add_mclk_provider()
567 	mclk->i2s_data = i2s;  in stm32_i2s_add_mclk_provider()
571 	ret = devm_clk_hw_register(&i2s->pdev->dev, hw);  in stm32_i2s_add_mclk_provider()
576 	i2s->i2smclk = hw->clk;  in stm32_i2s_add_mclk_provider()
584 	struct stm32_i2s_data *i2s = (struct stm32_i2s_data *)devid;  in stm32_i2s_isr()  local
585 	struct platform_device *pdev = i2s->pdev;  in stm32_i2s_isr()
590 	regmap_read(i2s->regmap, STM32_I2S_SR_REG, &sr);  in stm32_i2s_isr()
591 	regmap_read(i2s->regmap, STM32_I2S_IER_REG, &ier);  in stm32_i2s_isr()
600 	regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,  in stm32_i2s_isr()
616 	spin_lock(&i2s->irq_lock);  in stm32_i2s_isr()
617 	if (err && i2s->substream)  in stm32_i2s_isr()
618 		snd_pcm_stop_xrun(i2s->substream);  in stm32_i2s_isr()
619 	spin_unlock(&i2s->irq_lock);  in stm32_i2s_isr()
673 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_set_dai_fmt()  local
697 	/* DSP_B not mapped on I2S PCM long format. 1 bit offset does not fit */  in stm32_i2s_set_dai_fmt()
727 		i2s->ms_flg = I2S_MS_SLAVE;  in stm32_i2s_set_dai_fmt()
730 		i2s->ms_flg = I2S_MS_MASTER;  in stm32_i2s_set_dai_fmt()
738 	i2s->fmt = fmt;  in stm32_i2s_set_dai_fmt()
739 	return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2s_set_dai_fmt()
746 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_set_sysclk()  local
749 	dev_dbg(cpu_dai->dev, "I2S MCLK frequency is %uHz. mode: %s, dir: %s\n",  in stm32_i2s_set_sysclk()
750 		freq, STM32_I2S_IS_MASTER(i2s) ? "master" : "slave",  in stm32_i2s_set_sysclk()
754 	if (dir == SND_SOC_CLOCK_OUT && STM32_I2S_IS_MASTER(i2s)) {  in stm32_i2s_set_sysclk()
755 		if (!i2s->i2smclk) {  in stm32_i2s_set_sysclk()
763 			if (i2s->mclk_rate) {  in stm32_i2s_set_sysclk()
764 				clk_rate_exclusive_put(i2s->i2smclk);  in stm32_i2s_set_sysclk()
765 				i2s->mclk_rate = 0;  in stm32_i2s_set_sysclk()
768 			if (i2s->put_i2s_clk_rate)  in stm32_i2s_set_sysclk()
769 				i2s->put_i2s_clk_rate(i2s);  in stm32_i2s_set_sysclk()
771 			return regmap_update_bits(i2s->regmap,  in stm32_i2s_set_sysclk()
776 		ret = i2s->set_i2s_clk_rate(i2s, freq);  in stm32_i2s_set_sysclk()
779 		ret = clk_set_rate_exclusive(i2s->i2smclk, freq);  in stm32_i2s_set_sysclk()
784 		ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2s_set_sysclk()
787 			i2s->mclk_rate = freq;  in stm32_i2s_set_sysclk()
796 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_configure_clock()  local
803 	if (!i2s->mclk_rate) {  in stm32_i2s_configure_clock()
804 		ret = i2s->set_i2s_clk_rate(i2s, rate);  in stm32_i2s_configure_clock()
808 	i2s_clock_rate = clk_get_rate(i2s->i2sclk);  in stm32_i2s_configure_clock()
812 	 *   i2s mode : mclk_ratio = 256  in stm32_i2s_configure_clock()
816 	 *   i2s mode : div = i2s_clk / (mclk_ratio * ws)  in stm32_i2s_configure_clock()
819 	 *   i2s mode : div = i2s_clk / (nb_bits x ws)  in stm32_i2s_configure_clock()
822 	if (i2s->mclk_rate) {  in stm32_i2s_configure_clock()
823 		ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate,  in stm32_i2s_configure_clock()
824 					     i2s->mclk_rate);  in stm32_i2s_configure_clock()
829 		if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) ==  in stm32_i2s_configure_clock()
834 		ret = regmap_read(i2s->regmap, STM32_I2S_CGFR_REG, &cgfr);  in stm32_i2s_configure_clock()
839 		ret = stm32_i2s_calc_clk_div(i2s, i2s_clock_rate,  in stm32_i2s_configure_clock()
845 	ret = stm32_i2s_set_clk_div(i2s);  in stm32_i2s_configure_clock()
850 	return regmap_update_bits(i2s->regmap, STM32_I2S_CFG2_REG,  in stm32_i2s_configure_clock()
858 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_configure()  local
879 	if (STM32_I2S_IS_SLAVE(i2s)) {  in stm32_i2s_configure()
890 	ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2s_configure()
898 	return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,  in stm32_i2s_configure()
905 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_startup()  local
909 	spin_lock_irqsave(&i2s->irq_lock, flags);  in stm32_i2s_startup()
910 	i2s->substream = substream;  in stm32_i2s_startup()
911 	spin_unlock_irqrestore(&i2s->irq_lock, flags);  in stm32_i2s_startup()
913 	if ((i2s->fmt & SND_SOC_DAIFMT_FORMAT_MASK) != SND_SOC_DAIFMT_DSP_A)  in stm32_i2s_startup()
917 	ret = clk_prepare_enable(i2s->i2sclk);  in stm32_i2s_startup()
923 	return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,  in stm32_i2s_startup()
931 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_hw_params()  local
940 	if (STM32_I2S_IS_MASTER(i2s))  in stm32_i2s_hw_params()
949 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_trigger()  local
958 		/* Enable i2s */  in stm32_i2s_trigger()
959 		dev_dbg(cpu_dai->dev, "start I2S %s\n",  in stm32_i2s_trigger()
963 		regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,  in stm32_i2s_trigger()
966 		ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,  in stm32_i2s_trigger()
969 			dev_err(cpu_dai->dev, "Error %d enabling I2S\n", ret);  in stm32_i2s_trigger()
973 		ret = regmap_write_bits(i2s->regmap, STM32_I2S_CR1_REG,  in stm32_i2s_trigger()
976 			dev_err(cpu_dai->dev, "Error %d starting I2S\n", ret);  in stm32_i2s_trigger()
980 		regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,  in stm32_i2s_trigger()
983 		spin_lock(&i2s->lock_fd);  in stm32_i2s_trigger()
984 		i2s->refcount++;  in stm32_i2s_trigger()
990 			if (STM32_I2S_IS_MASTER(i2s) && i2s->refcount == 1)  in stm32_i2s_trigger()
992 				regmap_write(i2s->regmap,  in stm32_i2s_trigger()
995 		spin_unlock(&i2s->lock_fd);  in stm32_i2s_trigger()
997 		if (STM32_I2S_IS_SLAVE(i2s))  in stm32_i2s_trigger()
1000 		regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG, ier, ier);  in stm32_i2s_trigger()
1005 		dev_dbg(cpu_dai->dev, "stop I2S %s\n",  in stm32_i2s_trigger()
1009 			regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG,  in stm32_i2s_trigger()
1013 			regmap_update_bits(i2s->regmap, STM32_I2S_IER_REG,  in stm32_i2s_trigger()
1017 		spin_lock(&i2s->lock_fd);  in stm32_i2s_trigger()
1018 		i2s->refcount--;  in stm32_i2s_trigger()
1019 		if (i2s->refcount) {  in stm32_i2s_trigger()
1020 			spin_unlock(&i2s->lock_fd);  in stm32_i2s_trigger()
1024 		ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,  in stm32_i2s_trigger()
1027 			dev_err(cpu_dai->dev, "Error %d disabling I2S\n", ret);  in stm32_i2s_trigger()
1028 			spin_unlock(&i2s->lock_fd);  in stm32_i2s_trigger()
1031 		spin_unlock(&i2s->lock_fd);  in stm32_i2s_trigger()
1034 		regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,  in stm32_i2s_trigger()
1047 	struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);  in stm32_i2s_shutdown()  local
1050 	clk_disable_unprepare(i2s->i2sclk);  in stm32_i2s_shutdown()
1057 	if (!i2s->i2smclk && i2s->put_i2s_clk_rate)  in stm32_i2s_shutdown()
1058 		i2s->put_i2s_clk_rate(i2s);  in stm32_i2s_shutdown()
1060 	spin_lock_irqsave(&i2s->irq_lock, flags);  in stm32_i2s_shutdown()
1061 	i2s->substream = NULL;  in stm32_i2s_shutdown()
1062 	spin_unlock_irqrestore(&i2s->irq_lock, flags);  in stm32_i2s_shutdown()
1067 	struct stm32_i2s_data *i2s = dev_get_drvdata(cpu_dai->dev);  in stm32_i2s_dai_probe()  local
1068 	struct snd_dmaengine_dai_dma_data *dma_data_tx = &i2s->dma_data_tx;  in stm32_i2s_dai_probe()
1069 	struct snd_dmaengine_dai_dma_data *dma_data_rx = &i2s->dma_data_rx;  in stm32_i2s_dai_probe()
1073 	dma_data_tx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_TXDR_REG;  in stm32_i2s_dai_probe()
1076 	dma_data_rx->addr = (dma_addr_t)(i2s->phys_addr) + STM32_I2S_RXDR_REG;  in stm32_i2s_dai_probe()
1123 	.name = "stm32-i2s",
1139 			       struct stm32_i2s_data *i2s)  in stm32_i2s_dais_init()  argument
1152 	i2s->dai_drv = dai_ptr;  in stm32_i2s_dais_init()
1167 	{ .compatible = "st,stm32h7-i2s", .data = &stm32_i2s_conf_h7 },
1168 	{ .compatible = "st,stm32mp25-i2s", .data = &stm32_i2s_conf_mp25 },
1172 static int stm32_i2s_get_parent_clk(struct stm32_i2s_data *i2s)  in stm32_i2s_get_parent_clk()  argument
1174 	struct device *dev = &i2s->pdev->dev;  in stm32_i2s_get_parent_clk()
1176 	i2s->x8kclk = devm_clk_get(dev, "x8k");  in stm32_i2s_get_parent_clk()
1177 	if (IS_ERR(i2s->x8kclk))  in stm32_i2s_get_parent_clk()
1178 		return dev_err_probe(dev, PTR_ERR(i2s->x8kclk), "Cannot get x8k parent clock\n");  in stm32_i2s_get_parent_clk()
1180 	i2s->x11kclk = devm_clk_get(dev, "x11k");  in stm32_i2s_get_parent_clk()
1181 	if (IS_ERR(i2s->x11kclk))  in stm32_i2s_get_parent_clk()
1182 		return dev_err_probe(dev, PTR_ERR(i2s->x11kclk), "Cannot get x11k parent clock\n");  in stm32_i2s_get_parent_clk()
1188 			      struct stm32_i2s_data *i2s)  in stm32_i2s_parse_dt()  argument
1198 	i2s->conf = device_get_match_data(&pdev->dev);  in stm32_i2s_parse_dt()
1199 	if (!i2s->conf)  in stm32_i2s_parse_dt()
1202 	i2s->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in stm32_i2s_parse_dt()
1203 	if (IS_ERR(i2s->base))  in stm32_i2s_parse_dt()
1204 		return PTR_ERR(i2s->base);  in stm32_i2s_parse_dt()
1206 	i2s->phys_addr = res->start;  in stm32_i2s_parse_dt()
1209 	i2s->pclk = devm_clk_get(&pdev->dev, "pclk");  in stm32_i2s_parse_dt()
1210 	if (IS_ERR(i2s->pclk))  in stm32_i2s_parse_dt()
1211 		return dev_err_probe(&pdev->dev, PTR_ERR(i2s->pclk),  in stm32_i2s_parse_dt()
1214 	i2s->i2sclk = devm_clk_get(&pdev->dev, "i2sclk");  in stm32_i2s_parse_dt()
1215 	if (IS_ERR(i2s->i2sclk))  in stm32_i2s_parse_dt()
1216 		return dev_err_probe(&pdev->dev, PTR_ERR(i2s->i2sclk),  in stm32_i2s_parse_dt()
1219 	if (i2s->conf->get_i2s_clk_parent) {  in stm32_i2s_parse_dt()
1220 		i2s->set_i2s_clk_rate = stm32_i2s_set_parent_clock;  in stm32_i2s_parse_dt()
1222 		i2s->set_i2s_clk_rate = stm32_i2s_set_parent_rate;  in stm32_i2s_parse_dt()
1223 		i2s->put_i2s_clk_rate = stm32_i2s_put_parent_rate;  in stm32_i2s_parse_dt()
1226 	if (i2s->conf->get_i2s_clk_parent) {  in stm32_i2s_parse_dt()
1227 		ret = i2s->conf->get_i2s_clk_parent(i2s);  in stm32_i2s_parse_dt()
1234 		ret = stm32_i2s_add_mclk_provider(i2s);  in stm32_i2s_parse_dt()
1245 			       dev_name(&pdev->dev), i2s);  in stm32_i2s_parse_dt()
1273 	struct stm32_i2s_data *i2s;  in stm32_i2s_probe()  local
1277 	i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);  in stm32_i2s_probe()
1278 	if (!i2s)  in stm32_i2s_probe()
1281 	i2s->pdev = pdev;  in stm32_i2s_probe()
1282 	i2s->ms_flg = I2S_MS_NOT_SET;  in stm32_i2s_probe()
1283 	spin_lock_init(&i2s->lock_fd);  in stm32_i2s_probe()
1284 	spin_lock_init(&i2s->irq_lock);  in stm32_i2s_probe()
1285 	platform_set_drvdata(pdev, i2s);  in stm32_i2s_probe()
1287 	ret = stm32_i2s_parse_dt(pdev, i2s);  in stm32_i2s_probe()
1291 	ret = stm32_i2s_dais_init(pdev, i2s);  in stm32_i2s_probe()
1295 	i2s->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "pclk",  in stm32_i2s_probe()
1296 						i2s->base, i2s->conf->regmap_conf);  in stm32_i2s_probe()
1297 	if (IS_ERR(i2s->regmap))  in stm32_i2s_probe()
1298 		return dev_err_probe(&pdev->dev, PTR_ERR(i2s->regmap),  in stm32_i2s_probe()
1306 					 i2s->dai_drv, 1);  in stm32_i2s_probe()
1312 	/* Set SPI/I2S in i2s mode */  in stm32_i2s_probe()
1313 	ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,  in stm32_i2s_probe()
1318 	ret = regmap_read(i2s->regmap, STM32_I2S_IPIDR_REG, &val);  in stm32_i2s_probe()
1323 		ret = regmap_read(i2s->regmap, STM32_I2S_HWCFGR_REG, &val);  in stm32_i2s_probe()
1329 				"Device does not support i2s mode\n");  in stm32_i2s_probe()
1334 		ret = regmap_read(i2s->regmap, STM32_I2S_VERR_REG, &val);  in stm32_i2s_probe()
1338 		dev_dbg(&pdev->dev, "I2S version: %lu.%lu registered\n",  in stm32_i2s_probe()
1358 	struct stm32_i2s_data *i2s = dev_get_drvdata(dev);  in stm32_i2s_suspend()  local
1360 	regcache_cache_only(i2s->regmap, true);  in stm32_i2s_suspend()
1361 	regcache_mark_dirty(i2s->regmap);  in stm32_i2s_suspend()
1368 	struct stm32_i2s_data *i2s = dev_get_drvdata(dev);  in stm32_i2s_resume()  local
1370 	regcache_cache_only(i2s->regmap, false);  in stm32_i2s_resume()
1371 	return regcache_sync(i2s->regmap);  in stm32_i2s_resume()
1381 		.name = "st,stm32-i2s",
1391 MODULE_DESCRIPTION("STM32 Soc i2s Interface");
1393 MODULE_ALIAS("platform:stm32-i2s");