Lines Matching +full:bridge0 +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0-only
20 #define NR_CXL_HOST_BRIDGES 2
23 #define NR_CXL_ROOT_PORTS 2
24 #define NR_CXL_SWITCH_PORTS 2
54 if (&cxl_host_bridge[i]->dev == dev) in is_multi_bridge()
64 if (&cxl_hb_single[i]->dev == dev) in is_single_bridge()
79 [2] = {
80 .handle = &host_bridge[2],
81 .pnp.unique_id = "2",
94 if (dev == &cxl_mem[i]->dev) in is_mock_dev()
97 if (dev == &cxl_mem_single[i]->dev) in is_mock_dev()
100 if (dev == &cxl_rcd[i]->dev) in is_mock_dev()
102 if (dev == &cxl_acpi->dev) in is_mock_dev()
130 u32 target[2];
138 u32 target[2];
154 u32 target[2];
162 u64 xormap_list[2];
188 .chbs[2] = {
193 .uid = 2,
277 .target = { 2 },
334 .interleave_ways = 2,
350 .nr_xormaps = 2,
359 [2] = &mock_cedt.cfmws2.cfmws,
395 gen_pool_free(cxl_mock_pool, res->range.start, in depopulate_all_mock_resources()
396 range_len(&res->range)); in depopulate_all_mock_resources()
397 list_del(&res->list); in depopulate_all_mock_resources()
411 INIT_LIST_HEAD(&res->list); in alloc_mock_res()
417 res->range = (struct range) { in alloc_mock_res()
419 .end = phys + size - 1, in alloc_mock_res()
422 list_add(&res->list, &mock_res); in alloc_mock_res()
437 if (chbs->cxl_version == ACPI_CEDT_CHBS_VERSION_CXL20) in populate_cedt()
444 return -ENOMEM; in populate_cedt()
445 chbs->base = res->range.start; in populate_cedt()
446 chbs->length = size; in populate_cedt()
452 res = alloc_mock_res(window->window_size, SZ_256M); in populate_cedt()
454 return -ENOMEM; in populate_cedt()
455 window->base_hpa = res->range.start; in populate_cedt()
478 struct device *dev = ctx->dev; in mock_acpi_table_parse_cedt()
496 end = (unsigned long) h + mock_cfmws[i]->header.length; in mock_acpi_table_parse_cedt()
503 end = (unsigned long)h + mock_cxims[i]->header.length; in mock_acpi_table_parse_cedt()
515 if (dev == &cxl_host_bridge[i]->dev) in is_mock_bridge()
518 if (dev == &cxl_hb_single[i]->dev) in is_mock_bridge()
521 if (dev == &cxl_rch[i]->dev) in is_mock_bridge()
535 if (dev == &cxl_root_port[i]->dev) in is_mock_port()
539 if (dev == &cxl_switch_uport[i]->dev) in is_mock_port()
543 if (dev == &cxl_switch_dport[i]->dev) in is_mock_port()
547 if (dev == &cxl_root_single[i]->dev) in is_mock_port()
551 if (dev == &cxl_swu_single[i]->dev) in is_mock_port()
555 if (dev == &cxl_swd_single[i]->dev) in is_mock_port()
559 return is_mock_dev(dev->parent); in is_mock_port()
566 return adev - host_bridge; in host_bridge_index()
601 [2] = {
602 .bus = &mock_pci_bus[2],
632 struct cxl_hdm *cxlhdm = devm_kzalloc(&port->dev, sizeof(*cxlhdm), GFP_KERNEL); in mock_cxl_setup_hdm()
633 struct device *dev = &port->dev; in mock_cxl_setup_hdm()
636 return ERR_PTR(-ENOMEM); in mock_cxl_setup_hdm()
638 cxlhdm->port = port; in mock_cxl_setup_hdm()
639 cxlhdm->interleave_mask = ~0U; in mock_cxl_setup_hdm()
640 cxlhdm->iw_cap_mask = ~0UL; in mock_cxl_setup_hdm()
647 dev_err(&port->dev, "unexpected passthrough decoder for cxl_test\n"); in mock_cxl_add_passthrough_decoder()
648 return -EOPNOTSUPP; in mock_cxl_add_passthrough_decoder()
663 ctx->target_map[ctx->index++] = pdev->id; in map_targets()
665 if (ctx->index > ctx->target_count) { in map_targets()
667 return -ENXIO; in map_targets()
675 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_commit()
676 int id = cxld->id; in mock_decoder_commit()
678 if (cxld->flags & CXL_DECODER_F_ENABLE) in mock_decoder_commit()
681 dev_dbg(&port->dev, "%s commit\n", dev_name(&cxld->dev)); in mock_decoder_commit()
683 dev_dbg(&port->dev, in mock_decoder_commit()
685 dev_name(&cxld->dev), port->id, in mock_decoder_commit()
687 return -EBUSY; in mock_decoder_commit()
690 port->commit_end++; in mock_decoder_commit()
691 cxld->flags |= CXL_DECODER_F_ENABLE; in mock_decoder_commit()
698 struct cxl_port *port = to_cxl_port(cxld->dev.parent); in mock_decoder_reset()
699 int id = cxld->id; in mock_decoder_reset()
701 if ((cxld->flags & CXL_DECODER_F_ENABLE) == 0) in mock_decoder_reset()
704 dev_dbg(&port->dev, "%s reset\n", dev_name(&cxld->dev)); in mock_decoder_reset()
705 if (port->commit_end == id) in mock_decoder_reset()
708 dev_dbg(&port->dev, in mock_decoder_reset()
710 dev_name(&cxld->dev), port->id, port->commit_end); in mock_decoder_reset()
711 cxld->flags &= ~CXL_DECODER_F_ENABLE; in mock_decoder_reset()
716 cxld->hpa_range = (struct range){ in default_mock_decoder()
718 .end = -1, in default_mock_decoder()
721 cxld->interleave_ways = 1; in default_mock_decoder()
722 cxld->interleave_granularity = 256; in default_mock_decoder()
723 cxld->target_type = CXL_DECODER_HOSTONLYMEM; in default_mock_decoder()
724 cxld->commit = mock_decoder_commit; in default_mock_decoder()
725 cxld->reset = mock_decoder_reset; in default_mock_decoder()
735 if (cxld->id == 0) in first_decoder()
755 if (is_endpoint_decoder(&cxld->dev)) { in mock_init_hdm_decoder()
756 cxled = to_cxl_endpoint_decoder(&cxld->dev); in mock_init_hdm_decoder()
758 WARN_ON(!dev_is_platform(cxlmd->dev.parent)); in mock_init_hdm_decoder()
759 pdev = to_platform_device(cxlmd->dev.parent); in mock_init_hdm_decoder()
761 /* check is endpoint is attach to host-bridge0 */ in mock_init_hdm_decoder()
764 if (port->uport_dev == &cxl_host_bridge[0]->dev) { in mock_init_hdm_decoder()
768 if (is_cxl_port(port->dev.parent)) in mock_init_hdm_decoder()
769 port = to_cxl_port(port->dev.parent); in mock_init_hdm_decoder()
777 * The first decoder on the first 2 devices on the first switch in mock_init_hdm_decoder()
778 * attached to host-bridge0 mock a fake / static RAM region. All in mock_init_hdm_decoder()
782 * See 'cxl list -BMPu -m cxl_mem.0,cxl_mem.4' in mock_init_hdm_decoder()
784 if (!hb0 || pdev->id % 4 || pdev->id > 4 || cxld->id > 0) { in mock_init_hdm_decoder()
789 base = window->base_hpa; in mock_init_hdm_decoder()
790 cxld->hpa_range = (struct range) { in mock_init_hdm_decoder()
792 .end = base + size - 1, in mock_init_hdm_decoder()
795 cxld->interleave_ways = 2; in mock_init_hdm_decoder()
796 eig_to_granularity(window->granularity, &cxld->interleave_granularity); in mock_init_hdm_decoder()
797 cxld->target_type = CXL_DECODER_HOSTONLYMEM; in mock_init_hdm_decoder()
798 cxld->flags = CXL_DECODER_F_ENABLE; in mock_init_hdm_decoder()
799 cxled->state = CXL_DECODER_STATE_AUTO; in mock_init_hdm_decoder()
800 port->commit_end = cxld->id; in mock_init_hdm_decoder()
801 devm_cxl_dpa_reserve(cxled, 0, size / cxld->interleave_ways, 0); in mock_init_hdm_decoder()
802 cxld->commit = mock_decoder_commit; in mock_init_hdm_decoder()
803 cxld->reset = mock_decoder_reset; in mock_init_hdm_decoder()
810 for (i = 0; i < 2; i++) { in mock_init_hdm_decoder()
811 dport = iter->parent_dport; in mock_init_hdm_decoder()
812 iter = dport->port; in mock_init_hdm_decoder()
813 dev = device_find_child(&iter->dev, NULL, first_decoder); in mock_init_hdm_decoder()
823 if (pdev->id == 4) in mock_init_hdm_decoder()
824 cxlsd->target[1] = dport; in mock_init_hdm_decoder()
826 cxlsd->target[0] = dport; in mock_init_hdm_decoder()
828 cxlsd->target[0] = dport; in mock_init_hdm_decoder()
829 cxld = &cxlsd->cxld; in mock_init_hdm_decoder()
830 cxld->target_type = CXL_DECODER_HOSTONLYMEM; in mock_init_hdm_decoder()
831 cxld->flags = CXL_DECODER_F_ENABLE; in mock_init_hdm_decoder()
832 iter->commit_end = 0; in mock_init_hdm_decoder()
834 * Switch targets 2 endpoints, while host bridge targets in mock_init_hdm_decoder()
838 cxld->interleave_ways = 2; in mock_init_hdm_decoder()
840 cxld->interleave_ways = 1; in mock_init_hdm_decoder()
841 cxld->interleave_granularity = 4096; in mock_init_hdm_decoder()
842 cxld->hpa_range = (struct range) { in mock_init_hdm_decoder()
844 .end = base + size - 1, in mock_init_hdm_decoder()
853 struct cxl_port *port = cxlhdm->port; in mock_cxl_enumerate_decoders()
854 struct cxl_port *parent_port = to_cxl_port(port->dev.parent); in mock_cxl_enumerate_decoders()
878 dev_warn(&port->dev, in mock_cxl_enumerate_decoders()
882 cxld = &cxlsd->cxld; in mock_cxl_enumerate_decoders()
889 dev_warn(&port->dev, in mock_cxl_enumerate_decoders()
893 cxld = &cxled->cxld; in mock_cxl_enumerate_decoders()
899 rc = device_for_each_child(port->uport_dev, &ctx, in mock_cxl_enumerate_decoders()
902 put_device(&cxld->dev); in mock_cxl_enumerate_decoders()
909 put_device(&cxld->dev); in mock_cxl_enumerate_decoders()
910 dev_err(&port->dev, "Failed to add decoder\n"); in mock_cxl_enumerate_decoders()
914 rc = cxl_decoder_autoremove(&port->dev, cxld); in mock_cxl_enumerate_decoders()
917 dev_dbg(&cxld->dev, "Added to port %s\n", dev_name(&port->dev)); in mock_cxl_enumerate_decoders()
928 if (port->depth == 1) { in mock_cxl_port_enumerate_dports()
929 if (is_multi_bridge(port->uport_dev)) { in mock_cxl_port_enumerate_dports()
932 } else if (is_single_bridge(port->uport_dev)) { in mock_cxl_port_enumerate_dports()
936 dev_dbg(&port->dev, "%s: unknown bridge type\n", in mock_cxl_port_enumerate_dports()
937 dev_name(port->uport_dev)); in mock_cxl_port_enumerate_dports()
938 return -ENXIO; in mock_cxl_port_enumerate_dports()
940 } else if (port->depth == 2) { in mock_cxl_port_enumerate_dports()
941 struct cxl_port *parent = to_cxl_port(port->dev.parent); in mock_cxl_port_enumerate_dports()
943 if (is_multi_bridge(parent->uport_dev)) { in mock_cxl_port_enumerate_dports()
946 } else if (is_single_bridge(parent->uport_dev)) { in mock_cxl_port_enumerate_dports()
950 dev_dbg(&port->dev, "%s: unknown bridge type\n", in mock_cxl_port_enumerate_dports()
951 dev_name(port->uport_dev)); in mock_cxl_port_enumerate_dports()
952 return -ENXIO; in mock_cxl_port_enumerate_dports()
955 dev_WARN_ONCE(&port->dev, 1, "unexpected depth %d\n", in mock_cxl_port_enumerate_dports()
956 port->depth); in mock_cxl_port_enumerate_dports()
957 return -ENXIO; in mock_cxl_port_enumerate_dports()
964 if (pdev->dev.parent != port->uport_dev) { in mock_cxl_port_enumerate_dports()
965 dev_dbg(&port->dev, "%s: mismatch parent %s\n", in mock_cxl_port_enumerate_dports()
966 dev_name(port->uport_dev), in mock_cxl_port_enumerate_dports()
967 dev_name(pdev->dev.parent)); in mock_cxl_port_enumerate_dports()
971 dport = devm_cxl_add_dport(port, &pdev->dev, pdev->id, in mock_cxl_port_enumerate_dports()
987 dpa_perf->qos_class = FAKE_QTG_ID; in dpa_perf_setup()
988 dpa_perf->dpa_range = *range; in dpa_perf_setup()
990 dpa_perf->coord[i].read_latency = 500; in dpa_perf_setup()
991 dpa_perf->coord[i].write_latency = 500; in dpa_perf_setup()
992 dpa_perf->coord[i].read_bandwidth = 1000; in dpa_perf_setup()
993 dpa_perf->coord[i].write_bandwidth = 1000; in dpa_perf_setup()
1001 struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev); in mock_cxl_endpoint_parse_cdat()
1002 struct cxl_dev_state *cxlds = cxlmd->cxlds; in mock_cxl_endpoint_parse_cdat()
1006 .start = cxlds->pmem_res.start, in mock_cxl_endpoint_parse_cdat()
1007 .end = cxlds->pmem_res.end, in mock_cxl_endpoint_parse_cdat()
1010 .start = cxlds->ram_res.start, in mock_cxl_endpoint_parse_cdat()
1011 .end = cxlds->ram_res.end, in mock_cxl_endpoint_parse_cdat()
1018 dpa_perf_setup(port, &ram_range, &mds->ram_perf); in mock_cxl_endpoint_parse_cdat()
1021 dpa_perf_setup(port, &pmem_range, &mds->pmem_perf); in mock_cxl_endpoint_parse_cdat()
1051 device_initialize(&adev->dev); in mock_companion()
1052 fwnode_init(&adev->fwnode, NULL); in mock_companion()
1053 dev->fwnode = &adev->fwnode; in mock_companion()
1054 adev->fwnode.dev = dev; in mock_companion()
1058 #define SZ_64G (SZ_32G * 2)
1074 mock_companion(adev, &pdev->dev); in cxl_rch_topo_init()
1082 mock_pci_bus[idx].bridge = &pdev->dev; in cxl_rch_topo_init()
1083 rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, in cxl_rch_topo_init()
1092 for (i = ARRAY_SIZE(cxl_rch) - 1; i >= 0; i--) { in cxl_rch_topo_init()
1097 sysfs_remove_link(&pdev->dev.kobj, "firmware_node"); in cxl_rch_topo_init()
1108 for (i = ARRAY_SIZE(cxl_rch) - 1; i >= 0; i--) { in cxl_rch_topo_exit()
1113 sysfs_remove_link(&pdev->dev.kobj, "firmware_node"); in cxl_rch_topo_exit()
1132 mock_companion(adev, &pdev->dev); in cxl_single_topo_init()
1140 mock_pci_bus[i + NR_CXL_HOST_BRIDGES].bridge = &pdev->dev; in cxl_single_topo_init()
1141 rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, in cxl_single_topo_init()
1156 pdev->dev.parent = &bridge->dev; in cxl_single_topo_init()
1174 pdev->dev.parent = &root_port->dev; in cxl_single_topo_init()
1193 pdev->dev.parent = &uport->dev; in cxl_single_topo_init()
1206 for (i = ARRAY_SIZE(cxl_swd_single) - 1; i >= 0; i--) in cxl_single_topo_init()
1209 for (i = ARRAY_SIZE(cxl_swu_single) - 1; i >= 0; i--) in cxl_single_topo_init()
1212 for (i = ARRAY_SIZE(cxl_root_single) - 1; i >= 0; i--) in cxl_single_topo_init()
1215 for (i = ARRAY_SIZE(cxl_hb_single) - 1; i >= 0; i--) { in cxl_single_topo_init()
1220 sysfs_remove_link(&pdev->dev.kobj, "physical_node"); in cxl_single_topo_init()
1231 for (i = ARRAY_SIZE(cxl_swd_single) - 1; i >= 0; i--) in cxl_single_topo_exit()
1233 for (i = ARRAY_SIZE(cxl_swu_single) - 1; i >= 0; i--) in cxl_single_topo_exit()
1235 for (i = ARRAY_SIZE(cxl_root_single) - 1; i >= 0; i--) in cxl_single_topo_exit()
1237 for (i = ARRAY_SIZE(cxl_hb_single) - 1; i >= 0; i--) { in cxl_single_topo_exit()
1242 sysfs_remove_link(&pdev->dev.kobj, "physical_node"); in cxl_single_topo_exit()
1251 for (i = ARRAY_SIZE(cxl_rcd) - 1; i >= 0; i--) in cxl_mem_exit()
1253 for (i = ARRAY_SIZE(cxl_mem_single) - 1; i >= 0; i--) in cxl_mem_exit()
1255 for (i = ARRAY_SIZE(cxl_mem) - 1; i >= 0; i--) in cxl_mem_exit()
1270 pdev->dev.parent = &dport->dev; in cxl_mem_init()
1271 set_dev_node(&pdev->dev, i % 2); in cxl_mem_init()
1288 pdev->dev.parent = &dport->dev; in cxl_mem_init()
1289 set_dev_node(&pdev->dev, i % 2); in cxl_mem_init()
1307 pdev->dev.parent = &rch->dev; in cxl_mem_init()
1308 set_dev_node(&pdev->dev, i % 2); in cxl_mem_init()
1321 for (i = ARRAY_SIZE(cxl_rcd) - 1; i >= 0; i--) in cxl_mem_init()
1324 for (i = ARRAY_SIZE(cxl_mem_single) - 1; i >= 0; i--) in cxl_mem_init()
1327 for (i = ARRAY_SIZE(cxl_mem) - 1; i >= 0; i--) in cxl_mem_init()
1346 rc = -ENOMEM; in cxl_test_init()
1350 rc = gen_pool_add(cxl_mock_pool, iomem_resource.end + 1 - SZ_64G, in cxl_test_init()
1375 mock_companion(adev, &pdev->dev); in cxl_test_init()
1383 mock_pci_bus[i].bridge = &pdev->dev; in cxl_test_init()
1384 rc = sysfs_create_link(&pdev->dev.kobj, &pdev->dev.kobj, in cxl_test_init()
1398 pdev->dev.parent = &bridge->dev; in cxl_test_init()
1416 pdev->dev.parent = &root_port->dev; in cxl_test_init()
1434 pdev->dev.parent = &uport->dev; in cxl_test_init()
1456 mock_companion(&acpi0017_mock, &cxl_acpi->dev); in cxl_test_init()
1476 for (i = ARRAY_SIZE(cxl_switch_dport) - 1; i >= 0; i--) in cxl_test_init()
1479 for (i = ARRAY_SIZE(cxl_switch_uport) - 1; i >= 0; i--) in cxl_test_init()
1482 for (i = ARRAY_SIZE(cxl_root_port) - 1; i >= 0; i--) in cxl_test_init()
1485 for (i = ARRAY_SIZE(cxl_host_bridge) - 1; i >= 0; i--) { in cxl_test_init()
1490 sysfs_remove_link(&pdev->dev.kobj, "physical_node"); in cxl_test_init()
1510 for (i = ARRAY_SIZE(cxl_switch_dport) - 1; i >= 0; i--) in cxl_test_exit()
1512 for (i = ARRAY_SIZE(cxl_switch_uport) - 1; i >= 0; i--) in cxl_test_exit()
1514 for (i = ARRAY_SIZE(cxl_root_port) - 1; i >= 0; i--) in cxl_test_exit()
1516 for (i = ARRAY_SIZE(cxl_host_bridge) - 1; i >= 0; i--) { in cxl_test_exit()
1521 sysfs_remove_link(&pdev->dev.kobj, "physical_node"); in cxl_test_exit()