1// DO NOT EDIT
2// generated by: ppc64map -fmt=encoder pp64.csv
3
4package ppc64
5
6import (
7	"cmd/internal/obj"
8)
9
10const (
11	AXXSETACCZ = ALASTAOUT + iota
12	AXXMTACC
13	AXXMFACC
14	AXXGENPCVWM
15	AXXGENPCVHM
16	AXXGENPCVDM
17	AXXGENPCVBM
18	AXVTLSBB
19	AXVI8GER4SPP
20	AXVI8GER4PP
21	AXVI8GER4
22	AXVI4GER8PP
23	AXVI4GER8
24	AXVI16GER2SPP
25	AXVI16GER2S
26	AXVI16GER2PP
27	AXVI16GER2
28	AXVF64GERPP
29	AXVF64GERPN
30	AXVF64GERNP
31	AXVF64GERNN
32	AXVF64GER
33	AXVF32GERPP
34	AXVF32GERPN
35	AXVF32GERNP
36	AXVF32GERNN
37	AXVF32GER
38	AXVF16GER2PP
39	AXVF16GER2PN
40	AXVF16GER2NP
41	AXVF16GER2NN
42	AXVF16GER2
43	AXVCVSPBF16
44	AXVCVBF16SPN
45	AXVBF16GER2PP
46	AXVBF16GER2PN
47	AXVBF16GER2NP
48	AXVBF16GER2NN
49	AXVBF16GER2
50	AXSMINCQP
51	AXSMAXCQP
52	AXSCVUQQP
53	AXSCVSQQP
54	AXSCVQPUQZ
55	AXSCVQPSQZ
56	AXSCMPGTQP
57	AXSCMPGEQP
58	AXSCMPEQQP
59	AVSTRIHRCC
60	AVSTRIHR
61	AVSTRIHLCC
62	AVSTRIHL
63	AVSTRIBRCC
64	AVSTRIBR
65	AVSTRIBLCC
66	AVSTRIBL
67	AVSRQ
68	AVSRDBI
69	AVSRAQ
70	AVSLQ
71	AVSLDBI
72	AVRLQNM
73	AVRLQMI
74	AVRLQ
75	AVPEXTD
76	AVPDEPD
77	AVMULOUD
78	AVMULOSD
79	AVMULLD
80	AVMULHUW
81	AVMULHUD
82	AVMULHSW
83	AVMULHSD
84	AVMULEUD
85	AVMULESD
86	AVMSUMCUD
87	AVMODUW
88	AVMODUQ
89	AVMODUD
90	AVMODSW
91	AVMODSQ
92	AVMODSD
93	AVINSWVRX
94	AVINSWVLX
95	AVINSWRX
96	AVINSWLX
97	AVINSW
98	AVINSHVRX
99	AVINSHVLX
100	AVINSHRX
101	AVINSHLX
102	AVINSDRX
103	AVINSDLX
104	AVINSD
105	AVINSBVRX
106	AVINSBVLX
107	AVINSBRX
108	AVINSBLX
109	AVGNB
110	AVEXTSD2Q
111	AVEXTRACTWM
112	AVEXTRACTQM
113	AVEXTRACTHM
114	AVEXTRACTDM
115	AVEXTRACTBM
116	AVEXTDUWVRX
117	AVEXTDUWVLX
118	AVEXTDUHVRX
119	AVEXTDUHVLX
120	AVEXTDUBVRX
121	AVEXTDUBVLX
122	AVEXTDDVRX
123	AVEXTDDVLX
124	AVEXPANDWM
125	AVEXPANDQM
126	AVEXPANDHM
127	AVEXPANDDM
128	AVEXPANDBM
129	AVDIVUW
130	AVDIVUQ
131	AVDIVUD
132	AVDIVSW
133	AVDIVSQ
134	AVDIVSD
135	AVDIVEUW
136	AVDIVEUQ
137	AVDIVEUD
138	AVDIVESW
139	AVDIVESQ
140	AVDIVESD
141	AVCTZDM
142	AVCNTMBW
143	AVCNTMBH
144	AVCNTMBD
145	AVCNTMBB
146	AVCMPUQ
147	AVCMPSQ
148	AVCMPGTUQCC
149	AVCMPGTUQ
150	AVCMPGTSQCC
151	AVCMPGTSQ
152	AVCMPEQUQCC
153	AVCMPEQUQ
154	AVCLZDM
155	AVCLRRB
156	AVCLRLB
157	AVCFUGED
158	ASTXVRWX
159	ASTXVRHX
160	ASTXVRDX
161	ASTXVRBX
162	ASTXVPX
163	ASTXVP
164	ASETNBCR
165	ASETNBC
166	ASETBCR
167	ASETBC
168	APEXTD
169	APDEPD
170	AMTVSRWM
171	AMTVSRQM
172	AMTVSRHM
173	AMTVSRDM
174	AMTVSRBMI
175	AMTVSRBM
176	ALXVRWX
177	ALXVRHX
178	ALXVRDX
179	ALXVRBX
180	ALXVPX
181	ALXVP
182	ALXVKQ
183	ADCTFIXQQ
184	ADCFFIXQQ
185	ACNTTZDM
186	ACNTLZDM
187	ACFUGED
188	ABRW
189	ABRH
190	ABRD
191	AHASHSTP
192	AHASHST
193	AHASHCHKP
194	AHASHCHK
195	AXXSPLTIW
196	AXXSPLTIDP
197	AXXSPLTI32DX
198	AXXPERMX
199	AXXEVAL
200	AXXBLENDVW
201	AXXBLENDVH
202	AXXBLENDVD
203	AXXBLENDVB
204	APSTXVP
205	APSTXV
206	APSTXSSP
207	APSTXSD
208	APSTW
209	APSTQ
210	APSTH
211	APSTFS
212	APSTFD
213	APSTD
214	APSTB
215	APNOP
216	APMXVI8GER4SPP
217	APMXVI8GER4PP
218	APMXVI8GER4
219	APMXVI4GER8PP
220	APMXVI4GER8
221	APMXVI16GER2SPP
222	APMXVI16GER2S
223	APMXVI16GER2PP
224	APMXVI16GER2
225	APMXVF64GERPP
226	APMXVF64GERPN
227	APMXVF64GERNP
228	APMXVF64GERNN
229	APMXVF64GER
230	APMXVF32GERPP
231	APMXVF32GERPN
232	APMXVF32GERNP
233	APMXVF32GERNN
234	APMXVF32GER
235	APMXVF16GER2PP
236	APMXVF16GER2PN
237	APMXVF16GER2NP
238	APMXVF16GER2NN
239	APMXVF16GER2
240	APMXVBF16GER2PP
241	APMXVBF16GER2PN
242	APMXVBF16GER2NP
243	APMXVBF16GER2NN
244	APMXVBF16GER2
245	APLXVP
246	APLXV
247	APLXSSP
248	APLXSD
249	APLWZ
250	APLWA
251	APLQ
252	APLHZ
253	APLHA
254	APLFS
255	APLFD
256	APLD
257	APLBZ
258	APADDI
259	ALASTGEN
260	AFIRSTGEN = AXXSETACCZ
261)
262
263var GenAnames = []string{
264	"XXSETACCZ",
265	"XXMTACC",
266	"XXMFACC",
267	"XXGENPCVWM",
268	"XXGENPCVHM",
269	"XXGENPCVDM",
270	"XXGENPCVBM",
271	"XVTLSBB",
272	"XVI8GER4SPP",
273	"XVI8GER4PP",
274	"XVI8GER4",
275	"XVI4GER8PP",
276	"XVI4GER8",
277	"XVI16GER2SPP",
278	"XVI16GER2S",
279	"XVI16GER2PP",
280	"XVI16GER2",
281	"XVF64GERPP",
282	"XVF64GERPN",
283	"XVF64GERNP",
284	"XVF64GERNN",
285	"XVF64GER",
286	"XVF32GERPP",
287	"XVF32GERPN",
288	"XVF32GERNP",
289	"XVF32GERNN",
290	"XVF32GER",
291	"XVF16GER2PP",
292	"XVF16GER2PN",
293	"XVF16GER2NP",
294	"XVF16GER2NN",
295	"XVF16GER2",
296	"XVCVSPBF16",
297	"XVCVBF16SPN",
298	"XVBF16GER2PP",
299	"XVBF16GER2PN",
300	"XVBF16GER2NP",
301	"XVBF16GER2NN",
302	"XVBF16GER2",
303	"XSMINCQP",
304	"XSMAXCQP",
305	"XSCVUQQP",
306	"XSCVSQQP",
307	"XSCVQPUQZ",
308	"XSCVQPSQZ",
309	"XSCMPGTQP",
310	"XSCMPGEQP",
311	"XSCMPEQQP",
312	"VSTRIHRCC",
313	"VSTRIHR",
314	"VSTRIHLCC",
315	"VSTRIHL",
316	"VSTRIBRCC",
317	"VSTRIBR",
318	"VSTRIBLCC",
319	"VSTRIBL",
320	"VSRQ",
321	"VSRDBI",
322	"VSRAQ",
323	"VSLQ",
324	"VSLDBI",
325	"VRLQNM",
326	"VRLQMI",
327	"VRLQ",
328	"VPEXTD",
329	"VPDEPD",
330	"VMULOUD",
331	"VMULOSD",
332	"VMULLD",
333	"VMULHUW",
334	"VMULHUD",
335	"VMULHSW",
336	"VMULHSD",
337	"VMULEUD",
338	"VMULESD",
339	"VMSUMCUD",
340	"VMODUW",
341	"VMODUQ",
342	"VMODUD",
343	"VMODSW",
344	"VMODSQ",
345	"VMODSD",
346	"VINSWVRX",
347	"VINSWVLX",
348	"VINSWRX",
349	"VINSWLX",
350	"VINSW",
351	"VINSHVRX",
352	"VINSHVLX",
353	"VINSHRX",
354	"VINSHLX",
355	"VINSDRX",
356	"VINSDLX",
357	"VINSD",
358	"VINSBVRX",
359	"VINSBVLX",
360	"VINSBRX",
361	"VINSBLX",
362	"VGNB",
363	"VEXTSD2Q",
364	"VEXTRACTWM",
365	"VEXTRACTQM",
366	"VEXTRACTHM",
367	"VEXTRACTDM",
368	"VEXTRACTBM",
369	"VEXTDUWVRX",
370	"VEXTDUWVLX",
371	"VEXTDUHVRX",
372	"VEXTDUHVLX",
373	"VEXTDUBVRX",
374	"VEXTDUBVLX",
375	"VEXTDDVRX",
376	"VEXTDDVLX",
377	"VEXPANDWM",
378	"VEXPANDQM",
379	"VEXPANDHM",
380	"VEXPANDDM",
381	"VEXPANDBM",
382	"VDIVUW",
383	"VDIVUQ",
384	"VDIVUD",
385	"VDIVSW",
386	"VDIVSQ",
387	"VDIVSD",
388	"VDIVEUW",
389	"VDIVEUQ",
390	"VDIVEUD",
391	"VDIVESW",
392	"VDIVESQ",
393	"VDIVESD",
394	"VCTZDM",
395	"VCNTMBW",
396	"VCNTMBH",
397	"VCNTMBD",
398	"VCNTMBB",
399	"VCMPUQ",
400	"VCMPSQ",
401	"VCMPGTUQCC",
402	"VCMPGTUQ",
403	"VCMPGTSQCC",
404	"VCMPGTSQ",
405	"VCMPEQUQCC",
406	"VCMPEQUQ",
407	"VCLZDM",
408	"VCLRRB",
409	"VCLRLB",
410	"VCFUGED",
411	"STXVRWX",
412	"STXVRHX",
413	"STXVRDX",
414	"STXVRBX",
415	"STXVPX",
416	"STXVP",
417	"SETNBCR",
418	"SETNBC",
419	"SETBCR",
420	"SETBC",
421	"PEXTD",
422	"PDEPD",
423	"MTVSRWM",
424	"MTVSRQM",
425	"MTVSRHM",
426	"MTVSRDM",
427	"MTVSRBMI",
428	"MTVSRBM",
429	"LXVRWX",
430	"LXVRHX",
431	"LXVRDX",
432	"LXVRBX",
433	"LXVPX",
434	"LXVP",
435	"LXVKQ",
436	"DCTFIXQQ",
437	"DCFFIXQQ",
438	"CNTTZDM",
439	"CNTLZDM",
440	"CFUGED",
441	"BRW",
442	"BRH",
443	"BRD",
444	"HASHSTP",
445	"HASHST",
446	"HASHCHKP",
447	"HASHCHK",
448	"XXSPLTIW",
449	"XXSPLTIDP",
450	"XXSPLTI32DX",
451	"XXPERMX",
452	"XXEVAL",
453	"XXBLENDVW",
454	"XXBLENDVH",
455	"XXBLENDVD",
456	"XXBLENDVB",
457	"PSTXVP",
458	"PSTXV",
459	"PSTXSSP",
460	"PSTXSD",
461	"PSTW",
462	"PSTQ",
463	"PSTH",
464	"PSTFS",
465	"PSTFD",
466	"PSTD",
467	"PSTB",
468	"PNOP",
469	"PMXVI8GER4SPP",
470	"PMXVI8GER4PP",
471	"PMXVI8GER4",
472	"PMXVI4GER8PP",
473	"PMXVI4GER8",
474	"PMXVI16GER2SPP",
475	"PMXVI16GER2S",
476	"PMXVI16GER2PP",
477	"PMXVI16GER2",
478	"PMXVF64GERPP",
479	"PMXVF64GERPN",
480	"PMXVF64GERNP",
481	"PMXVF64GERNN",
482	"PMXVF64GER",
483	"PMXVF32GERPP",
484	"PMXVF32GERPN",
485	"PMXVF32GERNP",
486	"PMXVF32GERNN",
487	"PMXVF32GER",
488	"PMXVF16GER2PP",
489	"PMXVF16GER2PN",
490	"PMXVF16GER2NP",
491	"PMXVF16GER2NN",
492	"PMXVF16GER2",
493	"PMXVBF16GER2PP",
494	"PMXVBF16GER2PN",
495	"PMXVBF16GER2NP",
496	"PMXVBF16GER2NN",
497	"PMXVBF16GER2",
498	"PLXVP",
499	"PLXV",
500	"PLXSSP",
501	"PLXSD",
502	"PLWZ",
503	"PLWA",
504	"PLQ",
505	"PLHZ",
506	"PLHA",
507	"PLFS",
508	"PLFD",
509	"PLD",
510	"PLBZ",
511	"PADDI",
512}
513
514var GenOpcodes = [...]uint32{
515	0x7c030162, // AXXSETACCZ
516	0x7c010162, // AXXMTACC
517	0x7c000162, // AXXMFACC
518	0xf0000768, // AXXGENPCVWM
519	0xf000072a, // AXXGENPCVHM
520	0xf000076a, // AXXGENPCVDM
521	0xf0000728, // AXXGENPCVBM
522	0xf002076c, // AXVTLSBB
523	0xec000318, // AXVI8GER4SPP
524	0xec000010, // AXVI8GER4PP
525	0xec000018, // AXVI8GER4
526	0xec000110, // AXVI4GER8PP
527	0xec000118, // AXVI4GER8
528	0xec000150, // AXVI16GER2SPP
529	0xec000158, // AXVI16GER2S
530	0xec000358, // AXVI16GER2PP
531	0xec000258, // AXVI16GER2
532	0xec0001d0, // AXVF64GERPP
533	0xec0005d0, // AXVF64GERPN
534	0xec0003d0, // AXVF64GERNP
535	0xec0007d0, // AXVF64GERNN
536	0xec0001d8, // AXVF64GER
537	0xec0000d0, // AXVF32GERPP
538	0xec0004d0, // AXVF32GERPN
539	0xec0002d0, // AXVF32GERNP
540	0xec0006d0, // AXVF32GERNN
541	0xec0000d8, // AXVF32GER
542	0xec000090, // AXVF16GER2PP
543	0xec000490, // AXVF16GER2PN
544	0xec000290, // AXVF16GER2NP
545	0xec000690, // AXVF16GER2NN
546	0xec000098, // AXVF16GER2
547	0xf011076c, // AXVCVSPBF16
548	0xf010076c, // AXVCVBF16SPN
549	0xec000190, // AXVBF16GER2PP
550	0xec000590, // AXVBF16GER2PN
551	0xec000390, // AXVBF16GER2NP
552	0xec000790, // AXVBF16GER2NN
553	0xec000198, // AXVBF16GER2
554	0xfc0005c8, // AXSMINCQP
555	0xfc000548, // AXSMAXCQP
556	0xfc030688, // AXSCVUQQP
557	0xfc0b0688, // AXSCVSQQP
558	0xfc000688, // AXSCVQPUQZ
559	0xfc080688, // AXSCVQPSQZ
560	0xfc0001c8, // AXSCMPGTQP
561	0xfc000188, // AXSCMPGEQP
562	0xfc000088, // AXSCMPEQQP
563	0x1003040d, // AVSTRIHRCC
564	0x1003000d, // AVSTRIHR
565	0x1002040d, // AVSTRIHLCC
566	0x1002000d, // AVSTRIHL
567	0x1001040d, // AVSTRIBRCC
568	0x1001000d, // AVSTRIBR
569	0x1000040d, // AVSTRIBLCC
570	0x1000000d, // AVSTRIBL
571	0x10000205, // AVSRQ
572	0x10000216, // AVSRDBI
573	0x10000305, // AVSRAQ
574	0x10000105, // AVSLQ
575	0x10000016, // AVSLDBI
576	0x10000145, // AVRLQNM
577	0x10000045, // AVRLQMI
578	0x10000005, // AVRLQ
579	0x1000058d, // AVPEXTD
580	0x100005cd, // AVPDEPD
581	0x100000c8, // AVMULOUD
582	0x100001c8, // AVMULOSD
583	0x100001c9, // AVMULLD
584	0x10000289, // AVMULHUW
585	0x100002c9, // AVMULHUD
586	0x10000389, // AVMULHSW
587	0x100003c9, // AVMULHSD
588	0x100002c8, // AVMULEUD
589	0x100003c8, // AVMULESD
590	0x10000017, // AVMSUMCUD
591	0x1000068b, // AVMODUW
592	0x1000060b, // AVMODUQ
593	0x100006cb, // AVMODUD
594	0x1000078b, // AVMODSW
595	0x1000070b, // AVMODSQ
596	0x100007cb, // AVMODSD
597	0x1000018f, // AVINSWVRX
598	0x1000008f, // AVINSWVLX
599	0x1000038f, // AVINSWRX
600	0x1000028f, // AVINSWLX
601	0x100000cf, // AVINSW
602	0x1000014f, // AVINSHVRX
603	0x1000004f, // AVINSHVLX
604	0x1000034f, // AVINSHRX
605	0x1000024f, // AVINSHLX
606	0x100003cf, // AVINSDRX
607	0x100002cf, // AVINSDLX
608	0x100001cf, // AVINSD
609	0x1000010f, // AVINSBVRX
610	0x1000000f, // AVINSBVLX
611	0x1000030f, // AVINSBRX
612	0x1000020f, // AVINSBLX
613	0x100004cc, // AVGNB
614	0x101b0602, // AVEXTSD2Q
615	0x100a0642, // AVEXTRACTWM
616	0x100c0642, // AVEXTRACTQM
617	0x10090642, // AVEXTRACTHM
618	0x100b0642, // AVEXTRACTDM
619	0x10080642, // AVEXTRACTBM
620	0x1000001d, // AVEXTDUWVRX
621	0x1000001c, // AVEXTDUWVLX
622	0x1000001b, // AVEXTDUHVRX
623	0x1000001a, // AVEXTDUHVLX
624	0x10000019, // AVEXTDUBVRX
625	0x10000018, // AVEXTDUBVLX
626	0x1000001f, // AVEXTDDVRX
627	0x1000001e, // AVEXTDDVLX
628	0x10020642, // AVEXPANDWM
629	0x10040642, // AVEXPANDQM
630	0x10010642, // AVEXPANDHM
631	0x10030642, // AVEXPANDDM
632	0x10000642, // AVEXPANDBM
633	0x1000008b, // AVDIVUW
634	0x1000000b, // AVDIVUQ
635	0x100000cb, // AVDIVUD
636	0x1000018b, // AVDIVSW
637	0x1000010b, // AVDIVSQ
638	0x100001cb, // AVDIVSD
639	0x1000028b, // AVDIVEUW
640	0x1000020b, // AVDIVEUQ
641	0x100002cb, // AVDIVEUD
642	0x1000038b, // AVDIVESW
643	0x1000030b, // AVDIVESQ
644	0x100003cb, // AVDIVESD
645	0x100007c4, // AVCTZDM
646	0x101c0642, // AVCNTMBW
647	0x101a0642, // AVCNTMBH
648	0x101e0642, // AVCNTMBD
649	0x10180642, // AVCNTMBB
650	0x10000101, // AVCMPUQ
651	0x10000141, // AVCMPSQ
652	0x10000687, // AVCMPGTUQCC
653	0x10000287, // AVCMPGTUQ
654	0x10000787, // AVCMPGTSQCC
655	0x10000387, // AVCMPGTSQ
656	0x100005c7, // AVCMPEQUQCC
657	0x100001c7, // AVCMPEQUQ
658	0x10000784, // AVCLZDM
659	0x100001cd, // AVCLRRB
660	0x1000018d, // AVCLRLB
661	0x1000054d, // AVCFUGED
662	0x7c00019a, // ASTXVRWX
663	0x7c00015a, // ASTXVRHX
664	0x7c0001da, // ASTXVRDX
665	0x7c00011a, // ASTXVRBX
666	0x7c00039a, // ASTXVPX
667	0x18000001, // ASTXVP
668	0x7c0003c0, // ASETNBCR
669	0x7c000380, // ASETNBC
670	0x7c000340, // ASETBCR
671	0x7c000300, // ASETBC
672	0x7c000178, // APEXTD
673	0x7c000138, // APDEPD
674	0x10120642, // AMTVSRWM
675	0x10140642, // AMTVSRQM
676	0x10110642, // AMTVSRHM
677	0x10130642, // AMTVSRDM
678	0x10000014, // AMTVSRBMI
679	0x10100642, // AMTVSRBM
680	0x7c00009a, // ALXVRWX
681	0x7c00005a, // ALXVRHX
682	0x7c0000da, // ALXVRDX
683	0x7c00001a, // ALXVRBX
684	0x7c00029a, // ALXVPX
685	0x18000000, // ALXVP
686	0xf01f02d0, // ALXVKQ
687	0xfc0107c4, // ADCTFIXQQ
688	0xfc0007c4, // ADCFFIXQQ
689	0x7c000476, // ACNTTZDM
690	0x7c000076, // ACNTLZDM
691	0x7c0001b8, // ACFUGED
692	0x7c000136, // ABRW
693	0x7c0001b6, // ABRH
694	0x7c000176, // ABRD
695	0x7c000524, // AHASHSTP
696	0x7c0005a4, // AHASHST
697	0x7c000564, // AHASHCHKP
698	0x7c0005e4, // AHASHCHK
699	0x80060000, // AXXSPLTIW
700	0x80040000, // AXXSPLTIDP
701	0x80000000, // AXXSPLTI32DX
702	0x88000000, // AXXPERMX
703	0x88000010, // AXXEVAL
704	0x84000020, // AXXBLENDVW
705	0x84000010, // AXXBLENDVH
706	0x84000030, // AXXBLENDVD
707	0x84000000, // AXXBLENDVB
708	0xf8000000, // APSTXVP
709	0xd8000000, // APSTXV
710	0xbc000000, // APSTXSSP
711	0xb8000000, // APSTXSD
712	0x90000000, // APSTW
713	0xf0000000, // APSTQ
714	0xb0000000, // APSTH
715	0xd0000000, // APSTFS
716	0xd8000000, // APSTFD
717	0xf4000000, // APSTD
718	0x98000000, // APSTB
719	0x00000000, // APNOP
720	0xec000318, // APMXVI8GER4SPP
721	0xec000010, // APMXVI8GER4PP
722	0xec000018, // APMXVI8GER4
723	0xec000110, // APMXVI4GER8PP
724	0xec000118, // APMXVI4GER8
725	0xec000150, // APMXVI16GER2SPP
726	0xec000158, // APMXVI16GER2S
727	0xec000358, // APMXVI16GER2PP
728	0xec000258, // APMXVI16GER2
729	0xec0001d0, // APMXVF64GERPP
730	0xec0005d0, // APMXVF64GERPN
731	0xec0003d0, // APMXVF64GERNP
732	0xec0007d0, // APMXVF64GERNN
733	0xec0001d8, // APMXVF64GER
734	0xec0000d0, // APMXVF32GERPP
735	0xec0004d0, // APMXVF32GERPN
736	0xec0002d0, // APMXVF32GERNP
737	0xec0006d0, // APMXVF32GERNN
738	0xec0000d8, // APMXVF32GER
739	0xec000090, // APMXVF16GER2PP
740	0xec000490, // APMXVF16GER2PN
741	0xec000290, // APMXVF16GER2NP
742	0xec000690, // APMXVF16GER2NN
743	0xec000098, // APMXVF16GER2
744	0xec000190, // APMXVBF16GER2PP
745	0xec000590, // APMXVBF16GER2PN
746	0xec000390, // APMXVBF16GER2NP
747	0xec000790, // APMXVBF16GER2NN
748	0xec000198, // APMXVBF16GER2
749	0xe8000000, // APLXVP
750	0xc8000000, // APLXV
751	0xac000000, // APLXSSP
752	0xa8000000, // APLXSD
753	0x80000000, // APLWZ
754	0xa4000000, // APLWA
755	0xe0000000, // APLQ
756	0xa0000000, // APLHZ
757	0xa8000000, // APLHA
758	0xc0000000, // APLFS
759	0xc8000000, // APLFD
760	0xe4000000, // APLD
761	0x88000000, // APLBZ
762	0x38000000, // APADDI
763}
764
765var GenPfxOpcodes = [...]uint32{
766	0x05000000, // AXXSPLTIW
767	0x05000000, // AXXSPLTIDP
768	0x05000000, // AXXSPLTI32DX
769	0x05000000, // AXXPERMX
770	0x05000000, // AXXEVAL
771	0x05000000, // AXXBLENDVW
772	0x05000000, // AXXBLENDVH
773	0x05000000, // AXXBLENDVD
774	0x05000000, // AXXBLENDVB
775	0x04000000, // APSTXVP
776	0x04000000, // APSTXV
777	0x04000000, // APSTXSSP
778	0x04000000, // APSTXSD
779	0x06000000, // APSTW
780	0x04000000, // APSTQ
781	0x06000000, // APSTH
782	0x06000000, // APSTFS
783	0x06000000, // APSTFD
784	0x04000000, // APSTD
785	0x06000000, // APSTB
786	0x07000000, // APNOP
787	0x07900000, // APMXVI8GER4SPP
788	0x07900000, // APMXVI8GER4PP
789	0x07900000, // APMXVI8GER4
790	0x07900000, // APMXVI4GER8PP
791	0x07900000, // APMXVI4GER8
792	0x07900000, // APMXVI16GER2SPP
793	0x07900000, // APMXVI16GER2S
794	0x07900000, // APMXVI16GER2PP
795	0x07900000, // APMXVI16GER2
796	0x07900000, // APMXVF64GERPP
797	0x07900000, // APMXVF64GERPN
798	0x07900000, // APMXVF64GERNP
799	0x07900000, // APMXVF64GERNN
800	0x07900000, // APMXVF64GER
801	0x07900000, // APMXVF32GERPP
802	0x07900000, // APMXVF32GERPN
803	0x07900000, // APMXVF32GERNP
804	0x07900000, // APMXVF32GERNN
805	0x07900000, // APMXVF32GER
806	0x07900000, // APMXVF16GER2PP
807	0x07900000, // APMXVF16GER2PN
808	0x07900000, // APMXVF16GER2NP
809	0x07900000, // APMXVF16GER2NN
810	0x07900000, // APMXVF16GER2
811	0x07900000, // APMXVBF16GER2PP
812	0x07900000, // APMXVBF16GER2PN
813	0x07900000, // APMXVBF16GER2NP
814	0x07900000, // APMXVBF16GER2NN
815	0x07900000, // APMXVBF16GER2
816	0x04000000, // APLXVP
817	0x04000000, // APLXV
818	0x04000000, // APLXSSP
819	0x04000000, // APLXSD
820	0x06000000, // APLWZ
821	0x04000000, // APLWA
822	0x04000000, // APLQ
823	0x06000000, // APLHZ
824	0x06000000, // APLHA
825	0x06000000, // APLFS
826	0x06000000, // APLFD
827	0x04000000, // APLD
828	0x06000000, // APLBZ
829	0x06000000, // APADDI
830}
831
832var optabGen = []Optab{
833	{as: ABRW, a1: C_REG, a6: C_REG, asmout: type_brw, size: 4},
834	{as: ADCFFIXQQ, a1: C_VREG, a6: C_FREGP, asmout: type_xscvuqqp, size: 4},
835	{as: ADCTFIXQQ, a1: C_FREGP, a6: C_VREG, asmout: type_xscvuqqp, size: 4},
836	{as: AHASHCHKP, a1: C_SOREG, a6: C_REG, asmout: type_hashchkp, size: 4},
837	{as: AHASHSTP, a1: C_REG, a6: C_SOREG, asmout: type_hashstp, size: 4},
838	{as: ALXVKQ, a1: C_U5CON, a6: C_VSREG, asmout: type_lxvkq, size: 4},
839	{as: ALXVP, a1: C_SOREG, a6: C_VSREGP, asmout: type_lxvp, size: 4},
840	{as: ALXVPX, a1: C_XOREG, a6: C_VSREGP, asmout: type_lxvpx, size: 4},
841	{as: ALXVRWX, a1: C_XOREG, a6: C_VSREG, asmout: type_lxvrwx, size: 4},
842	{as: AMTVSRBMI, a1: C_U16CON, a6: C_VREG, asmout: type_mtvsrbmi, size: 4},
843	{as: AMTVSRWM, a1: C_REG, a6: C_VREG, asmout: type_xscvuqqp, size: 4},
844	{as: APADDI, a1: C_REG, a3: C_S34CON, a4: C_U1CON, a6: C_REG, asmout: type_paddi, ispfx: true, size: 8},
845	{as: APEXTD, a1: C_REG, a2: C_REG, a6: C_REG, asmout: type_pextd, size: 4},
846	{as: APLFS, a1: C_LOREG, a3: C_U1CON, a6: C_FREG, asmout: type_plxssp, ispfx: true, size: 8},
847	{as: APLQ, a1: C_LOREG, a3: C_U1CON, a6: C_REGP, asmout: type_plxssp, ispfx: true, size: 8},
848	{as: APLWZ, a1: C_LOREG, a3: C_U1CON, a6: C_REG, asmout: type_plxssp, ispfx: true, size: 8},
849	{as: APLXSSP, a1: C_LOREG, a3: C_U1CON, a6: C_VREG, asmout: type_plxssp, ispfx: true, size: 8},
850	{as: APLXV, a1: C_LOREG, a3: C_U1CON, a6: C_VSREG, asmout: type_plxv, ispfx: true, size: 8},
851	{as: APLXVP, a1: C_LOREG, a3: C_U1CON, a6: C_VSREGP, asmout: type_plxvp, ispfx: true, size: 8},
852	{as: APMXVF32GERPP, a1: C_VSREG, a2: C_VSREG, a3: C_U4CON, a4: C_U4CON, a6: C_AREG, asmout: type_pmxvf32gerpp, ispfx: true, size: 8},
853	{as: APMXVF64GERPP, a1: C_VSREGP, a2: C_VSREG, a3: C_U4CON, a4: C_U2CON, a6: C_AREG, asmout: type_pmxvf64gerpp, ispfx: true, size: 8},
854	{as: APMXVI16GER2SPP, a1: C_VSREG, a2: C_VSREG, a3: C_U4CON, a4: C_U4CON, a5: C_U2CON, a6: C_AREG, asmout: type_pmxvi16ger2spp, ispfx: true, size: 8},
855	{as: APMXVI4GER8PP, a1: C_VSREG, a2: C_VSREG, a3: C_U4CON, a4: C_U4CON, a5: C_U8CON, a6: C_AREG, asmout: type_pmxvi4ger8pp, ispfx: true, size: 8},
856	{as: APMXVI8GER4SPP, a1: C_VSREG, a2: C_VSREG, a3: C_U4CON, a4: C_U4CON, a5: C_U4CON, a6: C_AREG, asmout: type_pmxvi8ger4spp, ispfx: true, size: 8},
857	{as: APNOP, asmout: type_pnop, ispfx: true, size: 8},
858	{as: APSTFS, a1: C_FREG, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxssp, ispfx: true, size: 8},
859	{as: APSTQ, a1: C_REGP, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxssp, ispfx: true, size: 8},
860	{as: APSTW, a1: C_REG, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxssp, ispfx: true, size: 8},
861	{as: APSTXSSP, a1: C_VREG, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxssp, ispfx: true, size: 8},
862	{as: APSTXV, a1: C_VSREG, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxv, ispfx: true, size: 8},
863	{as: APSTXVP, a1: C_VSREGP, a3: C_U1CON, a6: C_LOREG, asmout: type_pstxvp, ispfx: true, size: 8},
864	{as: ASETNBCR, a1: C_CRBIT, a6: C_REG, asmout: type_setnbcr, size: 4},
865	{as: ASTXVP, a1: C_VSREGP, a6: C_SOREG, asmout: type_stxvp, size: 4},
866	{as: ASTXVPX, a1: C_VSREGP, a6: C_XOREG, asmout: type_stxvpx, size: 4},
867	{as: ASTXVRWX, a1: C_VSREG, a6: C_XOREG, asmout: type_stxvrwx, size: 4},
868	{as: AVCLRRB, a1: C_VREG, a2: C_REG, a6: C_VREG, asmout: type_xsmincqp, size: 4},
869	{as: AVCMPUQ, a1: C_VREG, a2: C_VREG, a6: C_CREG, asmout: type_vcmpuq, size: 4},
870	{as: AVCNTMBW, a1: C_VREG, a3: C_U1CON, a6: C_REG, asmout: type_vcntmbw, size: 4},
871	{as: AVEXTDUWVRX, a1: C_VREG, a2: C_VREG, a3: C_REG, a6: C_VREG, asmout: type_vmsumcud, size: 4},
872	{as: AVEXTRACTWM, a1: C_VREG, a6: C_REG, asmout: type_xscvuqqp, size: 4},
873	{as: AVGNB, a1: C_VREG, a3: C_U3CON, a6: C_REG, asmout: type_vgnb, size: 4},
874	{as: AVINSW, a1: C_REG, a3: C_U4CON, a6: C_VREG, asmout: type_vinsw, size: 4},
875	{as: AVINSWRX, a1: C_REG, a2: C_REG, a6: C_VREG, asmout: type_xsmincqp, size: 4},
876	{as: AVINSWVRX, a1: C_REG, a2: C_VREG, a6: C_VREG, asmout: type_xsmincqp, size: 4},
877	{as: AVMSUMCUD, a1: C_VREG, a2: C_VREG, a3: C_VREG, a6: C_VREG, asmout: type_vmsumcud, size: 4},
878	{as: AVSRDBI, a1: C_VREG, a2: C_VREG, a3: C_U3CON, a6: C_VREG, asmout: type_vsrdbi, size: 4},
879	{as: AXSCVUQQP, a1: C_VREG, a6: C_VREG, asmout: type_xscvuqqp, size: 4},
880	{as: AXSMINCQP, a1: C_VREG, a2: C_VREG, a6: C_VREG, asmout: type_xsmincqp, size: 4},
881	{as: AXVCVSPBF16, a1: C_VSREG, a6: C_VSREG, asmout: type_xvcvspbf16, size: 4},
882	{as: AXVI8GER4SPP, a1: C_VSREG, a2: C_VSREG, a6: C_AREG, asmout: type_xvi8ger4spp, size: 4},
883	{as: AXVTLSBB, a1: C_VSREG, a6: C_CREG, asmout: type_xvtlsbb, size: 4},
884	{as: AXXBLENDVW, a1: C_VSREG, a2: C_VSREG, a3: C_VSREG, a6: C_VSREG, asmout: type_xxblendvw, ispfx: true, size: 8},
885	{as: AXXEVAL, a1: C_VSREG, a2: C_VSREG, a3: C_VSREG, a4: C_U8CON, a6: C_VSREG, asmout: type_xxeval, ispfx: true, size: 8},
886	{as: AXXGENPCVWM, a1: C_VREG, a3: C_U5CON, a6: C_VSREG, asmout: type_xxgenpcvwm, size: 4},
887	{as: AXXPERMX, a1: C_VSREG, a2: C_VSREG, a3: C_VSREG, a4: C_U3CON, a6: C_VSREG, asmout: type_xxpermx, ispfx: true, size: 8},
888	{as: AXXSETACCZ, a6: C_AREG, asmout: type_xxsetaccz, size: 4},
889	{as: AXXSPLTI32DX, a1: C_U1CON, a3: C_U32CON, a6: C_VSREG, asmout: type_xxsplti32dx, ispfx: true, size: 8},
890	{as: AXXSPLTIW, a1: C_U32CON, a6: C_VSREG, asmout: type_xxspltiw, ispfx: true, size: 8},
891}
892
893// brw RA,RS
894func type_brw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
895	o0 := GenOpcodes[p.As-AXXSETACCZ]
896	o0 |= uint32(p.To.Reg&0x1f) << 16   // RA
897	o0 |= uint32(p.From.Reg&0x1f) << 21 // RS
898	out[0] = o0
899}
900
901// hashchkp RB,offset(RA)
902func type_hashchkp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
903	o0 := GenOpcodes[p.As-AXXSETACCZ]
904	o0 |= uint32(p.To.Reg&0x1f) << 11           // RB
905	o0 |= uint32((p.From.Offset>>8)&0x1) << 0   // DX
906	o0 |= uint32((p.From.Offset>>3)&0x1f) << 21 // D
907	o0 |= uint32(p.From.Reg&0x1f) << 16         // RA
908	if p.From.Offset&0xfffffe07 != 0xfffffe00 {
909		c.ctxt.Diag("Constant(%d) must within the range of [-512,-8] in steps of 8\n%v", p.From.Offset, p)
910	}
911	out[0] = o0
912}
913
914// hashstp RB,offset(RA)
915func type_hashstp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
916	o0 := GenOpcodes[p.As-AXXSETACCZ]
917	o0 |= uint32(p.From.Reg&0x1f) << 11       // RB
918	o0 |= uint32((p.To.Offset>>8)&0x1) << 0   // DX
919	o0 |= uint32((p.To.Offset>>3)&0x1f) << 21 // D
920	o0 |= uint32(p.To.Reg&0x1f) << 16         // RA
921	if p.To.Offset&0xfffffe07 != 0xfffffe00 {
922		c.ctxt.Diag("Constant(%d) must within the range of [-512,-8] in steps of 8\n%v", p.To.Offset, p)
923	}
924	out[0] = o0
925}
926
927// lxvkq XT,UIM
928func type_lxvkq(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
929	o0 := GenOpcodes[p.As-AXXSETACCZ]
930	o0 |= uint32((p.To.Reg>>5)&0x1) << 0   // TX
931	o0 |= uint32(p.To.Reg&0x1f) << 21      // T
932	o0 |= uint32(p.From.Offset&0x1f) << 11 // UIM
933	out[0] = o0
934}
935
936// lxvp XTp,DQ(RA)
937func type_lxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
938	o0 := GenOpcodes[p.As-AXXSETACCZ]
939	o0 |= uint32((p.To.Reg>>5)&0x1) << 21       // TX
940	o0 |= uint32((p.To.Reg>>1)&0xf) << 22       // Tp
941	o0 |= uint32((p.From.Offset>>4)&0xfff) << 4 // DQ
942	o0 |= uint32(p.From.Reg&0x1f) << 16         // RA
943	if p.From.Offset&0xf != 0 {
944		c.ctxt.Diag("Constant 0x%x (%d) is not a multiple of 16\n%v", p.From.Offset, p.From.Offset, p)
945	}
946	out[0] = o0
947}
948
949// lxvpx XTp,RA,RB
950func type_lxvpx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
951	o0 := GenOpcodes[p.As-AXXSETACCZ]
952	o0 |= uint32((p.To.Reg>>5)&0x1) << 21 // TX
953	o0 |= uint32((p.To.Reg>>1)&0xf) << 22 // Tp
954	o0 |= uint32(p.From.Index&0x1f) << 16 // RA
955	o0 |= uint32(p.From.Reg&0x1f) << 11   // RB
956	out[0] = o0
957}
958
959// lxvrwx XT,RA,RB
960func type_lxvrwx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
961	o0 := GenOpcodes[p.As-AXXSETACCZ]
962	o0 |= uint32((p.To.Reg>>5)&0x1) << 0  // TX
963	o0 |= uint32(p.To.Reg&0x1f) << 21     // T
964	o0 |= uint32(p.From.Index&0x1f) << 16 // RA
965	o0 |= uint32(p.From.Reg&0x1f) << 11   // RB
966	out[0] = o0
967}
968
969// mtvsrbmi VRT,bm
970func type_mtvsrbmi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
971	o0 := GenOpcodes[p.As-AXXSETACCZ]
972	o0 |= uint32(p.To.Reg&0x1f) << 21           // VRT
973	o0 |= uint32((p.From.Offset>>6)&0x3ff) << 6 // b0
974	o0 |= uint32((p.From.Offset>>1)&0x1f) << 16 // b1
975	o0 |= uint32(p.From.Offset&0x1) << 0        // b2
976	out[0] = o0
977}
978
979// paddi RT,RA,SI,R
980func type_paddi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
981	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
982	o1 := GenOpcodes[p.As-AXXSETACCZ]
983	o1 |= uint32(p.To.Reg&0x1f) << 21                          // RT
984	o1 |= uint32(p.From.Reg&0x1f) << 16                        // RA
985	o0 |= uint32((p.RestArgs[0].Addr.Offset>>16)&0x3ffff) << 0 // si0
986	o1 |= uint32(p.RestArgs[0].Addr.Offset&0xffff) << 0        // si1
987	o0 |= uint32(p.RestArgs[1].Addr.Offset&0x1) << 20          // R
988	out[1] = o1
989	out[0] = o0
990}
991
992// pextd RA,RS,RB
993func type_pextd(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
994	o0 := GenOpcodes[p.As-AXXSETACCZ]
995	o0 |= uint32(p.To.Reg&0x1f) << 16   // RA
996	o0 |= uint32(p.From.Reg&0x1f) << 21 // RS
997	o0 |= uint32(p.Reg&0x1f) << 11      // RB
998	out[0] = o0
999}
1000
1001// plxssp VRT,D(RA),R
1002func type_plxssp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1003	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1004	o1 := GenOpcodes[p.As-AXXSETACCZ]
1005	o1 |= uint32(p.To.Reg&0x1f) << 21                 // VRT
1006	o0 |= uint32((p.From.Offset>>16)&0x3ffff) << 0    // d0
1007	o1 |= uint32(p.From.Offset&0xffff) << 0           // d1
1008	o1 |= uint32(p.From.Reg&0x1f) << 16               // RA
1009	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1010	out[1] = o1
1011	out[0] = o0
1012}
1013
1014// plxv XT,D(RA),R
1015func type_plxv(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1016	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1017	o1 := GenOpcodes[p.As-AXXSETACCZ]
1018	o1 |= uint32((p.To.Reg>>5)&0x1) << 26             // TX
1019	o1 |= uint32(p.To.Reg&0x1f) << 21                 // T
1020	o0 |= uint32((p.From.Offset>>16)&0x3ffff) << 0    // d0
1021	o1 |= uint32(p.From.Offset&0xffff) << 0           // d1
1022	o1 |= uint32(p.From.Reg&0x1f) << 16               // RA
1023	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1024	out[1] = o1
1025	out[0] = o0
1026}
1027
1028// plxvp XTp,D(RA),R
1029func type_plxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1030	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1031	o1 := GenOpcodes[p.As-AXXSETACCZ]
1032	o1 |= uint32((p.To.Reg>>5)&0x1) << 21             // TX
1033	o1 |= uint32((p.To.Reg>>1)&0xf) << 22             // Tp
1034	o0 |= uint32((p.From.Offset>>16)&0x3ffff) << 0    // d0
1035	o1 |= uint32(p.From.Offset&0xffff) << 0           // d1
1036	o1 |= uint32(p.From.Reg&0x1f) << 16               // RA
1037	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1038	out[1] = o1
1039	out[0] = o0
1040}
1041
1042// pmxvf32gerpp AT,XA,XB,XMSK,YMSK
1043func type_pmxvf32gerpp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1044	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1045	o1 := GenOpcodes[p.As-AXXSETACCZ]
1046	o1 |= uint32(p.To.Reg&0x7) << 23                 // AT
1047	o1 |= uint32((p.From.Reg>>5)&0x1) << 2           // AX
1048	o1 |= uint32(p.From.Reg&0x1f) << 16              // A
1049	o1 |= uint32((p.Reg>>5)&0x1) << 1                // BX
1050	o1 |= uint32(p.Reg&0x1f) << 11                   // B
1051	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 4 // XMSK
1052	o0 |= uint32(p.RestArgs[1].Addr.Offset&0xf) << 0 // YMSK
1053	out[1] = o1
1054	out[0] = o0
1055}
1056
1057// pmxvf64gerpp AT,XAp,XB,XMSK,YMSK
1058func type_pmxvf64gerpp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1059	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1060	o1 := GenOpcodes[p.As-AXXSETACCZ]
1061	o1 |= uint32(p.To.Reg&0x7) << 23                 // AT
1062	o1 |= uint32((p.From.Reg>>5)&0x1) << 2           // AX
1063	o1 |= uint32(p.From.Reg&0x1f) << 16              // Ap
1064	o1 |= uint32((p.Reg>>5)&0x1) << 1                // BX
1065	o1 |= uint32(p.Reg&0x1f) << 11                   // B
1066	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 4 // XMSK
1067	o0 |= uint32(p.RestArgs[1].Addr.Offset&0x3) << 2 // YMSK
1068	out[1] = o1
1069	out[0] = o0
1070}
1071
1072// pmxvi16ger2spp AT,XA,XB,XMSK,YMSK,PMSK
1073func type_pmxvi16ger2spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1074	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1075	o1 := GenOpcodes[p.As-AXXSETACCZ]
1076	o1 |= uint32(p.To.Reg&0x7) << 23                  // AT
1077	o1 |= uint32((p.From.Reg>>5)&0x1) << 2            // AX
1078	o1 |= uint32(p.From.Reg&0x1f) << 16               // A
1079	o1 |= uint32((p.Reg>>5)&0x1) << 1                 // BX
1080	o1 |= uint32(p.Reg&0x1f) << 11                    // B
1081	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 4  // XMSK
1082	o0 |= uint32(p.RestArgs[1].Addr.Offset&0xf) << 0  // YMSK
1083	o0 |= uint32(p.RestArgs[2].Addr.Offset&0x3) << 14 // PMSK
1084	out[1] = o1
1085	out[0] = o0
1086}
1087
1088// pmxvi4ger8pp AT,XA,XB,XMSK,YMSK,PMSK
1089func type_pmxvi4ger8pp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1090	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1091	o1 := GenOpcodes[p.As-AXXSETACCZ]
1092	o1 |= uint32(p.To.Reg&0x7) << 23                  // AT
1093	o1 |= uint32((p.From.Reg>>5)&0x1) << 2            // AX
1094	o1 |= uint32(p.From.Reg&0x1f) << 16               // A
1095	o1 |= uint32((p.Reg>>5)&0x1) << 1                 // BX
1096	o1 |= uint32(p.Reg&0x1f) << 11                    // B
1097	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 4  // XMSK
1098	o0 |= uint32(p.RestArgs[1].Addr.Offset&0xf) << 0  // YMSK
1099	o0 |= uint32(p.RestArgs[2].Addr.Offset&0xff) << 8 // PMSK
1100	out[1] = o1
1101	out[0] = o0
1102}
1103
1104// pmxvi8ger4spp AT,XA,XB,XMSK,YMSK,PMSK
1105func type_pmxvi8ger4spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1106	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1107	o1 := GenOpcodes[p.As-AXXSETACCZ]
1108	o1 |= uint32(p.To.Reg&0x7) << 23                  // AT
1109	o1 |= uint32((p.From.Reg>>5)&0x1) << 2            // AX
1110	o1 |= uint32(p.From.Reg&0x1f) << 16               // A
1111	o1 |= uint32((p.Reg>>5)&0x1) << 1                 // BX
1112	o1 |= uint32(p.Reg&0x1f) << 11                    // B
1113	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 4  // XMSK
1114	o0 |= uint32(p.RestArgs[1].Addr.Offset&0xf) << 0  // YMSK
1115	o0 |= uint32(p.RestArgs[2].Addr.Offset&0xf) << 12 // PMSK
1116	out[1] = o1
1117	out[0] = o0
1118}
1119
1120// pnop
1121func type_pnop(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1122	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1123	o1 := GenOpcodes[p.As-AXXSETACCZ]
1124	out[1] = o1
1125	out[0] = o0
1126}
1127
1128// pstxssp VRS,D(RA),R
1129func type_pstxssp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1130	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1131	o1 := GenOpcodes[p.As-AXXSETACCZ]
1132	o1 |= uint32(p.From.Reg&0x1f) << 21               // VRS
1133	o0 |= uint32((p.To.Offset>>16)&0x3ffff) << 0      // d0
1134	o1 |= uint32(p.To.Offset&0xffff) << 0             // d1
1135	o1 |= uint32(p.To.Reg&0x1f) << 16                 // RA
1136	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1137	out[1] = o1
1138	out[0] = o0
1139}
1140
1141// pstxv XS,D(RA),R
1142func type_pstxv(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1143	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1144	o1 := GenOpcodes[p.As-AXXSETACCZ]
1145	o1 |= uint32((p.From.Reg>>5)&0x1) << 26           // SX
1146	o1 |= uint32(p.From.Reg&0x1f) << 21               // S
1147	o0 |= uint32((p.To.Offset>>16)&0x3ffff) << 0      // d0
1148	o1 |= uint32(p.To.Offset&0xffff) << 0             // d1
1149	o1 |= uint32(p.To.Reg&0x1f) << 16                 // RA
1150	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1151	out[1] = o1
1152	out[0] = o0
1153}
1154
1155// pstxvp XSp,D(RA),R
1156func type_pstxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1157	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1158	o1 := GenOpcodes[p.As-AXXSETACCZ]
1159	o1 |= uint32((p.From.Reg>>5)&0x1) << 21           // SX
1160	o1 |= uint32((p.From.Reg>>1)&0xf) << 22           // Sp
1161	o0 |= uint32((p.To.Offset>>16)&0x3ffff) << 0      // d0
1162	o1 |= uint32(p.To.Offset&0xffff) << 0             // d1
1163	o1 |= uint32(p.To.Reg&0x1f) << 16                 // RA
1164	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 20 // R
1165	out[1] = o1
1166	out[0] = o0
1167}
1168
1169// setnbcr RT,BI
1170func type_setnbcr(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1171	o0 := GenOpcodes[p.As-AXXSETACCZ]
1172	o0 |= uint32(p.To.Reg&0x1f) << 21   // RT
1173	o0 |= uint32(p.From.Reg&0x1f) << 16 // BI
1174	out[0] = o0
1175}
1176
1177// stxvp XSp,DQ(RA)
1178func type_stxvp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1179	o0 := GenOpcodes[p.As-AXXSETACCZ]
1180	o0 |= uint32((p.From.Reg>>5)&0x1) << 21   // SX
1181	o0 |= uint32((p.From.Reg>>1)&0xf) << 22   // Sp
1182	o0 |= uint32((p.To.Offset>>4)&0xfff) << 4 // DQ
1183	o0 |= uint32(p.To.Reg&0x1f) << 16         // RA
1184	if p.To.Offset&0xf != 0 {
1185		c.ctxt.Diag("Constant 0x%x (%d) is not a multiple of 16\n%v", p.To.Offset, p.To.Offset, p)
1186	}
1187	out[0] = o0
1188}
1189
1190// stxvpx XSp,RA,RB
1191func type_stxvpx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1192	o0 := GenOpcodes[p.As-AXXSETACCZ]
1193	o0 |= uint32((p.From.Reg>>5)&0x1) << 21 // SX
1194	o0 |= uint32((p.From.Reg>>1)&0xf) << 22 // Sp
1195	o0 |= uint32(p.To.Index&0x1f) << 16     // RA
1196	o0 |= uint32(p.To.Reg&0x1f) << 11       // RB
1197	out[0] = o0
1198}
1199
1200// stxvrwx XS,RA,RB
1201func type_stxvrwx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1202	o0 := GenOpcodes[p.As-AXXSETACCZ]
1203	o0 |= uint32((p.From.Reg>>5)&0x1) << 0 // SX
1204	o0 |= uint32(p.From.Reg&0x1f) << 21    // S
1205	o0 |= uint32(p.To.Index&0x1f) << 16    // RA
1206	o0 |= uint32(p.To.Reg&0x1f) << 11      // RB
1207	out[0] = o0
1208}
1209
1210// vcmpuq BF,VRA,VRB
1211func type_vcmpuq(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1212	o0 := GenOpcodes[p.As-AXXSETACCZ]
1213	o0 |= uint32(p.To.Reg&0x7) << 23    // BF
1214	o0 |= uint32(p.From.Reg&0x1f) << 16 // VRA
1215	o0 |= uint32(p.Reg&0x1f) << 11      // VRB
1216	out[0] = o0
1217}
1218
1219// vcntmbw RT,VRB,MP
1220func type_vcntmbw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1221	o0 := GenOpcodes[p.As-AXXSETACCZ]
1222	o0 |= uint32(p.To.Reg&0x1f) << 21                 // RT
1223	o0 |= uint32(p.From.Reg&0x1f) << 11               // VRB
1224	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1) << 16 // MP
1225	out[0] = o0
1226}
1227
1228// vgnb RT,VRB,N
1229func type_vgnb(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1230	o0 := GenOpcodes[p.As-AXXSETACCZ]
1231	o0 |= uint32(p.To.Reg&0x1f) << 21                 // RT
1232	o0 |= uint32(p.From.Reg&0x1f) << 11               // VRB
1233	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x7) << 16 // N
1234	out[0] = o0
1235}
1236
1237// vinsw VRT,RB,UIM
1238func type_vinsw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1239	o0 := GenOpcodes[p.As-AXXSETACCZ]
1240	o0 |= uint32(p.To.Reg&0x1f) << 21                 // VRT
1241	o0 |= uint32(p.From.Reg&0x1f) << 11               // RB
1242	o0 |= uint32(p.RestArgs[0].Addr.Offset&0xf) << 16 // UIM
1243	out[0] = o0
1244}
1245
1246// vmsumcud VRT,VRA,VRB,VRC
1247func type_vmsumcud(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1248	o0 := GenOpcodes[p.As-AXXSETACCZ]
1249	o0 |= uint32(p.To.Reg&0x1f) << 21              // VRT
1250	o0 |= uint32(p.From.Reg&0x1f) << 16            // VRA
1251	o0 |= uint32(p.Reg&0x1f) << 11                 // VRB
1252	o0 |= uint32(p.RestArgs[0].Addr.Reg&0x1f) << 6 // VRC
1253	out[0] = o0
1254}
1255
1256// vsrdbi VRT,VRA,VRB,SH
1257func type_vsrdbi(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1258	o0 := GenOpcodes[p.As-AXXSETACCZ]
1259	o0 |= uint32(p.To.Reg&0x1f) << 21                // VRT
1260	o0 |= uint32(p.From.Reg&0x1f) << 16              // VRA
1261	o0 |= uint32(p.Reg&0x1f) << 11                   // VRB
1262	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x7) << 6 // SH
1263	out[0] = o0
1264}
1265
1266// xscvuqqp VRT,VRB
1267func type_xscvuqqp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1268	o0 := GenOpcodes[p.As-AXXSETACCZ]
1269	o0 |= uint32(p.To.Reg&0x1f) << 21   // VRT
1270	o0 |= uint32(p.From.Reg&0x1f) << 11 // VRB
1271	out[0] = o0
1272}
1273
1274// xsmincqp VRT,VRA,VRB
1275func type_xsmincqp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1276	o0 := GenOpcodes[p.As-AXXSETACCZ]
1277	o0 |= uint32(p.To.Reg&0x1f) << 21   // VRT
1278	o0 |= uint32(p.From.Reg&0x1f) << 16 // VRA
1279	o0 |= uint32(p.Reg&0x1f) << 11      // VRB
1280	out[0] = o0
1281}
1282
1283// xvcvspbf16 XT,XB
1284func type_xvcvspbf16(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1285	o0 := GenOpcodes[p.As-AXXSETACCZ]
1286	o0 |= uint32((p.To.Reg>>5)&0x1) << 0   // TX
1287	o0 |= uint32(p.To.Reg&0x1f) << 21      // T
1288	o0 |= uint32((p.From.Reg>>5)&0x1) << 1 // BX
1289	o0 |= uint32(p.From.Reg&0x1f) << 11    // B
1290	out[0] = o0
1291}
1292
1293// xvi8ger4spp AT,XA,XB
1294func type_xvi8ger4spp(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1295	o0 := GenOpcodes[p.As-AXXSETACCZ]
1296	o0 |= uint32(p.To.Reg&0x7) << 23       // AT
1297	o0 |= uint32((p.From.Reg>>5)&0x1) << 2 // AX
1298	o0 |= uint32(p.From.Reg&0x1f) << 16    // A
1299	o0 |= uint32((p.Reg>>5)&0x1) << 1      // BX
1300	o0 |= uint32(p.Reg&0x1f) << 11         // B
1301	out[0] = o0
1302}
1303
1304// xvtlsbb BF,XB
1305func type_xvtlsbb(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1306	o0 := GenOpcodes[p.As-AXXSETACCZ]
1307	o0 |= uint32(p.To.Reg&0x7) << 23       // BF
1308	o0 |= uint32((p.From.Reg>>5)&0x1) << 1 // BX
1309	o0 |= uint32(p.From.Reg&0x1f) << 11    // B
1310	out[0] = o0
1311}
1312
1313// xxblendvw XT,XA,XB,XC
1314func type_xxblendvw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1315	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1316	o1 := GenOpcodes[p.As-AXXSETACCZ]
1317	o1 |= uint32((p.To.Reg>>5)&0x1) << 0               // TX
1318	o1 |= uint32(p.To.Reg&0x1f) << 21                  // T
1319	o1 |= uint32((p.From.Reg>>5)&0x1) << 2             // AX
1320	o1 |= uint32(p.From.Reg&0x1f) << 16                // A
1321	o1 |= uint32((p.Reg>>5)&0x1) << 1                  // BX
1322	o1 |= uint32(p.Reg&0x1f) << 11                     // B
1323	o1 |= uint32((p.RestArgs[0].Addr.Reg>>5)&0x1) << 3 // CX
1324	o1 |= uint32(p.RestArgs[0].Addr.Reg&0x1f) << 6     // C
1325	out[1] = o1
1326	out[0] = o0
1327}
1328
1329// xxeval XT,XA,XB,XC,IMM
1330func type_xxeval(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1331	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1332	o1 := GenOpcodes[p.As-AXXSETACCZ]
1333	o1 |= uint32((p.To.Reg>>5)&0x1) << 0               // TX
1334	o1 |= uint32(p.To.Reg&0x1f) << 21                  // T
1335	o1 |= uint32((p.From.Reg>>5)&0x1) << 2             // AX
1336	o1 |= uint32(p.From.Reg&0x1f) << 16                // A
1337	o1 |= uint32((p.Reg>>5)&0x1) << 1                  // BX
1338	o1 |= uint32(p.Reg&0x1f) << 11                     // B
1339	o1 |= uint32((p.RestArgs[0].Addr.Reg>>5)&0x1) << 3 // CX
1340	o1 |= uint32(p.RestArgs[0].Addr.Reg&0x1f) << 6     // C
1341	o0 |= uint32(p.RestArgs[1].Addr.Offset&0xff) << 0  // IMM
1342	out[1] = o1
1343	out[0] = o0
1344}
1345
1346// xxgenpcvwm XT,VRB,IMM
1347func type_xxgenpcvwm(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1348	o0 := GenOpcodes[p.As-AXXSETACCZ]
1349	o0 |= uint32((p.To.Reg>>5)&0x1) << 0               // TX
1350	o0 |= uint32(p.To.Reg&0x1f) << 21                  // T
1351	o0 |= uint32(p.From.Reg&0x1f) << 11                // VRB
1352	o0 |= uint32(p.RestArgs[0].Addr.Offset&0x1f) << 16 // IMM
1353	out[0] = o0
1354}
1355
1356// xxpermx XT,XA,XB,XC,UIM
1357func type_xxpermx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1358	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1359	o1 := GenOpcodes[p.As-AXXSETACCZ]
1360	o1 |= uint32((p.To.Reg>>5)&0x1) << 0               // TX
1361	o1 |= uint32(p.To.Reg&0x1f) << 21                  // T
1362	o1 |= uint32((p.From.Reg>>5)&0x1) << 2             // AX
1363	o1 |= uint32(p.From.Reg&0x1f) << 16                // A
1364	o1 |= uint32((p.Reg>>5)&0x1) << 1                  // BX
1365	o1 |= uint32(p.Reg&0x1f) << 11                     // B
1366	o1 |= uint32((p.RestArgs[0].Addr.Reg>>5)&0x1) << 3 // CX
1367	o1 |= uint32(p.RestArgs[0].Addr.Reg&0x1f) << 6     // C
1368	o0 |= uint32(p.RestArgs[1].Addr.Offset&0x7) << 0   // UIM
1369	out[1] = o1
1370	out[0] = o0
1371}
1372
1373// xxsetaccz AT
1374func type_xxsetaccz(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1375	o0 := GenOpcodes[p.As-AXXSETACCZ]
1376	o0 |= uint32(p.To.Reg&0x7) << 23 // AT
1377	out[0] = o0
1378}
1379
1380// xxsplti32dx XT,IX,IMM32
1381func type_xxsplti32dx(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1382	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1383	o1 := GenOpcodes[p.As-AXXSETACCZ]
1384	o1 |= uint32((p.To.Reg>>5)&0x1) << 16                     // TX
1385	o1 |= uint32(p.To.Reg&0x1f) << 21                         // T
1386	o1 |= uint32(p.From.Offset&0x1) << 17                     // IX
1387	o0 |= uint32((p.RestArgs[0].Addr.Offset>>16)&0xffff) << 0 // imm0
1388	o1 |= uint32(p.RestArgs[0].Addr.Offset&0xffff) << 0       // imm1
1389	out[1] = o1
1390	out[0] = o0
1391}
1392
1393// xxspltiw XT,IMM32
1394func type_xxspltiw(c *ctxt9, p *obj.Prog, t *Optab, out *[5]uint32) {
1395	o0 := GenPfxOpcodes[p.As-AXXSPLTIW]
1396	o1 := GenOpcodes[p.As-AXXSETACCZ]
1397	o1 |= uint32((p.To.Reg>>5)&0x1) << 16         // TX
1398	o1 |= uint32(p.To.Reg&0x1f) << 21             // T
1399	o0 |= uint32((p.From.Offset>>16)&0xffff) << 0 // imm0
1400	o1 |= uint32(p.From.Offset&0xffff) << 0       // imm1
1401	out[1] = o1
1402	out[0] = o0
1403}
1404
1405func opsetGen(from obj.As) bool {
1406	r0 := from & obj.AMask
1407	switch from {
1408	case ABRW:
1409		opset(ABRH, r0)
1410		opset(ABRD, r0)
1411	case ADCFFIXQQ:
1412	case ADCTFIXQQ:
1413	case AHASHCHKP:
1414		opset(AHASHCHK, r0)
1415	case AHASHSTP:
1416		opset(AHASHST, r0)
1417	case ALXVKQ:
1418	case ALXVP:
1419	case ALXVPX:
1420	case ALXVRWX:
1421		opset(ALXVRHX, r0)
1422		opset(ALXVRDX, r0)
1423		opset(ALXVRBX, r0)
1424	case AMTVSRBMI:
1425	case AMTVSRWM:
1426		opset(AMTVSRQM, r0)
1427		opset(AMTVSRHM, r0)
1428		opset(AMTVSRDM, r0)
1429		opset(AMTVSRBM, r0)
1430	case APADDI:
1431	case APEXTD:
1432		opset(APDEPD, r0)
1433		opset(ACNTTZDM, r0)
1434		opset(ACNTLZDM, r0)
1435		opset(ACFUGED, r0)
1436	case APLFS:
1437		opset(APLFD, r0)
1438	case APLQ:
1439	case APLWZ:
1440		opset(APLWA, r0)
1441		opset(APLHZ, r0)
1442		opset(APLHA, r0)
1443		opset(APLD, r0)
1444		opset(APLBZ, r0)
1445	case APLXSSP:
1446		opset(APLXSD, r0)
1447	case APLXV:
1448	case APLXVP:
1449	case APMXVF32GERPP:
1450		opset(APMXVF32GERPN, r0)
1451		opset(APMXVF32GERNP, r0)
1452		opset(APMXVF32GERNN, r0)
1453		opset(APMXVF32GER, r0)
1454	case APMXVF64GERPP:
1455		opset(APMXVF64GERPN, r0)
1456		opset(APMXVF64GERNP, r0)
1457		opset(APMXVF64GERNN, r0)
1458		opset(APMXVF64GER, r0)
1459	case APMXVI16GER2SPP:
1460		opset(APMXVI16GER2S, r0)
1461		opset(APMXVI16GER2PP, r0)
1462		opset(APMXVI16GER2, r0)
1463		opset(APMXVF16GER2PP, r0)
1464		opset(APMXVF16GER2PN, r0)
1465		opset(APMXVF16GER2NP, r0)
1466		opset(APMXVF16GER2NN, r0)
1467		opset(APMXVF16GER2, r0)
1468		opset(APMXVBF16GER2PP, r0)
1469		opset(APMXVBF16GER2PN, r0)
1470		opset(APMXVBF16GER2NP, r0)
1471		opset(APMXVBF16GER2NN, r0)
1472		opset(APMXVBF16GER2, r0)
1473	case APMXVI4GER8PP:
1474		opset(APMXVI4GER8, r0)
1475	case APMXVI8GER4SPP:
1476		opset(APMXVI8GER4PP, r0)
1477		opset(APMXVI8GER4, r0)
1478	case APNOP:
1479	case APSTFS:
1480		opset(APSTFD, r0)
1481	case APSTQ:
1482	case APSTW:
1483		opset(APSTH, r0)
1484		opset(APSTD, r0)
1485		opset(APSTB, r0)
1486	case APSTXSSP:
1487		opset(APSTXSD, r0)
1488	case APSTXV:
1489	case APSTXVP:
1490	case ASETNBCR:
1491		opset(ASETNBC, r0)
1492		opset(ASETBCR, r0)
1493		opset(ASETBC, r0)
1494	case ASTXVP:
1495	case ASTXVPX:
1496	case ASTXVRWX:
1497		opset(ASTXVRHX, r0)
1498		opset(ASTXVRDX, r0)
1499		opset(ASTXVRBX, r0)
1500	case AVCLRRB:
1501		opset(AVCLRLB, r0)
1502	case AVCMPUQ:
1503		opset(AVCMPSQ, r0)
1504	case AVCNTMBW:
1505		opset(AVCNTMBH, r0)
1506		opset(AVCNTMBD, r0)
1507		opset(AVCNTMBB, r0)
1508	case AVEXTDUWVRX:
1509		opset(AVEXTDUWVLX, r0)
1510		opset(AVEXTDUHVRX, r0)
1511		opset(AVEXTDUHVLX, r0)
1512		opset(AVEXTDUBVRX, r0)
1513		opset(AVEXTDUBVLX, r0)
1514		opset(AVEXTDDVRX, r0)
1515		opset(AVEXTDDVLX, r0)
1516	case AVEXTRACTWM:
1517		opset(AVEXTRACTQM, r0)
1518		opset(AVEXTRACTHM, r0)
1519		opset(AVEXTRACTDM, r0)
1520		opset(AVEXTRACTBM, r0)
1521	case AVGNB:
1522	case AVINSW:
1523		opset(AVINSD, r0)
1524	case AVINSWRX:
1525		opset(AVINSWLX, r0)
1526		opset(AVINSHRX, r0)
1527		opset(AVINSHLX, r0)
1528		opset(AVINSDRX, r0)
1529		opset(AVINSDLX, r0)
1530		opset(AVINSBRX, r0)
1531		opset(AVINSBLX, r0)
1532	case AVINSWVRX:
1533		opset(AVINSWVLX, r0)
1534		opset(AVINSHVRX, r0)
1535		opset(AVINSHVLX, r0)
1536		opset(AVINSBVRX, r0)
1537		opset(AVINSBVLX, r0)
1538	case AVMSUMCUD:
1539	case AVSRDBI:
1540		opset(AVSLDBI, r0)
1541	case AXSCVUQQP:
1542		opset(AXSCVSQQP, r0)
1543		opset(AXSCVQPUQZ, r0)
1544		opset(AXSCVQPSQZ, r0)
1545		opset(AVSTRIHRCC, r0)
1546		opset(AVSTRIHR, r0)
1547		opset(AVSTRIHLCC, r0)
1548		opset(AVSTRIHL, r0)
1549		opset(AVSTRIBRCC, r0)
1550		opset(AVSTRIBR, r0)
1551		opset(AVSTRIBLCC, r0)
1552		opset(AVSTRIBL, r0)
1553		opset(AVEXTSD2Q, r0)
1554		opset(AVEXPANDWM, r0)
1555		opset(AVEXPANDQM, r0)
1556		opset(AVEXPANDHM, r0)
1557		opset(AVEXPANDDM, r0)
1558		opset(AVEXPANDBM, r0)
1559	case AXSMINCQP:
1560		opset(AXSMAXCQP, r0)
1561		opset(AXSCMPGTQP, r0)
1562		opset(AXSCMPGEQP, r0)
1563		opset(AXSCMPEQQP, r0)
1564		opset(AVSRQ, r0)
1565		opset(AVSRAQ, r0)
1566		opset(AVSLQ, r0)
1567		opset(AVRLQNM, r0)
1568		opset(AVRLQMI, r0)
1569		opset(AVRLQ, r0)
1570		opset(AVPEXTD, r0)
1571		opset(AVPDEPD, r0)
1572		opset(AVMULOUD, r0)
1573		opset(AVMULOSD, r0)
1574		opset(AVMULLD, r0)
1575		opset(AVMULHUW, r0)
1576		opset(AVMULHUD, r0)
1577		opset(AVMULHSW, r0)
1578		opset(AVMULHSD, r0)
1579		opset(AVMULEUD, r0)
1580		opset(AVMULESD, r0)
1581		opset(AVMODUW, r0)
1582		opset(AVMODUQ, r0)
1583		opset(AVMODUD, r0)
1584		opset(AVMODSW, r0)
1585		opset(AVMODSQ, r0)
1586		opset(AVMODSD, r0)
1587		opset(AVDIVUW, r0)
1588		opset(AVDIVUQ, r0)
1589		opset(AVDIVUD, r0)
1590		opset(AVDIVSW, r0)
1591		opset(AVDIVSQ, r0)
1592		opset(AVDIVSD, r0)
1593		opset(AVDIVEUW, r0)
1594		opset(AVDIVEUQ, r0)
1595		opset(AVDIVEUD, r0)
1596		opset(AVDIVESW, r0)
1597		opset(AVDIVESQ, r0)
1598		opset(AVDIVESD, r0)
1599		opset(AVCTZDM, r0)
1600		opset(AVCMPGTUQCC, r0)
1601		opset(AVCMPGTUQ, r0)
1602		opset(AVCMPGTSQCC, r0)
1603		opset(AVCMPGTSQ, r0)
1604		opset(AVCMPEQUQCC, r0)
1605		opset(AVCMPEQUQ, r0)
1606		opset(AVCLZDM, r0)
1607		opset(AVCFUGED, r0)
1608	case AXVCVSPBF16:
1609		opset(AXVCVBF16SPN, r0)
1610	case AXVI8GER4SPP:
1611		opset(AXVI8GER4PP, r0)
1612		opset(AXVI8GER4, r0)
1613		opset(AXVI4GER8PP, r0)
1614		opset(AXVI4GER8, r0)
1615		opset(AXVI16GER2SPP, r0)
1616		opset(AXVI16GER2S, r0)
1617		opset(AXVI16GER2PP, r0)
1618		opset(AXVI16GER2, r0)
1619		opset(AXVF64GERPP, r0)
1620		opset(AXVF64GERPN, r0)
1621		opset(AXVF64GERNP, r0)
1622		opset(AXVF64GERNN, r0)
1623		opset(AXVF64GER, r0)
1624		opset(AXVF32GERPP, r0)
1625		opset(AXVF32GERPN, r0)
1626		opset(AXVF32GERNP, r0)
1627		opset(AXVF32GERNN, r0)
1628		opset(AXVF32GER, r0)
1629		opset(AXVF16GER2PP, r0)
1630		opset(AXVF16GER2PN, r0)
1631		opset(AXVF16GER2NP, r0)
1632		opset(AXVF16GER2NN, r0)
1633		opset(AXVF16GER2, r0)
1634		opset(AXVBF16GER2PP, r0)
1635		opset(AXVBF16GER2PN, r0)
1636		opset(AXVBF16GER2NP, r0)
1637		opset(AXVBF16GER2NN, r0)
1638		opset(AXVBF16GER2, r0)
1639	case AXVTLSBB:
1640	case AXXBLENDVW:
1641		opset(AXXBLENDVH, r0)
1642		opset(AXXBLENDVD, r0)
1643		opset(AXXBLENDVB, r0)
1644	case AXXEVAL:
1645	case AXXGENPCVWM:
1646		opset(AXXGENPCVHM, r0)
1647		opset(AXXGENPCVDM, r0)
1648		opset(AXXGENPCVBM, r0)
1649	case AXXPERMX:
1650	case AXXSETACCZ:
1651		opset(AXXMTACC, r0)
1652		opset(AXXMFACC, r0)
1653	case AXXSPLTI32DX:
1654	case AXXSPLTIW:
1655		opset(AXXSPLTIDP, r0)
1656	default:
1657		return false
1658	}
1659	return true
1660}
1661