| /aosp_15_r20/external/vixl/test/aarch32/ |
| H A D | test-assembler-aarch32.cc | 243 __ Adc(r4, r2, r3); in TEST() local
244 __ Adc(r5, r0, Operand(r1, LSL, 30)); in TEST() local
245 __ Adc(r6, r0, Operand(r2, LSR, 16)); in TEST() local
246 __ Adc(r7, r2, Operand(r3, ASR, 4)); in TEST() local
247 __ Adc(r8, r2, Operand(r3, ROR, 8)); in TEST() local
248 __ Adc(r9, r2, Operand(r3, RRX)); in TEST() local
271 __ Adc(r5, r2, r3); in TEST() local
272 __ Adc(r6, r0, Operand(r1, LSL, 30)); in TEST() local
273 __ Adc(r7, r0, Operand(r2, LSR, 16)); in TEST() local
274 __ Adc(r8, r2, Operand(r3, ASR, 4)); in TEST() local
[all …]
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| /aosp_15_r20/external/vixl/test/aarch64/ |
| H A D | test-assembler-aarch64.cc | 5231 __ Adc(x5, x2, Operand(x3)); in TEST() local
5232 __ Adc(x6, x0, Operand(x1, LSL, 60)); in TEST() local
5234 __ Adc(x8, x2, Operand(x3, ASR, 4)); in TEST() local
5235 __ Adc(x9, x2, Operand(x3, ROR, 8)); in TEST() local
5237 __ Adc(w10, w2, Operand(w3)); in TEST() local
5238 __ Adc(w11, w0, Operand(w1, LSL, 30)); in TEST() local
5240 __ Adc(w13, w2, Operand(w3, ASR, 4)); in TEST() local
5241 __ Adc(w14, w2, Operand(w3, ROR, 8)); in TEST() local
5246 __ Adc(x18, x2, Operand(x3)); in TEST() local
5247 __ Adc(x19, x0, Operand(x1, LSL, 60)); in TEST() local
[all …]
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| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | code_generator_arm_vixl.cc | 1170 __ Adc(out_hi, first_hi, second_hi); in GenerateDataProc() local
3307 __ Adc(out, temp, in); in GenerateConditionWithZero() local
4325 __ Adc(HighRegisterFrom(out), HighRegisterFrom(first), HighRegisterFrom(second)); in VisitAdd() local
5221 __ Adc(out_reg_hi, in_reg_hi, mask); in VisitAbs() local
5650 __ Adc(o_h, high, high); in HandleShift() local
9025 __ Adc(out_high, first_high, value_high); in GenerateAddLongConst() local
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| H A D | intrinsics_arm_vixl.cc | 3982 __ Adc(LowRegisterFrom(new_value), HighRegisterFrom(old_value), HighRegisterFrom(arg)); in GenerateGetAndUpdate() local
4009 __ Adc(HighRegisterFrom(new_value), HighRegisterFrom(loaded_value), HighRegisterFrom(arg)); in GenerateGetAndUpdate() local
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstX8632.h | 192 Adc, enumerator
3185 using Adc = InstX86Adc; member
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| H A D | IceInstX8664.h | 133 Adc, enumerator
3084 using Adc = InstX86Adc; member
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| H A D | IceInstARM32.h | 380 Adc, enumerator
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| /aosp_15_r20/external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.cc | 1775 void MacroAssembler::Adc(const Register& rd, in Adc() function in vixl::aarch64::MacroAssembler
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| /aosp_15_r20/external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 992 void Adc(Condition cond, Register rd, Register rn, const Operand& operand) { in Adc() function
1006 void Adc(Register rd, Register rn, const Operand& operand) { in Adc() function
1009 void Adc(FlagsUpdate flags, in Adc() function
1033 void Adc(FlagsUpdate flags, in Adc() function
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