1 /* 2 ************************************************************************************************************************ 3 * 4 * Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. 5 * SPDX-License-Identifier: MIT 6 * 7 ***********************************************************************************************************************/ 8 9 /** 10 **************************************************************************************************** 11 * @file addrtypes.h 12 * @brief Contains the helper function and constants 13 **************************************************************************************************** 14 */ 15 #ifndef __ADDR_TYPES_H__ 16 #define __ADDR_TYPES_H__ 17 18 #if defined(__APPLE__) && !defined(HAVE_TSERVER) 19 // External definitions header maintained by Apple driver team, but not for diag team under Mac. 20 // Helps address compilation issues & reduces code covered by NDA 21 #include "addrExtDef.h" 22 23 #else 24 25 // Windows and/or Linux 26 #if !defined(VOID) 27 typedef void VOID; 28 #endif 29 30 #if !defined(FLOAT) 31 typedef float FLOAT; 32 #endif 33 34 #if !defined(DOUBLE) 35 typedef double DOUBLE; 36 #endif 37 38 #if !defined(CHAR) 39 typedef char CHAR; 40 #endif 41 42 #if !defined(INT) 43 typedef int INT; 44 #endif 45 46 #include <stdarg.h> // va_list...etc need this header 47 48 #endif // defined (__APPLE__) && !defined(HAVE_TSERVER) 49 50 /** 51 **************************************************************************************************** 52 * Calling conventions 53 **************************************************************************************************** 54 */ 55 #ifndef ADDR_CDECL 56 #if defined(__GNUC__) 57 #if defined(__i386__) 58 #define ADDR_CDECL __attribute__((cdecl)) 59 #else 60 #define ADDR_CDECL 61 #endif 62 #else 63 #define ADDR_CDECL __cdecl 64 #endif 65 #endif 66 67 #ifndef ADDR_STDCALL 68 #if defined(__GNUC__) 69 #if defined(__i386__) 70 #define ADDR_STDCALL __attribute__((stdcall)) 71 #else 72 #define ADDR_STDCALL 73 #endif 74 #else 75 #define ADDR_STDCALL __stdcall 76 #endif 77 #endif 78 79 #ifndef ADDR_FASTCALL 80 #if defined(__GNUC__) 81 #if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) 82 #define ADDR_FASTCALL __attribute__((regparm(0))) 83 #else 84 #define ADDR_FASTCALL 85 #endif 86 #else 87 #define ADDR_FASTCALL __fastcall 88 #endif 89 #endif 90 91 #ifndef GC_CDECL 92 #define GC_CDECL ADDR_CDECL 93 #endif 94 95 #ifndef GC_STDCALL 96 #define GC_STDCALL ADDR_STDCALL 97 #endif 98 99 #ifndef GC_FASTCALL 100 #define GC_FASTCALL ADDR_FASTCALL 101 #endif 102 103 104 #if defined(__GNUC__) 105 #define ADDR_INLINE static inline // inline needs to be static to link 106 #else 107 // win32, win64, other platforms 108 #define ADDR_INLINE __inline 109 #endif // #if defined(__GNUC__) 110 111 #define ADDR_API ADDR_FASTCALL //default call convention is fast call 112 113 /** 114 **************************************************************************************************** 115 * Global defines used by other modules 116 **************************************************************************************************** 117 */ 118 #if !defined(TILEINDEX_INVALID) 119 #define TILEINDEX_INVALID -1 120 #endif 121 122 #if !defined(TILEINDEX_LINEAR_GENERAL) 123 #define TILEINDEX_LINEAR_GENERAL -2 124 #endif 125 126 #if !defined(TILEINDEX_LINEAR_ALIGNED) 127 #define TILEINDEX_LINEAR_ALIGNED 8 128 #endif 129 130 /** 131 **************************************************************************************************** 132 * Return codes 133 **************************************************************************************************** 134 */ 135 typedef enum _ADDR_E_RETURNCODE 136 { 137 // General Return 138 ADDR_OK = 0, 139 ADDR_ERROR = 1, 140 141 // Specific Errors 142 ADDR_OUTOFMEMORY, 143 ADDR_INVALIDPARAMS, 144 ADDR_NOTSUPPORTED, 145 ADDR_NOTIMPLEMENTED, 146 ADDR_PARAMSIZEMISMATCH, 147 ADDR_INVALIDGBREGVALUES, 148 149 } ADDR_E_RETURNCODE; 150 151 /** 152 **************************************************************************************************** 153 * @brief 154 * Neutral enums that define tile modes for all H/W 155 * @note 156 * R600/R800 tiling mode can be cast to hw enums directly but never cast into HW enum from 157 * ADDR_TM_2D_TILED_XTHICK 158 * 159 **************************************************************************************************** 160 */ 161 typedef enum _AddrTileMode 162 { 163 ADDR_TM_LINEAR_GENERAL = 0, ///< Least restrictions, pitch: multiple of 8 if not buffer 164 ADDR_TM_LINEAR_ALIGNED = 1, ///< Requests pitch or slice to be multiple of 64 pixels 165 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles 166 ADDR_TM_1D_TILED_THICK = 3, ///< Linear array of 8x8x4 tiles 167 ADDR_TM_2D_TILED_THIN1 = 4, ///< A set of macro tiles consist of 8x8 tiles 168 ADDR_TM_2D_TILED_THIN2 = 5, ///< 600 HWL only, macro tile ratio is 1:4 169 ADDR_TM_2D_TILED_THIN4 = 6, ///< 600 HWL only, macro tile ratio is 1:16 170 ADDR_TM_2D_TILED_THICK = 7, ///< A set of macro tiles consist of 8x8x4 tiles 171 ADDR_TM_2B_TILED_THIN1 = 8, ///< 600 HWL only, with bank swap 172 ADDR_TM_2B_TILED_THIN2 = 9, ///< 600 HWL only, with bank swap and ratio is 1:4 173 ADDR_TM_2B_TILED_THIN4 = 10, ///< 600 HWL only, with bank swap and ratio is 1:16 174 ADDR_TM_2B_TILED_THICK = 11, ///< 600 HWL only, with bank swap, consists of 8x8x4 tiles 175 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices 176 ADDR_TM_3D_TILED_THICK = 13, ///< Macro tiling w/ pipe rotation bwtween slices, thick 177 ADDR_TM_3B_TILED_THIN1 = 14, ///< 600 HWL only, with bank swap 178 ADDR_TM_3B_TILED_THICK = 15, ///< 600 HWL only, with bank swap, thick 179 ADDR_TM_2D_TILED_XTHICK = 16, ///< Tile is 8x8x8, valid from NI 180 ADDR_TM_3D_TILED_XTHICK = 17, ///< Tile is 8x8x8, valid from NI 181 ADDR_TM_POWER_SAVE = 18, ///< Power save mode, only used by KMD on NI 182 ADDR_TM_PRT_TILED_THIN1 = 19, ///< No bank/pipe rotation or hashing beyond macrotile size 183 ADDR_TM_PRT_2D_TILED_THIN1 = 20, ///< Same as 2D_TILED_THIN1, PRT only 184 ADDR_TM_PRT_3D_TILED_THIN1 = 21, ///< Same as 3D_TILED_THIN1, PRT only 185 ADDR_TM_PRT_TILED_THICK = 22, ///< No bank/pipe rotation or hashing beyond macrotile size 186 ADDR_TM_PRT_2D_TILED_THICK = 23, ///< Same as 2D_TILED_THICK, PRT only 187 ADDR_TM_PRT_3D_TILED_THICK = 24, ///< Same as 3D_TILED_THICK, PRT only 188 ADDR_TM_UNKNOWN = 25, ///< Unkown tile mode, should be decided by address lib 189 ADDR_TM_COUNT = 26, ///< Must be the value of the last tile mode 190 } AddrTileMode; 191 192 /** 193 **************************************************************************************************** 194 * @brief 195 * Neutral enums that define swizzle modes for Gfx9+ ASIC 196 * @note 197 * 198 * ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource 199 * ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource 200 * ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource 201 * ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource 202 * ADDR_SW_VAR_* addressing block aligned size is ASIC specific 203 * 204 * ADDR_SW_*_Z For GFX9: 205 - for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask 206 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 207 For GFX10: 208 - represents Z-order swizzle mode for depth/stencil/FMask 209 * ADDR_SW_*_S For GFX9+: 210 - represents standard swizzle mode defined by MS 211 * ADDR_SW_*_D For GFX9: 212 - for 2D resource, represents a swizzle mode for displayable resource 213 * - for 3D resource, represents a swizzle mode which places each slice in order & pixel 214 For GFX10: 215 - for 2D resource, represents a swizzle mode for displayable resource 216 - for 3D resource, represents a swizzle mode similar to legacy thick tile mode 217 within slice is placed as 2D ADDR_SW_*_S. Don't use this combination if possible! 218 * ADDR_SW_*_R For GFX9: 219 - 2D resource only, represents a swizzle mode for rotated displayable resource 220 For GFX10: 221 - represents a swizzle mode for render target resource 222 * 223 **************************************************************************************************** 224 */ 225 typedef enum _AddrSwizzleMode 226 { 227 ADDR_SW_LINEAR = 0, 228 ADDR_SW_256B_S = 1, 229 ADDR_SW_256B_D = 2, 230 ADDR_SW_256B_R = 3, 231 ADDR_SW_4KB_Z = 4, 232 ADDR_SW_4KB_S = 5, 233 ADDR_SW_4KB_D = 6, 234 ADDR_SW_4KB_R = 7, 235 ADDR_SW_64KB_Z = 8, 236 ADDR_SW_64KB_S = 9, 237 ADDR_SW_64KB_D = 10, 238 ADDR_SW_64KB_R = 11, 239 ADDR_SW_MISCDEF12 = 12, 240 ADDR_SW_MISCDEF13 = 13, 241 ADDR_SW_MISCDEF14 = 14, 242 ADDR_SW_MISCDEF15 = 15, 243 ADDR_SW_64KB_Z_T = 16, 244 ADDR_SW_64KB_S_T = 17, 245 ADDR_SW_64KB_D_T = 18, 246 ADDR_SW_64KB_R_T = 19, 247 ADDR_SW_4KB_Z_X = 20, 248 ADDR_SW_4KB_S_X = 21, 249 ADDR_SW_4KB_D_X = 22, 250 ADDR_SW_4KB_R_X = 23, 251 ADDR_SW_64KB_Z_X = 24, 252 ADDR_SW_64KB_S_X = 25, 253 ADDR_SW_64KB_D_X = 26, 254 ADDR_SW_64KB_R_X = 27, 255 ADDR_SW_MISCDEF28 = 28, 256 ADDR_SW_MISCDEF29 = 29, 257 ADDR_SW_MISCDEF30 = 30, 258 ADDR_SW_MISCDEF31 = 31, 259 ADDR_SW_LINEAR_GENERAL = 32, 260 ADDR_SW_MAX_TYPE = 33, 261 262 ADDR_SW_RESERVED0 = ADDR_SW_MISCDEF12, 263 ADDR_SW_RESERVED1 = ADDR_SW_MISCDEF13, 264 ADDR_SW_RESERVED2 = ADDR_SW_MISCDEF14, 265 ADDR_SW_RESERVED3 = ADDR_SW_MISCDEF15, 266 ADDR_SW_RESERVED4 = ADDR_SW_MISCDEF29, 267 ADDR_SW_RESERVED5 = ADDR_SW_MISCDEF30, 268 269 ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28, 270 ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31, 271 272 ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28, 273 ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29, 274 ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30, 275 ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31, 276 } AddrSwizzleMode; 277 278 /** 279 **************************************************************************************************** 280 * @brief 281 * Neutral enums that define swizzle modes for Gfx12+ ASIC 282 * 283 **************************************************************************************************** 284 */ 285 typedef enum _Addr3SwizzleMode 286 { 287 ADDR3_LINEAR = 0, 288 ADDR3_256B_2D = 1, 289 ADDR3_4KB_2D = 2, 290 ADDR3_64KB_2D = 3, 291 ADDR3_256KB_2D = 4, 292 ADDR3_4KB_3D = 5, 293 ADDR3_64KB_3D = 6, 294 ADDR3_256KB_3D = 7, 295 ADDR3_MAX_TYPE, 296 } Addr3SwizzleMode; 297 298 /** 299 **************************************************************************************************** 300 * @brief 301 * Neutral enums that define image type 302 * @note 303 * this is new for address library interface version 2 304 * 305 **************************************************************************************************** 306 */ 307 typedef enum _AddrResourceType 308 { 309 ADDR_RSRC_TEX_1D = 0, 310 ADDR_RSRC_TEX_2D = 1, 311 ADDR_RSRC_TEX_3D = 2, 312 ADDR_RSRC_MAX_TYPE = 3, 313 } AddrResourceType; 314 315 /** 316 **************************************************************************************************** 317 * @brief 318 * Neutral enums that define resource heap location 319 * @note 320 * this is new for address library interface version 2 321 * 322 **************************************************************************************************** 323 */ 324 typedef enum _AddrResrouceLocation 325 { 326 ADDR_RSRC_LOC_UNDEF = 0, // Resource heap is undefined/unknown 327 ADDR_RSRC_LOC_LOCAL = 1, // CPU visable and CPU invisable local heap 328 ADDR_RSRC_LOC_USWC = 2, // CPU write-combined non-cached nonlocal heap 329 ADDR_RSRC_LOC_CACHED = 3, // CPU cached nonlocal heap 330 ADDR_RSRC_LOC_INVIS = 4, // CPU invisable local heap only 331 ADDR_RSRC_LOC_MAX_TYPE = 5, 332 } AddrResrouceLocation; 333 334 /** 335 **************************************************************************************************** 336 * @brief 337 * Neutral enums that define resource basic swizzle mode 338 * @note 339 * this is new for address library interface version 2 340 * 341 **************************************************************************************************** 342 */ 343 typedef enum _AddrSwType 344 { 345 ADDR_SW_Z = 0, // Resource basic swizzle mode is ZOrder 346 ADDR_SW_S = 1, // Resource basic swizzle mode is Standard 347 ADDR_SW_D = 2, // Resource basic swizzle mode is Display 348 ADDR_SW_R = 3, // Resource basic swizzle mode is Rotated/Render optimized 349 ADDR_SW_L = 4, // Resource basic swizzle mode is Linear 350 ADDR_SW_MAX_SWTYPE 351 } AddrSwType; 352 353 /** 354 **************************************************************************************************** 355 * @brief 356 * Neutral enums that define mipmap major mode 357 * @note 358 * this is new for address library interface version 2 359 * 360 **************************************************************************************************** 361 */ 362 typedef enum _AddrMajorMode 363 { 364 ADDR_MAJOR_X = 0, 365 ADDR_MAJOR_Y = 1, 366 ADDR_MAJOR_Z = 2, 367 ADDR_MAJOR_MAX_TYPE = 3, 368 } AddrMajorMode; 369 370 /** 371 **************************************************************************************************** 372 * AddrFormat 373 * 374 * @brief 375 * Neutral enum for SurfaceFormat 376 * 377 **************************************************************************************************** 378 */ 379 typedef enum _AddrFormat { 380 ADDR_FMT_INVALID = 0x00000000, 381 ADDR_FMT_8 = 0x00000001, 382 ADDR_FMT_4_4 = 0x00000002, 383 ADDR_FMT_3_3_2 = 0x00000003, 384 ADDR_FMT_RESERVED_4 = 0x00000004, 385 ADDR_FMT_16 = 0x00000005, 386 ADDR_FMT_16_FLOAT = ADDR_FMT_16, 387 ADDR_FMT_8_8 = 0x00000007, 388 ADDR_FMT_5_6_5 = 0x00000008, 389 ADDR_FMT_6_5_5 = 0x00000009, 390 ADDR_FMT_1_5_5_5 = 0x0000000a, 391 ADDR_FMT_4_4_4_4 = 0x0000000b, 392 ADDR_FMT_5_5_5_1 = 0x0000000c, 393 ADDR_FMT_32 = 0x0000000d, 394 ADDR_FMT_32_FLOAT = ADDR_FMT_32, 395 ADDR_FMT_16_16 = 0x0000000f, 396 ADDR_FMT_16_16_FLOAT = ADDR_FMT_16_16, 397 ADDR_FMT_8_24 = 0x00000011, 398 ADDR_FMT_8_24_FLOAT = ADDR_FMT_8_24, 399 ADDR_FMT_24_8 = 0x00000013, 400 ADDR_FMT_24_8_FLOAT = ADDR_FMT_24_8, 401 ADDR_FMT_10_11_11 = 0x00000015, 402 ADDR_FMT_10_11_11_FLOAT = ADDR_FMT_10_11_11, 403 ADDR_FMT_11_11_10 = 0x00000017, 404 ADDR_FMT_11_11_10_FLOAT = ADDR_FMT_11_11_10, 405 ADDR_FMT_2_10_10_10 = 0x00000019, 406 ADDR_FMT_8_8_8_8 = 0x0000001a, 407 ADDR_FMT_10_10_10_2 = 0x0000001b, 408 ADDR_FMT_X24_8_32_FLOAT = 0x0000001c, 409 ADDR_FMT_32_32 = 0x0000001d, 410 ADDR_FMT_32_32_FLOAT = ADDR_FMT_32_32, 411 ADDR_FMT_16_16_16_16 = 0x0000001f, 412 ADDR_FMT_16_16_16_16_FLOAT = ADDR_FMT_16_16_16_16, 413 ADDR_FMT_RESERVED_33 = 0x00000021, 414 ADDR_FMT_32_32_32_32 = 0x00000022, 415 ADDR_FMT_32_32_32_32_FLOAT = ADDR_FMT_32_32_32_32, 416 ADDR_FMT_RESERVED_36 = 0x00000024, 417 ADDR_FMT_1 = 0x00000025, 418 ADDR_FMT_1_REVERSED = 0x00000026, 419 ADDR_FMT_GB_GR = 0x00000027, 420 ADDR_FMT_BG_RG = 0x00000028, 421 ADDR_FMT_32_AS_8 = 0x00000029, 422 ADDR_FMT_32_AS_8_8 = 0x0000002a, 423 ADDR_FMT_5_9_9_9_SHAREDEXP = 0x0000002b, 424 ADDR_FMT_8_8_8 = 0x0000002c, 425 ADDR_FMT_16_16_16 = 0x0000002d, 426 ADDR_FMT_16_16_16_FLOAT = ADDR_FMT_16_16_16, 427 ADDR_FMT_32_32_32 = 0x0000002f, 428 ADDR_FMT_32_32_32_FLOAT = ADDR_FMT_32_32_32, 429 ADDR_FMT_BC1 = 0x00000031, 430 ADDR_FMT_BC2 = 0x00000032, 431 ADDR_FMT_BC3 = 0x00000033, 432 ADDR_FMT_BC4 = 0x00000034, 433 ADDR_FMT_BC5 = 0x00000035, 434 ADDR_FMT_BC6 = 0x00000036, 435 ADDR_FMT_BC7 = 0x00000037, 436 ADDR_FMT_32_AS_32_32_32_32 = 0x00000038, 437 ADDR_FMT_APC3 = 0x00000039, 438 ADDR_FMT_APC4 = 0x0000003a, 439 ADDR_FMT_APC5 = 0x0000003b, 440 ADDR_FMT_APC6 = 0x0000003c, 441 ADDR_FMT_APC7 = 0x0000003d, 442 ADDR_FMT_CTX1 = 0x0000003e, 443 ADDR_FMT_RESERVED_63 = 0x0000003f, 444 ADDR_FMT_ASTC_4x4 = 0x00000040, 445 ADDR_FMT_ASTC_5x4 = 0x00000041, 446 ADDR_FMT_ASTC_5x5 = 0x00000042, 447 ADDR_FMT_ASTC_6x5 = 0x00000043, 448 ADDR_FMT_ASTC_6x6 = 0x00000044, 449 ADDR_FMT_ASTC_8x5 = 0x00000045, 450 ADDR_FMT_ASTC_8x6 = 0x00000046, 451 ADDR_FMT_ASTC_8x8 = 0x00000047, 452 ADDR_FMT_ASTC_10x5 = 0x00000048, 453 ADDR_FMT_ASTC_10x6 = 0x00000049, 454 ADDR_FMT_ASTC_10x8 = 0x0000004a, 455 ADDR_FMT_ASTC_10x10 = 0x0000004b, 456 ADDR_FMT_ASTC_12x10 = 0x0000004c, 457 ADDR_FMT_ASTC_12x12 = 0x0000004d, 458 ADDR_FMT_ETC2_64BPP = 0x0000004e, 459 ADDR_FMT_ETC2_128BPP = 0x0000004f, 460 ADDR_FMT_BG_RG_16_16_16_16 = 0x00000050, 461 } AddrFormat; 462 463 /** 464 **************************************************************************************************** 465 * AddrDepthFormat 466 * 467 * @brief 468 * Neutral enum for addrFlt32ToDepthPixel 469 * 470 **************************************************************************************************** 471 */ 472 typedef enum _AddrDepthFormat 473 { 474 ADDR_DEPTH_INVALID = 0x00000000, 475 ADDR_DEPTH_16 = 0x00000001, 476 ADDR_DEPTH_X8_24 = 0x00000002, 477 ADDR_DEPTH_8_24 = 0x00000003, 478 ADDR_DEPTH_X8_24_FLOAT = 0x00000004, 479 ADDR_DEPTH_8_24_FLOAT = 0x00000005, 480 ADDR_DEPTH_32_FLOAT = 0x00000006, 481 ADDR_DEPTH_X24_8_32_FLOAT = 0x00000007, 482 483 } AddrDepthFormat; 484 485 /** 486 **************************************************************************************************** 487 * AddrColorFormat 488 * 489 * @brief 490 * Neutral enum for ColorFormat 491 * 492 **************************************************************************************************** 493 */ 494 typedef enum _AddrColorFormat 495 { 496 ADDR_COLOR_INVALID = 0x00000000, 497 ADDR_COLOR_8 = 0x00000001, 498 ADDR_COLOR_4_4 = 0x00000002, 499 ADDR_COLOR_3_3_2 = 0x00000003, 500 ADDR_COLOR_RESERVED_4 = 0x00000004, 501 ADDR_COLOR_16 = 0x00000005, 502 ADDR_COLOR_16_FLOAT = 0x00000006, 503 ADDR_COLOR_8_8 = 0x00000007, 504 ADDR_COLOR_5_6_5 = 0x00000008, 505 ADDR_COLOR_6_5_5 = 0x00000009, 506 ADDR_COLOR_1_5_5_5 = 0x0000000a, 507 ADDR_COLOR_4_4_4_4 = 0x0000000b, 508 ADDR_COLOR_5_5_5_1 = 0x0000000c, 509 ADDR_COLOR_32 = 0x0000000d, 510 ADDR_COLOR_32_FLOAT = 0x0000000e, 511 ADDR_COLOR_16_16 = 0x0000000f, 512 ADDR_COLOR_16_16_FLOAT = 0x00000010, 513 ADDR_COLOR_8_24 = 0x00000011, 514 ADDR_COLOR_8_24_FLOAT = 0x00000012, 515 ADDR_COLOR_24_8 = 0x00000013, 516 ADDR_COLOR_24_8_FLOAT = 0x00000014, 517 ADDR_COLOR_10_11_11 = 0x00000015, 518 ADDR_COLOR_10_11_11_FLOAT = 0x00000016, 519 ADDR_COLOR_11_11_10 = 0x00000017, 520 ADDR_COLOR_11_11_10_FLOAT = 0x00000018, 521 ADDR_COLOR_2_10_10_10 = 0x00000019, 522 ADDR_COLOR_8_8_8_8 = 0x0000001a, 523 ADDR_COLOR_10_10_10_2 = 0x0000001b, 524 ADDR_COLOR_X24_8_32_FLOAT = 0x0000001c, 525 ADDR_COLOR_32_32 = 0x0000001d, 526 ADDR_COLOR_32_32_FLOAT = 0x0000001e, 527 ADDR_COLOR_16_16_16_16 = 0x0000001f, 528 ADDR_COLOR_16_16_16_16_FLOAT = 0x00000020, 529 ADDR_COLOR_RESERVED_33 = 0x00000021, 530 ADDR_COLOR_32_32_32_32 = 0x00000022, 531 ADDR_COLOR_32_32_32_32_FLOAT = 0x00000023, 532 } AddrColorFormat; 533 534 /** 535 **************************************************************************************************** 536 * AddrSurfaceNumber 537 * 538 * @brief 539 * Neutral enum for SurfaceNumber 540 * 541 **************************************************************************************************** 542 */ 543 typedef enum _AddrSurfaceNumber { 544 ADDR_NUMBER_UNORM = 0x00000000, 545 ADDR_NUMBER_SNORM = 0x00000001, 546 ADDR_NUMBER_USCALED = 0x00000002, 547 ADDR_NUMBER_SSCALED = 0x00000003, 548 ADDR_NUMBER_UINT = 0x00000004, 549 ADDR_NUMBER_SINT = 0x00000005, 550 ADDR_NUMBER_SRGB = 0x00000006, 551 ADDR_NUMBER_FLOAT = 0x00000007, 552 } AddrSurfaceNumber; 553 554 /** 555 **************************************************************************************************** 556 * AddrSurfaceSwap 557 * 558 * @brief 559 * Neutral enum for SurfaceSwap 560 * 561 **************************************************************************************************** 562 */ 563 typedef enum _AddrSurfaceSwap { 564 ADDR_SWAP_STD = 0x00000000, 565 ADDR_SWAP_ALT = 0x00000001, 566 ADDR_SWAP_STD_REV = 0x00000002, 567 ADDR_SWAP_ALT_REV = 0x00000003, 568 } AddrSurfaceSwap; 569 570 /** 571 **************************************************************************************************** 572 * AddrHtileBlockSize 573 * 574 * @brief 575 * Size of HTILE blocks, valid values are 4 or 8 for now 576 **************************************************************************************************** 577 */ 578 typedef enum _AddrHtileBlockSize 579 { 580 ADDR_HTILE_BLOCKSIZE_4 = 4, 581 ADDR_HTILE_BLOCKSIZE_8 = 8, 582 } AddrHtileBlockSize; 583 584 585 /** 586 **************************************************************************************************** 587 * AddrPipeCfg 588 * 589 * @brief 590 * The pipe configuration field specifies both the number of pipes and 591 * how pipes are interleaved on the surface. 592 * The expression of number of pipes, the shader engine tile size, and packer tile size 593 * is encoded in a PIPE_CONFIG register field. 594 * In general the number of pipes usually matches the number of memory channels of the 595 * hardware configuration. 596 * For hw configurations w/ non-pow2 memory number of memory channels, it usually matches 597 * the number of ROP units(? TODO: which registers??) 598 * The enum value = hw enum + 1 which is to reserve 0 for requesting default. 599 **************************************************************************************************** 600 */ 601 typedef enum _AddrPipeCfg 602 { 603 ADDR_PIPECFG_INVALID = 0, 604 ADDR_PIPECFG_P2 = 1, /// 2 pipes, 605 ADDR_PIPECFG_P4_8x16 = 5, /// 4 pipes, 606 ADDR_PIPECFG_P4_16x16 = 6, 607 ADDR_PIPECFG_P4_16x32 = 7, 608 ADDR_PIPECFG_P4_32x32 = 8, 609 ADDR_PIPECFG_P8_16x16_8x16 = 9, /// 8 pipes 610 ADDR_PIPECFG_P8_16x32_8x16 = 10, 611 ADDR_PIPECFG_P8_32x32_8x16 = 11, 612 ADDR_PIPECFG_P8_16x32_16x16 = 12, 613 ADDR_PIPECFG_P8_32x32_16x16 = 13, 614 ADDR_PIPECFG_P8_32x32_16x32 = 14, 615 ADDR_PIPECFG_P8_32x64_32x32 = 15, 616 ADDR_PIPECFG_P16_32x32_8x16 = 17, /// 16 pipes 617 ADDR_PIPECFG_P16_32x32_16x16 = 18, 618 ADDR_PIPECFG_UNUSED = 19, 619 ADDR_PIPECFG_MAX = 20, 620 } AddrPipeCfg; 621 622 /** 623 **************************************************************************************************** 624 * AddrTileType 625 * 626 * @brief 627 * Neutral enums that specifies micro tile type (MICRO_TILE_MODE) 628 **************************************************************************************************** 629 */ 630 typedef enum _AddrTileType 631 { 632 ADDR_DISPLAYABLE = 0, ///< Displayable tiling 633 ADDR_NON_DISPLAYABLE = 1, ///< Non-displayable tiling, a.k.a thin micro tiling 634 ADDR_DEPTH_SAMPLE_ORDER = 2, ///< Same as non-displayable plus depth-sample-order 635 ADDR_ROTATED = 3, ///< Rotated displayable tiling 636 ADDR_THICK = 4, ///< Thick micro-tiling, only valid for THICK and XTHICK 637 } AddrTileType; 638 639 //////////////////////////////////////////////////////////////////////////////////////////////////// 640 // 641 // Type definitions: short system-independent names for address library types 642 // 643 //////////////////////////////////////////////////////////////////////////////////////////////////// 644 645 #if !defined(__APPLE__) || defined(HAVE_TSERVER) 646 647 #ifndef BOOL_32 // no bool type in C 648 /// @brief Boolean type, since none is defined in C 649 /// @ingroup type 650 #define BOOL_32 int 651 #endif 652 653 #ifndef INT_32 654 #define INT_32 int 655 #endif 656 657 #ifndef UINT_32 658 #define UINT_32 unsigned int 659 #endif 660 661 #ifndef INT_16 662 #define INT_16 short 663 #endif 664 665 #ifndef UINT_16 666 #define UINT_16 unsigned short 667 #endif 668 669 #ifndef INT_8 670 #define INT_8 signed char // signed must be used because of aarch64 671 #endif 672 673 #ifndef UINT_8 674 #define UINT_8 unsigned char 675 #endif 676 677 #ifndef NULL 678 #define NULL 0 679 #endif 680 681 #ifndef TRUE 682 #define TRUE 1 683 #endif 684 685 #ifndef FALSE 686 #define FALSE 0 687 #endif 688 689 // 690 // 64-bit integer types depend on the compiler 691 // 692 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 693 #define INT_64 long long 694 #define UINT_64 unsigned long long 695 696 #elif defined( _WIN32 ) 697 #define INT_64 __int64 698 #define UINT_64 unsigned __int64 699 700 #else 701 #error Unsupported compiler and/or operating system for 64-bit integers 702 703 /// @brief 64-bit signed integer type (compiler dependent) 704 /// @ingroup type 705 /// 706 /// The addrlib defines a 64-bit signed integer type for either 707 /// Gnu/Watcom compilers (which use the first syntax) or for 708 /// the Windows VCC compiler (which uses the second syntax). 709 #define INT_64 long long OR __int64 710 711 /// @brief 64-bit unsigned integer type (compiler dependent) 712 /// @ingroup type 713 /// 714 /// The addrlib defines a 64-bit unsigned integer type for either 715 /// Gnu/Watcom compilers (which use the first syntax) or for 716 /// the Windows VCC compiler (which uses the second syntax). 717 /// 718 #define UINT_64 unsigned long long OR unsigned __int64 719 #endif 720 721 #endif // #if !defined(__APPLE__) || defined(HAVE_TSERVER) 722 723 // ADDR64X is used to print addresses in hex form on both Windows and Linux 724 // 725 #if defined( __GNUC__ ) || defined( __WATCOMC__ ) 726 #define ADDR64X "llx" 727 #define ADDR64D "lld" 728 729 #elif defined( _WIN32 ) 730 #define ADDR64X "I64x" 731 #define ADDR64D "I64d" 732 733 #else 734 #error Unsupported compiler and/or operating system for 64-bit integers 735 736 /// @brief Addrlib device address 64-bit printf tag (compiler dependent) 737 /// @ingroup type 738 /// 739 /// This allows printf to display an ADDR_64 for either the Windows VCC compiler 740 /// (which used this value) or the Gnu/Watcom compilers (which use "llx". 741 /// An example of use is printf("addr 0x%"ADDR64X"\n", address); 742 /// 743 #define ADDR64X "llx" OR "I64x" 744 #define ADDR64D "lld" OR "I64d" 745 #endif 746 747 748 /// @brief Union for storing a 32-bit float or 32-bit integer 749 /// @ingroup type 750 /// 751 /// This union provides a simple way to convert between a 32-bit float 752 /// and a 32-bit integer. It also prevents the compiler from producing 753 /// code that alters NaN values when assiging or coying floats. 754 /// Therefore, all address library routines that pass or return 32-bit 755 /// floating point data do so by passing or returning a FLT_32. 756 /// 757 typedef union { 758 INT_32 i; 759 UINT_32 u; 760 float f; 761 } ADDR_FLT_32; 762 763 764 //////////////////////////////////////////////////////////////////////////////////////////////////// 765 // 766 // Macros for controlling linking and building on multiple systems 767 // 768 //////////////////////////////////////////////////////////////////////////////////////////////////// 769 #if defined(_MSC_VER) 770 #if defined(va_copy) 771 #undef va_copy //redefine va_copy to support VC2013 772 #endif 773 #endif 774 775 #if !defined(va_copy) 776 #define va_copy(dst, src) \ 777 ((void) memcpy(&(dst), &(src), sizeof(va_list))) 778 #endif 779 780 #endif // __ADDR_TYPES_H__ 781 782