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Searched defs:BDTR (Results 1 – 25 of 28) sorted by relevance

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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h495 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f410tx.h492 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f410cx.h495 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f411xe.h490 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f401xe.h489 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f401xc.h489 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f412cx.h630 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f415xx.h651 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f412zx.h673 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f412vx.h673 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f412rx.h673 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f405xx.h652 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f417xx.h747 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f407xx.h748 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f446xx.h765 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f413xx.h734 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f423xx.h735 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f427xx.h818 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f437xx.h819 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f429xx.h866 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32f439xx.h867 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h576 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
H A Dstm32wb55xx.h629 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h764 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h843 __IO uint32_t BDTR; /*!< TIM break and dead-time register, Address offset: 0x44 */ member

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