/aosp_15_r20/external/arm-trusted-firmware/plat/renesas/common/include/ |
H A D | platform_def.h | 115 #define BL2_BASE U(0xE6304000) macro 118 #define BL2_BASE U(0xE6344000) macro 121 #define BL2_BASE U(0xE6304000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/renesas/common/include/ |
D | platform_def.h | 115 #define BL2_BASE U(0xE6304000) macro 118 #define BL2_BASE U(0xE6344000) macro 121 #define BL2_BASE U(0xE6304000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/brcm/board/stingray/include/ |
D | platform_def.h | 112 #define BL2_BASE QSPI_BASE_ADDR macro 118 #define BL2_BASE NAND_BASE_ADDR macro 124 #define BL2_BASE (BL1_RW_LIMIT + PAGE_SIZE) macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/brcm/board/stingray/include/ |
H A D | platform_def.h | 112 #define BL2_BASE QSPI_BASE_ADDR macro 118 #define BL2_BASE NAND_BASE_ADDR macro 124 #define BL2_BASE (BL1_RW_LIMIT + PAGE_SIZE) macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/layerscape/board/ls1043/include/ |
H A D | platform_def.h | 109 #define BL2_BASE (BL31_BASE + BL31_TEXT_RODATA_SIZE) macro 116 #define BL2_BASE LS_BL2_DDR_BASE macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/include/plat/nuvoton/common/ |
D | npcm845x_arm_def.h | 444 #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ macro 451 #define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) macro
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/aosp_15_r20/external/arm-trusted-firmware/include/plat/arm/common/ |
H A D | arm_def.h | 526 #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ macro 534 #define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/include/plat/arm/common/ |
D | arm_def.h | 600 #define BL2_BASE (ARM_TRUSTED_SRAM_BASE + \ macro 609 #define BL2_BASE (BL1_RW_BASE - PLAT_ARM_MAX_BL2_SIZE) macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/hisilicon/poplar/include/ |
H A D | poplar_layout.h | 125 #define BL2_BASE (LLOADER_TEXT_BASE + BL2_OFFSET) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/hisilicon/poplar/include/ |
D | poplar_layout.h | 125 #define BL2_BASE (LLOADER_TEXT_BASE + BL2_OFFSET) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/st/stm32mp2/include/ |
D | platform_def.h | 60 #define BL2_BASE STM32MP_BL2_BASE macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/socionext/uniphier/include/ |
D | platform_def.h | 53 #define BL2_BASE (UNIPHIER_MEM_BASE + UNIPHIER_BL2_OFFSET) macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/socionext/uniphier/include/ |
H A D | platform_def.h | 53 #define BL2_BASE (UNIPHIER_MEM_BASE + UNIPHIER_BL2_OFFSET) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/hisilicon/hikey/include/ |
D | hikey_layout.h | 63 #define BL2_BASE (BL1_RO_BASE) /* 0xf980_1000 */ macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/hisilicon/hikey/include/ |
H A D | hikey_layout.h | 63 #define BL2_BASE (BL1_RO_BASE) /* 0xf980_1000 */ macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/nxp/s32/s32g274ardb2/include/ |
D | platform_def.h | 36 #define BL2_BASE UL(0x34078000) macro
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/aosp_15_r20/external/arm-trusted-firmware/plat/hisilicon/hikey960/include/ |
H A D | platform_def.h | 61 #define BL2_BASE (0x1AC00000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/hisilicon/hikey960/include/ |
D | platform_def.h | 61 #define BL2_BASE (0x1AC00000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/include/plat/marvell/armada/a3k/common/ |
D | marvell_def.h | 160 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/n5x/include/ |
D | socfpga_plat_def.h | 68 #define BL2_BASE (0xffe00000) macro
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/aosp_15_r20/external/arm-trusted-firmware/include/plat/marvell/armada/a3k/common/ |
H A D | marvell_def.h | 160 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/stratix10/include/ |
D | socfpga_plat_def.h | 68 #define BL2_BASE (0xffe00000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/intel/soc/agilex/include/ |
D | socfpga_plat_def.h | 69 #define BL2_BASE (0xffe00000) macro
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/st/stm32mp1/include/ |
D | platform_def.h | 50 #define BL2_BASE STM32MP_BL2_BASE macro
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/aosp_15_r20/external/arm-trusted-firmware/include/plat/marvell/armada/a8k/common/ |
H A D | marvell_def.h | 196 #define BL2_BASE (BL31_BASE - PLAT_MARVELL_MAX_BL2_SIZE) macro
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