xref: /aosp_15_r20/external/coreboot/src/arch/arm64/include/armv8/arch/cache.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /*
3  * cache.h: Cache maintenance API for ARM64
4  */
5 
6 #ifndef ARM_ARM64_CACHE_H
7 #define ARM_ARM64_CACHE_H
8 
9 #include <arch/lib_helpers.h>
10 
11 #ifndef __ASSEMBLER__
12 
13 #include <stddef.h>
14 #include <arch/barrier.h>
15 
16 enum cache_level {
17 	CACHE_L1 = 1,
18 	CACHE_L2 = 2,
19 	CACHE_L3 = 3,
20 	CACHE_L4 = 4,
21 	CACHE_L5 = 5,
22 	CACHE_L6 = 6,
23 	CACHE_L7 = 7,
24 };
25 
26 enum cache_type {
27 	NO_CACHE = 0,
28 	CACHE_INSTRUCTION = 1,
29 	CACHE_DATA = 2,
30 	CACHE_SEPARATE = 3,
31 	CACHE_UNIFIED = 4,
32 };
33 
34 struct cache_info {
35 	uint64_t size;          // total size of cache in bytes
36 	uint64_t associativity; // number of cache lines in a set
37 	uint64_t numsets;       // number of sets in a cache
38 	uint8_t  line_bytes;    // size of cache line in bytes
39 };
40 
41 enum cache_type cpu_get_cache_type(enum cache_level level);
42 enum cb_err cpu_get_cache_info(const enum cache_level level, const enum cache_type type,
43 			       struct cache_info *info);
44 
45 /* dcache clean by virtual address to PoC */
46 void dcache_clean_by_mva(void const *addr, size_t len);
47 
48 /* dcache clean and invalidate by virtual address to PoC */
49 void dcache_clean_invalidate_by_mva(void const *addr, size_t len);
50 
51 /* dcache invalidate by virtual address to PoC */
52 void dcache_invalidate_by_mva(void const *addr, size_t len);
53 
54 /* dcache clean and/or invalidate all sets/ways to PoC */
55 void dcache_clean_all(void);
56 void dcache_invalidate_all(void);
57 void dcache_clean_invalidate_all(void);
58 
59 /* returns number of bytes per cache line */
60 unsigned int dcache_line_bytes(void);
61 
62 /* Invalidate all TLB entries. */
tlb_invalidate_all(void)63 static inline void tlb_invalidate_all(void)
64 {
65 	/* TLBIALL includes dTLB and iTLB on systems that have them. */
66 
67 	tlbiall();
68 	dsb();
69 	isb();
70 }
71 
72 /* Invalidate all of the instruction cache for PE to PoU. */
icache_invalidate_all(void)73 static inline void icache_invalidate_all(void)
74 {
75 	dsb();
76 	iciallu();
77 	dsb();
78 	isb();
79 }
80 
81 #endif /* __ASSEMBLER__ */
82 
83 #endif /* ARM_ARM64_CACHE_H */
84