1## SPDX-License-Identifier: GPL-2.0-only 2 3config MAINBOARD_HAS_CHROMEOS 4 def_bool n 5 6menu "ChromeOS" 7 depends on MAINBOARD_HAS_CHROMEOS 8 9config CHROMEOS 10 bool "Build for ChromeOS" 11 default n 12 select ELOG if BOOT_DEVICE_SUPPORTS_WRITES 13 select COLLECT_TIMESTAMPS 14 select VBOOT 15 select CHROMEOS_NVS if ACPI_SOC_NVS 16 select VPD 17 select VBOOT_SLOTS_RW_AB 18 help 19 Enable ChromeOS specific features like the GPIO sub table in 20 the coreboot table. NOTE: Enabling this option on an unsupported 21 board will most likely break your build. 22 23if CHROMEOS 24 25config CHROMEOS_RAMOOPS 26 bool "Reserve space for ChromeOS ramoops" 27 default y 28 29config CHROMEOS_RAMOOPS_RAM_SIZE 30 hex "Size of preserved RAM" 31 default 0x00100000 32 depends on CHROMEOS_RAMOOPS 33 34config HAVE_REGULATORY_DOMAIN 35 bool "Add regulatory domain methods" 36 default n 37 help 38 This option is needed to add ACPI regulatory domain methods 39 40config CHROMEOS_DISABLE_PLATFORM_HIERARCHY_ON_RESUME 41 bool 42 default y 43 depends on TPM2 && RESUME_PATH_SAME_AS_BOOT 44 help 45 Disable the platform hierarchy on resume path if the firmware 46 is involved in resume. The hierarchy is disabled prior to jumping 47 to the OS. Note that this option is sepcific to TPM2 boards. 48 This option is auto selected if CHROMEOS because it matches with 49 vboot_reference model which disables the platform hierarchy in 50 the boot loader. However, those operations need to be symmetric 51 on normal boot as well as resume and coreboot is only involved 52 in the resume piece w.r.t. the platform hierarchy. 53 54config CHROMEOS_USE_EC_WATCHDOG_FLAG 55 bool 56 default n 57 help 58 Use the AP watchdog flag stored in EC. 59 60config CHROMEOS_CSE_BOARD_RESET_OVERRIDE 61 bool 62 default n 63 depends on SOC_INTEL_CSE_LITE_SKU 64 help 65 On some boards that run old firmware version in cr50, Embedded Controller (EC) needs 66 to trigger the cold reset of Application Processor (AP) when CSE jumps from RO to RW 67 so that cr50 resets the TPM state. This is required on boards where the cr50 firmware 68 does not understand the new cr50 strap config (applicable only to boards using strap 69 config 0xe). Enabling this config will help to override the default global reset. 70 71config CHROMEOS_DRAM_PART_NUMBER_IN_CBI 72 def_bool n 73 depends on EC_GOOGLE_CHROMEEC 74 help 75 Some boards declare the DRAM part number in the CBI instead of the SPD. This option 76 allows those boards to declare that their DRAM part number is stored in the CBI. 77 78config CHROMEOS_NVS 79 bool 80 depends on ACPI_SOC_NVS 81 82config CHROMEOS_FW_SPLASH_SCREEN 83 bool "Display Splash Screen in firmware" 84 default n 85 select BMP_LOGO 86 select HAVE_CUSTOM_BMP_LOGO 87 help 88 Select this option to display the manufacturer's logo or 89 custom image (OEM splash screen) early in the boot process. 90 This can enhance the user experience by providing visual 91 feedback while the system starts up. For example, ChromeOS 92 devices use this option to show their logo before the operating 93 system loads. 94 95config CHROMEOS_LOGO_PATH 96 string "Path to ChromeOS logo file" 97 depends on CHROMEOS_FW_SPLASH_SCREEN 98 default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/logo.bmp" 99 100config CHROMEBOOK_PLUS_LOGO_PATH 101 string "Path to Chromebook Plus logo file" 102 depends on CHROMEOS_FW_SPLASH_SCREEN 103 default "3rdparty/blobs/mainboard/\$(MAINBOARDDIR)/logo.bmp" 104 105endif # CHROMEOS 106endmenu 107
