1 /* SPDX-License-Identifier: GPL-2.0 */
2 
3 /***************************************************************************
4  *    copyright		   : (C) 2002 by Frank Mori Hess
5  ***************************************************************************/
6 
7 #ifndef _GPIB_USER_H
8 #define _GPIB_USER_H
9 
10 #define GPIB_MAX_NUM_BOARDS 16
11 #define GPIB_MAX_NUM_DESCRIPTORS 0x1000
12 
13 enum ibsta_bit_numbers {
14 	DCAS_NUM = 0,
15 	DTAS_NUM = 1,
16 	LACS_NUM = 2,
17 	TACS_NUM = 3,
18 	ATN_NUM = 4,
19 	CIC_NUM = 5,
20 	REM_NUM = 6,
21 	LOK_NUM = 7,
22 	CMPL_NUM = 8,
23 	EVENT_NUM = 9,
24 	SPOLL_NUM = 10,
25 	RQS_NUM = 11,
26 	SRQI_NUM = 12,
27 	END_NUM = 13,
28 	TIMO_NUM = 14,
29 	ERR_NUM = 15
30 };
31 
32 /* IBSTA status bits (returned by all functions) */
33 enum ibsta_bits {
34 	DCAS = (1 << DCAS_NUM),	/* device clear state */
35 	DTAS = (1 << DTAS_NUM),	/* device trigger state */
36 	LACS = (1 <<  LACS_NUM),	/* GPIB interface is addressed as Listener */
37 	TACS = (1 <<  TACS_NUM),	/* GPIB interface is addressed as Talker */
38 	ATN = (1 <<  ATN_NUM),	/* Attention is asserted */
39 	CIC = (1 <<  CIC_NUM),	/* GPIB interface is Controller-in-Charge */
40 	REM = (1 << REM_NUM),	/* remote state */
41 	LOK = (1 << LOK_NUM),	/* lockout state */
42 	CMPL = (1 <<  CMPL_NUM),	/* I/O is complete  */
43 	EVENT = (1 << EVENT_NUM),	/* DCAS, DTAS, or IFC has occurred */
44 	SPOLL = (1 << SPOLL_NUM),	/* board serial polled by busmaster */
45 	RQS = (1 <<  RQS_NUM),	/* Device requesting service  */
46 	SRQI = (1 << SRQI_NUM),	/* SRQ is asserted */
47 	END = (1 << END_NUM),	/* EOI or EOS encountered */
48 	TIMO = (1 << TIMO_NUM),	/* Time limit on I/O or wait function exceeded */
49 	ERR = (1 << ERR_NUM),	/* Function call terminated on error */
50 
51 	device_status_mask = ERR | TIMO | END | CMPL | RQS,
52 	board_status_mask = ERR | TIMO | END | CMPL | SPOLL |
53 		EVENT | LOK | REM | CIC | ATN | TACS | LACS | DTAS | DCAS | SRQI,
54 };
55 
56 /* IBERR error codes */
57 enum iberr_code {
58 	EDVR = 0,		/* system error */
59 	ECIC = 1,		/* not CIC */
60 	ENOL = 2,		/* no listeners */
61 	EADR = 3,		/* CIC and not addressed before I/O */
62 	EARG = 4,		/* bad argument to function call */
63 	ESAC = 5,		/* not SAC */
64 	EABO = 6,		/* I/O operation was aborted */
65 	ENEB = 7,		/* non-existent board (GPIB interface offline) */
66 	EDMA = 8,		/* DMA hardware error detected */
67 	EOIP = 10,		/* new I/O attempted with old I/O in progress  */
68 	ECAP = 11,		/* no capability for intended opeation */
69 	EFSO = 12,		/* file system operation error */
70 	EBUS = 14,		/* bus error */
71 	ESTB = 15,		/* lost serial poll bytes */
72 	ESRQ = 16,		/* SRQ stuck on */
73 	ETAB = 20	       /* Table Overflow */
74 };
75 
76 /* Timeout values and meanings */
77 enum gpib_timeout {
78 	TNONE = 0,		/* Infinite timeout (disabled)	   */
79 	T10us = 1,		/* Timeout of 10 usec (ideal)	   */
80 	T30us = 2,		/* Timeout of 30 usec (ideal)	   */
81 	T100us = 3,		/* Timeout of 100 usec (ideal)	   */
82 	T300us = 4,		/* Timeout of 300 usec (ideal)	   */
83 	T1ms = 5,		/* Timeout of 1 msec (ideal)	   */
84 	T3ms = 6,		/* Timeout of 3 msec (ideal)	   */
85 	T10ms = 7,		/* Timeout of 10 msec (ideal)	   */
86 	T30ms = 8,		/* Timeout of 30 msec (ideal)	   */
87 	T100ms = 9,		/* Timeout of 100 msec (ideal)	   */
88 	T300ms = 10,	/* Timeout of 300 msec (ideal)	   */
89 	T1s = 11,		/* Timeout of 1 sec (ideal)	   */
90 	T3s = 12,		/* Timeout of 3 sec (ideal)	   */
91 	T10s = 13,		/* Timeout of 10 sec (ideal)	   */
92 	T30s = 14,		/* Timeout of 30 sec (ideal)	   */
93 	T100s = 15,		/* Timeout of 100 sec (ideal)	   */
94 	T300s = 16,		/* Timeout of 300 sec (ideal)	   */
95 	T1000s = 17		/* Timeout of 1000 sec (maximum)   */
96 };
97 
98 /* End-of-string (EOS) modes for use with ibeos */
99 
100 enum eos_flags {
101 	EOS_MASK = 0x1c00,
102 	REOS = 0x0400,		/* Terminate reads on EOS	*/
103 	XEOS = 0x800,	/* assert EOI when EOS char is sent */
104 	BIN = 0x1000		/* Do 8-bit compare on EOS	*/
105 };
106 
107 /* GPIB Bus Control Lines bit vector */
108 enum bus_control_line {
109 	ValidDAV = 0x01,
110 	ValidNDAC = 0x02,
111 	ValidNRFD = 0x04,
112 	ValidIFC = 0x08,
113 	ValidREN = 0x10,
114 	ValidSRQ = 0x20,
115 	ValidATN = 0x40,
116 	ValidEOI = 0x80,
117 	ValidALL = 0xff,
118 	BusDAV = 0x0100,		/* DAV	line status bit */
119 	BusNDAC = 0x0200,		/* NDAC line status bit */
120 	BusNRFD = 0x0400,		/* NRFD line status bit */
121 	BusIFC = 0x0800,		/* IFC	line status bit */
122 	BusREN = 0x1000,		/* REN	line status bit */
123 	BusSRQ = 0x2000,		/* SRQ	line status bit */
124 	BusATN = 0x4000,		/* ATN	line status bit */
125 	BusEOI = 0x8000		/* EOI	line status bit */
126 };
127 
128 enum old_bus_control_line {
129 	BUS_DAV = 0x0100,		/* DAV	line status bit */
130 	BUS_NDAC = 0x0200,		/* NDAC line status bit */
131 	BUS_NRFD = 0x0400,		/* NRFD line status bit */
132 	BUS_IFC = 0x0800,		/* IFC	line status bit */
133 	BUS_REN = 0x1000,		/* REN	line status bit */
134 	BUS_SRQ = 0x2000,		/* SRQ	line status bit */
135 	BUS_ATN = 0x4000,		/* ATN	line status bit */
136 	BUS_EOI = 0x8000		/* EOI	line status bit */
137 };
138 
139 /* Possible GPIB command messages */
140 
141 enum cmd_byte {
142 	GTL = 0x1,	/* go to local			*/
143 	SDC = 0x4,	/* selected device clear	*/
144 	PPConfig = 0x5,
145 #ifndef PPC
146 	PPC = PPConfig,	/* parallel poll configure	*/
147 #endif
148 	GET = 0x8,	/* group execute trigger	*/
149 	TCT = 0x9,	/* take control			*/
150 	LLO = 0x11,	/* local lockout		*/
151 	DCL = 0x14,	/* device clear			*/
152 	PPU = 0x15,	/* parallel poll unconfigure	*/
153 	SPE = 0x18,	/* serial poll enable		*/
154 	SPD = 0x19,	/* serial poll disable		*/
155 	CFE = 0x1f, /* configure enable */
156 	LAD = 0x20,	/* value to be 'ored' in to obtain listen address */
157 	UNL = 0x3F,	/* unlisten			*/
158 	TAD = 0x40,	/* value to be 'ored' in to obtain talk address	  */
159 	UNT = 0x5F,	/* untalk			*/
160 	SAD = 0x60,	/* my secondary address (base) */
161 	PPE = 0x60,	/* parallel poll enable (base)	*/
162 	PPD = 0x70	/* parallel poll disable	*/
163 };
164 
165 enum ppe_bits {
166 	PPC_DISABLE = 0x10,
167 	PPC_SENSE = 0x8,	/* parallel poll sense bit	*/
168 	PPC_DIO_MASK = 0x7
169 };
170 
171 /* confine address to range 0 to 30. */
gpib_address_restrict(unsigned int addr)172 static inline unsigned int gpib_address_restrict(unsigned int addr)
173 {
174 	addr &= 0x1f;
175 	if (addr == 0x1f)
176 		addr = 0;
177 	return addr;
178 }
179 
MLA(unsigned int addr)180 static inline uint8_t MLA(unsigned int addr)
181 {
182 	return gpib_address_restrict(addr) | LAD;
183 }
184 
MTA(unsigned int addr)185 static inline uint8_t MTA(unsigned int addr)
186 {
187 	return gpib_address_restrict(addr) | TAD;
188 }
189 
MSA(unsigned int addr)190 static inline uint8_t MSA(unsigned int addr)
191 {
192 	return gpib_address_restrict(addr) | SAD;
193 }
194 
PPE_byte(unsigned int dio_line,int sense)195 static inline uint8_t PPE_byte(unsigned int dio_line, int sense)
196 {
197 	uint8_t cmd;
198 
199 	cmd = PPE;
200 	if (sense)
201 		cmd |= PPC_SENSE;
202 	cmd |= (dio_line - 1) & 0x7;
203 	return cmd;
204 }
205 
CFGn(unsigned int meters)206 static inline uint8_t CFGn(unsigned int meters)
207 {
208 	return 0x6 | (meters & 0xf);
209 }
210 
211 /* mask of bits that actually matter in a command byte */
212 enum {
213 	gpib_command_mask = 0x7f,
214 };
215 
is_PPE(uint8_t command)216 static inline int is_PPE(uint8_t command)
217 {
218 	return (command & 0x70) == 0x60;
219 }
220 
is_PPD(uint8_t command)221 static inline int is_PPD(uint8_t command)
222 {
223 	return (command & 0x70) == 0x70;
224 }
225 
in_addressed_command_group(uint8_t command)226 static inline int in_addressed_command_group(uint8_t command)
227 {
228 	return (command & 0x70) == 0x0;
229 }
230 
in_universal_command_group(uint8_t command)231 static inline int in_universal_command_group(uint8_t command)
232 {
233 	return (command & 0x70) == 0x10;
234 }
235 
in_listen_address_group(uint8_t command)236 static inline int in_listen_address_group(uint8_t command)
237 {
238 	return (command & 0x60) == 0x20;
239 }
240 
in_talk_address_group(uint8_t command)241 static inline int in_talk_address_group(uint8_t command)
242 {
243 	return (command & 0x60) == 0x40;
244 }
245 
in_primary_command_group(uint8_t command)246 static inline int in_primary_command_group(uint8_t command)
247 {
248 	return in_addressed_command_group(command) ||
249 		in_universal_command_group(command) ||
250 		in_listen_address_group(command) ||
251 		in_talk_address_group(command);
252 }
253 
gpib_address_equal(unsigned int pad1,int sad1,unsigned int pad2,int sad2)254 static inline int gpib_address_equal(unsigned int pad1, int sad1, unsigned int pad2, int sad2)
255 {
256 	if (pad1 == pad2) {
257 		if (sad1 == sad2)
258 			return 1;
259 		if (sad1 < 0 && sad2 < 0)
260 			return 1;
261 	}
262 
263 	return 0;
264 }
265 
266 enum ibask_option {
267 	IbaPAD = 0x1,
268 	IbaSAD = 0x2,
269 	IbaTMO = 0x3,
270 	IbaEOT = 0x4,
271 	IbaPPC = 0x5,	/* board only */
272 	IbaREADDR = 0x6,	/* device only */
273 	IbaAUTOPOLL = 0x7,	/* board only */
274 	IbaCICPROT = 0x8,	/* board only */
275 	IbaIRQ = 0x9,	/* board only */
276 	IbaSC = 0xa,	/* board only */
277 	IbaSRE = 0xb,	/* board only */
278 	IbaEOSrd = 0xc,
279 	IbaEOSwrt = 0xd,
280 	IbaEOScmp = 0xe,
281 	IbaEOSchar = 0xf,
282 	IbaPP2 = 0x10,	/* board only */
283 	IbaTIMING = 0x11,	/* board only */
284 	IbaDMA = 0x12,	/* board only */
285 	IbaReadAdjust = 0x13,
286 	IbaWriteAdjust = 0x14,
287 	IbaEventQueue = 0x15,	/* board only */
288 	IbaSPollBit = 0x16,	/* board only */
289 	IbaSpollBit = 0x16,	/* board only */
290 	IbaSendLLO = 0x17,	/* board only */
291 	IbaSPollTime = 0x18,	/* device only */
292 	IbaPPollTime = 0x19,	/* board only */
293 	IbaEndBitIsNormal = 0x1a,
294 	IbaUnAddr = 0x1b,	/* device only */
295 	IbaHSCableLength = 0x1f,	/* board only */
296 	IbaIst = 0x20,	/* board only */
297 	IbaRsv = 0x21,	/* board only */
298 	IbaBNA = 0x200,	/* device only */
299 	/* linux-gpib extensions */
300 	Iba7BitEOS = 0x1000	/* board only. Returns 1 if board supports 7 bit eos compares*/
301 };
302 
303 enum ibconfig_option {
304 	IbcPAD = 0x1,
305 	IbcSAD = 0x2,
306 	IbcTMO = 0x3,
307 	IbcEOT = 0x4,
308 	IbcPPC = 0x5,	/* board only */
309 	IbcREADDR = 0x6,	/* device only */
310 	IbcAUTOPOLL = 0x7,	/* board only */
311 	IbcCICPROT = 0x8,	/* board only */
312 	IbcIRQ = 0x9,	/* board only */
313 	IbcSC = 0xa,	/* board only */
314 	IbcSRE = 0xb,	/* board only */
315 	IbcEOSrd = 0xc,
316 	IbcEOSwrt = 0xd,
317 	IbcEOScmp = 0xe,
318 	IbcEOSchar = 0xf,
319 	IbcPP2 = 0x10,	/* board only */
320 	IbcTIMING = 0x11,	/* board only */
321 	IbcDMA = 0x12,	/* board only */
322 	IbcReadAdjust = 0x13,
323 	IbcWriteAdjust = 0x14,
324 	IbcEventQueue = 0x15,	/* board only */
325 	IbcSPollBit = 0x16,	/* board only */
326 	IbcSpollBit = 0x16,	/* board only */
327 	IbcSendLLO = 0x17,	/* board only */
328 	IbcSPollTime = 0x18,	/* device only */
329 	IbcPPollTime = 0x19,	/* board only */
330 	IbcEndBitIsNormal = 0x1a,
331 	IbcUnAddr = 0x1b,	/* device only */
332 	IbcHSCableLength = 0x1f,	/* board only */
333 	IbcIst = 0x20,	/* board only */
334 	IbcRsv = 0x21,	/* board only */
335 	IbcBNA = 0x200	/* device only */
336 };
337 
338 enum t1_delays {
339 	T1_DELAY_2000ns = 1,
340 	T1_DELAY_500ns = 2,
341 	T1_DELAY_350ns = 3
342 };
343 
344 enum {
345 	request_service_bit = 0x40,
346 };
347 
348 enum gpib_events {
349 	EventNone = 0,
350 	EventDevTrg = 1,
351 	EventDevClr = 2,
352 	EventIFC = 3
353 };
354 
355 enum gpib_stb {
356 	IbStbRQS = 0x40, /* IEEE 488.1 & 2  */
357 	IbStbESB = 0x20, /* IEEE 488.2 only */
358 	IbStbMAV = 0x10	 /* IEEE 488.2 only */
359 };
360 
361 #endif	/* _GPIB_USER_H */
362 
363 /* Check for errors */
364