Home
last modified time | relevance | path

Searched defs:CLKCR (Results 1 – 23 of 23) sorted by relevance

/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f411xe.h428 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f401xe.h427 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f401xc.h427 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f412cx.h568 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f415xx.h589 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f412zx.h591 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f412vx.h591 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f412rx.h591 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f405xx.h590 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f417xx.h685 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f407xx.h686 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f446xx.h665 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f413xx.h652 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f423xx.h653 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f427xx.h756 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f437xx.h757 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f429xx.h804 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f439xx.h805 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f469xx.h867 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
H A Dstm32f479xx.h868 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h702 __IO uint32_t CLKCR; /*!< SDI clock control register, Address offset: 0x04 */ member
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h766 __IO uint32_t CLKCR; /*!< SDMMC clock control register, Address offset: 0x04 */ member
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h817 __IO uint32_t CLKCR; /*!< SDMMC clock control register, Address offset: 0x04 */ member