1 #ifndef CMIS_H__ 2 #define CMIS_H__ 3 4 /* Identifier and revision compliance (Page 0) */ 5 #define CMIS_ID_OFFSET 0x00 6 #define CMIS_REV_COMPLIANCE_OFFSET 0x01 7 #define CMIS_MEMORY_MODEL_OFFSET 0x02 8 #define CMIS_MEMORY_MODEL_MASK 0x80 9 10 /* Global Status Information (Page 0) */ 11 #define CMIS_MODULE_STATE_OFFSET 0x03 12 #define CMIS_MODULE_STATE_MASK 0x0E 13 #define CMIS_MODULE_STATE_MODULE_LOW_PWR 0x01 14 #define CMIS_MODULE_STATE_MODULE_PWR_UP 0x02 15 #define CMIS_MODULE_STATE_MODULE_READY 0x03 16 #define CMIS_MODULE_STATE_MODULE_PWR_DN 0x04 17 #define CMIS_MODULE_STATE_MODULE_FAULT 0x05 18 19 /* Module Flags (Page 0) */ 20 #define CMIS_VCC_AW_OFFSET 0x09 21 #define CMIS_VCC_LWARN_STATUS 0x80 22 #define CMIS_VCC_HWARN_STATUS 0x40 23 #define CMIS_VCC_LALARM_STATUS 0x20 24 #define CMIS_VCC_HALARM_STATUS 0x10 25 #define CMIS_TEMP_AW_OFFSET 0x09 26 #define CMIS_TEMP_LWARN_STATUS 0x08 27 #define CMIS_TEMP_HWARN_STATUS 0x04 28 #define CMIS_TEMP_LALARM_STATUS 0x02 29 #define CMIS_TEMP_HALARM_STATUS 0x01 30 31 #define CMIS_MODULE_TYPE_OFFSET 0x55 32 #define CMIS_MT_MMF 0x01 33 #define CMIS_MT_SMF 0x02 34 35 /* Module-Level Monitors (Page 0) */ 36 #define CMIS_CURR_TEMP_OFFSET 0x0E 37 #define CMIS_CURR_VCC_OFFSET 0x10 38 39 /* Module Global Controls (Page 0) */ 40 #define CMIS_MODULE_CONTROL_OFFSET 0x1A 41 #define CMIS_LOW_PWR_ALLOW_REQUEST_HW_MASK 0x40 42 #define CMIS_LOW_PWR_REQUEST_SW_MASK 0x10 43 44 /* Module Fault Information (Page 0) */ 45 #define CMIS_MODULE_FAULT_OFFSET 0x29 46 #define CMIS_MODULE_FAULT_NO_FAULT 0x00 47 #define CMIS_MODULE_FAULT_TEC_RUNAWAY 0x01 48 #define CMIS_MODULE_FAULT_DATA_MEM_CORRUPTED 0x02 49 #define CMIS_MODULE_FAULT_PROG_MEM_CORRUPTED 0x03 50 51 #define CMIS_CTOR_OFFSET 0xCB 52 53 /* Vendor related information (Page 0) */ 54 #define CMIS_VENDOR_NAME_START_OFFSET 0x81 55 #define CMIS_VENDOR_NAME_END_OFFSET 0x90 56 57 #define CMIS_VENDOR_OUI_OFFSET 0x91 58 59 #define CMIS_VENDOR_PN_START_OFFSET 0x94 60 #define CMIS_VENDOR_PN_END_OFFSET 0xA3 61 62 #define CMIS_VENDOR_REV_START_OFFSET 0xA4 63 #define CMIS_VENDOR_REV_END_OFFSET 0xA5 64 65 #define CMIS_VENDOR_SN_START_OFFSET 0xA6 66 #define CMIS_VENDOR_SN_END_OFFSET 0xB5 67 68 #define CMIS_DATE_YEAR_OFFSET 0xB6 69 #define CMIS_DATE_VENDOR_LOT_OFFSET 0xBC 70 71 /* CLEI Code (Page 0) */ 72 #define CMIS_CLEI_START_OFFSET 0xBE 73 #define CMIS_CLEI_END_OFFSET 0xC7 74 #define CMIS_CLEI_BLANK " " 75 #define CMIS_CLEI_LEN 0x0A 76 77 /* Cable assembly length */ 78 #define CMIS_CBL_ASM_LEN_OFFSET 0xCA 79 #define CMIS_6300M_MAX_LEN 0xFF 80 81 /* Cable length with multiplier */ 82 #define CMIS_MULTIPLIER_00 0x00 83 #define CMIS_MULTIPLIER_01 0x40 84 #define CMIS_MULTIPLIER_10 0x80 85 #define CMIS_MULTIPLIER_11 0xC0 86 #define CMIS_LEN_MUL_MASK 0xC0 87 #define CMIS_LEN_VAL_MASK 0x3F 88 89 /* Module power characteristics */ 90 #define CMIS_PWR_CLASS_OFFSET 0xC8 91 #define CMIS_PWR_MAX_POWER_OFFSET 0xC9 92 #define CMIS_PWR_CLASS_MASK 0xE0 93 #define CMIS_PWR_CLASS_1 0x00 94 #define CMIS_PWR_CLASS_2 0x01 95 #define CMIS_PWR_CLASS_3 0x02 96 #define CMIS_PWR_CLASS_4 0x03 97 #define CMIS_PWR_CLASS_5 0x04 98 #define CMIS_PWR_CLASS_6 0x05 99 #define CMIS_PWR_CLASS_7 0x06 100 #define CMIS_PWR_CLASS_8 0x07 101 102 /* Copper cable attenuation */ 103 #define CMIS_COPPER_ATT_5GHZ 0xCC 104 #define CMIS_COPPER_ATT_7GHZ 0xCD 105 #define CMIS_COPPER_ATT_12P9GHZ 0xCE 106 #define CMIS_COPPER_ATT_25P8GHZ 0xCF 107 108 /* Cable assembly lane */ 109 #define CMIS_CABLE_ASM_NEAR_END_OFFSET 0xD2 110 #define CMIS_CABLE_ASM_FAR_END_OFFSET 0xD3 111 112 /* Media interface technology */ 113 #define CMIS_MEDIA_INTF_TECH_OFFSET 0xD4 114 #define CMIS_850_VCSEL 0x00 115 #define CMIS_1310_VCSEL 0x01 116 #define CMIS_1550_VCSEL 0x02 117 #define CMIS_1310_FP 0x03 118 #define CMIS_1310_DFB 0x04 119 #define CMIS_1550_DFB 0x05 120 #define CMIS_1310_EML 0x06 121 #define CMIS_1550_EML 0x07 122 #define CMIS_OTHERS 0x08 123 #define CMIS_1490_DFB 0x09 124 #define CMIS_COPPER_UNEQUAL 0x0A 125 #define CMIS_COPPER_PASS_EQUAL 0x0B 126 #define CMIS_COPPER_NF_EQUAL 0x0C 127 #define CMIS_COPPER_F_EQUAL 0x0D 128 #define CMIS_COPPER_N_EQUAL 0x0E 129 #define CMIS_COPPER_LINEAR_EQUAL 0x0F 130 131 /*----------------------------------------------------------------------- 132 * Upper Memory Page 0x01: contains advertising fields that define properties 133 * that are unique to active modules and cable assemblies. 134 * GlobalOffset = 2 * 0x80 + LocalOffset 135 */ 136 137 /* Supported Link Length (Page 1) */ 138 #define CMIS_SMF_LEN_OFFSET 0x84 139 #define CMIS_OM5_LEN_OFFSET 0x85 140 #define CMIS_OM4_LEN_OFFSET 0x86 141 #define CMIS_OM3_LEN_OFFSET 0x87 142 #define CMIS_OM2_LEN_OFFSET 0x88 143 144 /* Wavelength (Page 1) */ 145 #define CMIS_NOM_WAVELENGTH_MSB 0x8A 146 #define CMIS_NOM_WAVELENGTH_LSB 0x8B 147 #define CMIS_WAVELENGTH_TOL_MSB 0x8C 148 #define CMIS_WAVELENGTH_TOL_LSB 0x8D 149 150 /* Supported Pages Advertising (Page 1) */ 151 #define CMIS_PAGES_ADVER_OFFSET 0x8E 152 #define CMIS_BANKS_SUPPORTED_MASK 0x03 153 #define CMIS_BANK_0_SUPPORTED 0x00 154 #define CMIS_BANK_0_1_SUPPORTED 0x01 155 #define CMIS_BANK_0_3_SUPPORTED 0x02 156 157 /* Module Characteristics Advertising (Page 1) */ 158 #define CMIS_DIAG_TYPE_OFFSET 0x97 159 #define CMIS_RX_PWR_TYPE_MASK 0x10 160 161 /* Supported Flags Advertisement (Page 1) */ 162 #define CMIS_DIAG_FLAGS_TX_OFFSET 0x9d 163 #define CMIS_DIAG_FL_TX_ADAPTIVE_EQ_FAIL (1 << 3) 164 #define CMIS_DIAG_FL_TX_LOL (1 << 2) 165 #define CMIS_DIAG_FL_TX_LOS (1 << 1) 166 #define CMIS_DIAG_FL_TX_FAIL (1 << 0) 167 168 #define CMIS_DIAG_FLAGS_RX_OFFSET 0x9e 169 #define CMIS_DIAG_FL_RX_LOL (1 << 2) 170 #define CMIS_DIAG_FL_RX_LOS (1 << 1) 171 172 /* Supported Monitors Advertisement (Page 1) */ 173 #define CMIS_DIAG_CHAN_ADVER_OFFSET 0xA0 174 #define CMIS_TX_BIAS_MON_MASK 0x01 175 #define CMIS_TX_PWR_MON_MASK 0x02 176 #define CMIS_RX_PWR_MON_MASK 0x04 177 #define CMIS_TX_BIAS_MUL_MASK 0x18 178 #define CMIS_TX_BIAS_MUL_1 0x00 179 #define CMIS_TX_BIAS_MUL_2 0x08 180 #define CMIS_TX_BIAS_MUL_4 0x10 181 182 /* Signal integrity controls */ 183 #define CMIS_SIG_INTEG_TX_OFFSET 0xA1 184 #define CMIS_SIG_INTEG_RX_OFFSET 0xA2 185 186 /*----------------------------------------------------------------------- 187 * Upper Memory Page 0x02: Optional Page that informs about module-defined 188 * thresholds for module-level and lane-specific threshold crossing monitors. 189 */ 190 191 /* Module-Level Monitor Thresholds (Page 2) */ 192 #define CMIS_TEMP_HALRM_OFFSET 0x80 193 #define CMIS_TEMP_LALRM_OFFSET 0x82 194 #define CMIS_TEMP_HWARN_OFFSET 0x84 195 #define CMIS_TEMP_LWARN_OFFSET 0x86 196 #define CMIS_VCC_HALRM_OFFSET 0x88 197 #define CMIS_VCC_LALRM_OFFSET 0x8A 198 #define CMIS_VCC_HWARN_OFFSET 0x8C 199 #define CMIS_VCC_LWARN_OFFSET 0x8E 200 201 /* Lane-Related Monitor Thresholds (Page 2) */ 202 #define CMIS_TX_PWR_HALRM_OFFSET 0xB0 203 #define CMIS_TX_PWR_LALRM_OFFSET 0xB2 204 #define CMIS_TX_PWR_HWARN_OFFSET 0xB4 205 #define CMIS_TX_PWR_LWARN_OFFSET 0xB6 206 #define CMIS_TX_BIAS_HALRM_OFFSET 0xB8 207 #define CMIS_TX_BIAS_LALRM_OFFSET 0xBA 208 #define CMIS_TX_BIAS_HWARN_OFFSET 0xBC 209 #define CMIS_TX_BIAS_LWARN_OFFSET 0xBE 210 #define CMIS_RX_PWR_HALRM_OFFSET 0xC0 211 #define CMIS_RX_PWR_LALRM_OFFSET 0xC2 212 #define CMIS_RX_PWR_HWARN_OFFSET 0xC4 213 #define CMIS_RX_PWR_LWARN_OFFSET 0xC6 214 215 /*----------------------------------------------------------------------- 216 * Upper Memory Page 0x11: Optional Page that contains lane dynamic status 217 * bytes. 218 */ 219 220 /* Media Lane-Specific Flags (Page 0x11) */ 221 #define CMIS_TX_FAIL_OFFSET 0x87 222 #define CMIS_TX_LOS_OFFSET 0x88 223 #define CMIS_TX_LOL_OFFSET 0x89 224 #define CMIS_TX_EQ_FAIL_OFFSET 0x8a 225 #define CMIS_TX_PWR_AW_HALARM_OFFSET 0x8B 226 #define CMIS_TX_PWR_AW_LALARM_OFFSET 0x8C 227 #define CMIS_TX_PWR_AW_HWARN_OFFSET 0x8D 228 #define CMIS_TX_PWR_AW_LWARN_OFFSET 0x8E 229 #define CMIS_TX_BIAS_AW_HALARM_OFFSET 0x8F 230 #define CMIS_TX_BIAS_AW_LALARM_OFFSET 0x90 231 #define CMIS_TX_BIAS_AW_HWARN_OFFSET 0x91 232 #define CMIS_TX_BIAS_AW_LWARN_OFFSET 0x92 233 #define CMIS_RX_LOS_OFFSET 0x93 234 #define CMIS_RX_LOL_OFFSET 0x94 235 #define CMIS_RX_PWR_AW_HALARM_OFFSET 0x95 236 #define CMIS_RX_PWR_AW_LALARM_OFFSET 0x96 237 #define CMIS_RX_PWR_AW_HWARN_OFFSET 0x97 238 #define CMIS_RX_PWR_AW_LWARN_OFFSET 0x98 239 240 /* Media Lane-Specific Monitors (Page 0x11) */ 241 #define CMIS_TX_PWR_OFFSET 0x9A 242 #define CMIS_TX_BIAS_OFFSET 0xAA 243 #define CMIS_RX_PWR_OFFSET 0xBA 244 245 #define YESNO(x) (((x) != 0) ? "Yes" : "No") 246 #define ONOFF(x) (((x) != 0) ? "On" : "Off") 247 248 void cmis_show_all_ioctl(const __u8 *id); 249 250 int cmis_show_all_nl(struct cmd_context *ctx); 251 252 #endif /* CMIS_H__ */ 253