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Searched defs:CR (Results 1 – 25 of 30) sorted by relevance

12

/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h133 …__IO uint32_t CR; /*!< ADC Control register, Addre… member
179 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x0… member
191 __IO uint32_t CR; /*!< CRS ccontrol register, Address offset: 0x00 */ member
203 …__IO uint32_t CR; /*!< DAC control register, Address… member
226 …__IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04… member
327 …__IO uint32_t CR; /*!< LPTIM Control register, Address offset: 0x10… member
385 __IO uint32_t CR; /*!< LCD control register, Address offset: 0x00 */ member
406 …__IO uint32_t CR ; /*!< Configuration register, Address offset: 0x… member
415 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
424 …__IO uint32_t CR; /*!< RCC clock control register, Ad… member
[all …]
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h190 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
199 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
222 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
234 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
274 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
367 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
377 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
414 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
522 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
533 __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f410tx.h187 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
196 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
219 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
231 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
271 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
364 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
374 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
411 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
519 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
530 __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f410cx.h190 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
199 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
222 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
234 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
274 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
367 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
377 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
414 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
522 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
533 __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f411xe.h195 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
205 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
217 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
257 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
329 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
339 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
381 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
517 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
H A Dstm32f401xe.h194 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
204 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
216 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
256 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
328 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
338 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
380 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
516 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
H A Dstm32f401xc.h194 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
204 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
216 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
256 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
328 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
338 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
380 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
516 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
H A Dstm32f439xx.h294 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
303 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
326 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
337 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
356 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
378 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
502 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
663 …__IO uint32_t CR; /*!< LTDC Layerx Control Register Ad… member
685 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
695 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
[all …]
H A Dstm32f437xx.h292 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
301 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
324 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
335 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
354 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
376 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
500 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
637 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
647 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
689 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
[all …]
H A Dstm32f417xx.h285 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
294 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
317 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
328 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
347 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
462 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
588 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
598 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
638 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
774 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f446xx.h286 __IO uint32_t CR; /*!< CEC control register, Address offset:0x00 */ member
303 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
312 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
335 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
346 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
365 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
405 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
543 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
553 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
597 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
[all …]
H A Dstm32f423xx.h298 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
342 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
365 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
377 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
417 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
531 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
541 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
585 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
697 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0… member
762 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f415xx.h282 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
291 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
314 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
326 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
366 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
492 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
502 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
542 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
678 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
689 …__IO uint32_t CR; /*!< CRYP control register, Address o… member
[all …]
H A Dstm32f479xx.h296 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
305 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
328 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
339 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
358 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
380 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
412 …__IO uint32_t CR; /*!< DSI Host Control Register, Addre… member
585 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
726 …__IO uint32_t CR; /*!< LTDC Layerx Control Register Ad… member
748 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f469xx.h295 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
304 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
327 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
338 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
357 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
379 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
411 …__IO uint32_t CR; /*!< DSI Host Control Register, Addre… member
584 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
725 …__IO uint32_t CR; /*!< LTDC Layerx Control Register Ad… member
747 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f429xx.h293 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
302 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
325 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
336 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
355 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
377 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
501 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
662 …__IO uint32_t CR; /*!< LTDC Layerx Control Register Ad… member
684 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
694 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
[all …]
H A Dstm32f413xx.h297 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
341 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
364 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
376 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
416 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
530 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
540 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
584 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
696 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0… member
761 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f427xx.h291 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
300 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
323 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
334 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
353 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
375 …__IO uint32_t CR; /*!< DMA2D Control Register, Address offset: … member
499 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
636 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
646 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
688 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
[all …]
H A Dstm32f407xx.h286 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
295 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
318 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
329 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
348 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
463 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
589 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
599 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
639 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
775 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
[all …]
H A Dstm32f412zx.h281 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
326 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
338 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
378 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
490 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
500 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
544 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
635 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset: 0… member
700 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
711 __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ member
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb55xx.h168 …__IO uint32_t CR; /*!< ADC control register, Address offset: 0x… member
234 …__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 … member
246 …__IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 … member
309 …__IO uint32_t CR; /*!< FLASH Control register, Address offs… member
385 …__IO uint32_t CR; /*!< LPTIM Control register, Address offset… member
429 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset… member
449 …__IO uint32_t CR; /*!< RCC clock Control Register, … member
519 …__IO uint32_t CR; /*!< RTC control register, Address … member
665 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
676 …__IO uint32_t CR; /*!< AES control register, Address offset: 0x00 … member
[all …]
H A Dstm32wb50xx.h149 …__IO uint32_t CR; /*!< ADC control register, Address offset: 0x… member
202 …__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 … member
214 …__IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 … member
277 …__IO uint32_t CR; /*!< FLASH Control register, Address offs… member
353 …__IO uint32_t CR; /*!< LPTIM Control register, Address offset… member
396 …__IO uint32_t CR; /*!< RCC clock Control Register, … member
466 …__IO uint32_t CR; /*!< RTC control register, Address … member
612 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
623 …__IO uint32_t CR; /*!< AES control register, Address offset: 0x00 … member
654 __IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */ member
[all …]
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h169 …__IO uint32_t CR; /*!< ADC control register, Address offset: 0x… member
305 …__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 … member
316 __IO uint32_t CR; /*!< CRS ccontrol register, Address offset: 0x00 */ member
328 …__IO uint32_t CR; /*!< DAC control register, Address o… member
392 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
463 …__IO uint32_t CR ; /*!< Configuration register, Address offset:… member
478 …__IO uint32_t CR; /*!< FLASH control register, Address offset: 0x1… member
551 …__IO uint32_t CR; /*!< LPTIM Control register, Address offset… member
613 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset… member
635 …__IO uint32_t CR; /*!< RCC clock control register, … member
[all …]
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h182 …__IO uint32_t CR; /*!< ADC control register, Address offset: 0x… member
318 …__IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 … member
330 …__IO uint32_t CR; /*!< DAC control register, Address o… member
394 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
465 …__IO uint32_t CR ; /*!< Configuration register, Address offset:… member
480 …__IO uint32_t CR; /*!< FLASH control register, Address offset: 0x1… member
587 __IO uint32_t CR; /*!< LCD control register, Address offset: 0x00 */ member
604 …__IO uint32_t CR; /*!< LPTIM Control register, Address offset… member
666 …__IO uint32_t CR; /*!< QUADSPI Control register, Address offset… member
688 …__IO uint32_t CR; /*!< RCC clock control register, … member
[all …]
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h302 __IO uint32_t CR; /*!< CRC Control register, Address offset: 0x08 */ member
311 …__IO uint32_t CR; /*!< DAC control register, Address offs… member
334 __IO uint32_t CR; /*!< Debug MCU configuration register, Address offset: 0x04 */ member
345 …__IO uint32_t CR; /*!< DCMI control register 1, Address offset: 0x00 */ member
364 __IO uint32_t CR; /*!< DMA stream x configuration register */ member
479 __IO uint32_t CR; /*!< FLASH control register, Address offset: 0x10 */ member
605 __IO uint32_t CR; /*!< PWR power control register, Address offset: 0x00 */ member
615 …__IO uint32_t CR; /*!< RCC clock control register, Add… member
655 …__IO uint32_t CR; /*!< RTC control register, Address offs… member
791 __IO uint32_t CR; /*!< WWDG Control register, Address offset: 0x00 */ member
[all …]

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