1 /* $NoKeywords:$ */ 2 /** 3 * @file 4 * 5 * AMD Library 6 * 7 * Contains interface to the AMD AGESA library 8 * 9 * @xrefitem bom "File Content Label" "Release Content" 10 * @e project: AGESA 11 * @e sub-project: Lib 12 * @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $ 13 * 14 */ 15 /* 16 ****************************************************************************** 17 * 18 * Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc. 19 * 2013 - 2014, Sage Electronic Engineering, LLC 20 * All rights reserved. 21 * 22 * Redistribution and use in source and binary forms, with or without 23 * modification, are permitted provided that the following conditions are met: 24 * * Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * * Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in the 28 * documentation and/or other materials provided with the distribution. 29 * * Neither the name of Advanced Micro Devices, Inc. nor the names of 30 * its contributors may be used to endorse or promote products derived 31 * from this software without specific prior written permission. 32 * 33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 34 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 35 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 36 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY 37 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 38 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 39 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 40 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 42 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43 ****************************************************************************** 44 **/ 45 46 #ifndef _AMD_LIB_H_ 47 #define _AMD_LIB_H_ 48 49 #include "Porting.h" 50 #include "AMD.h" 51 52 #define IOCF8 0xCF8 53 #define IOCFC 0xCFC 54 55 // Reg Values for ReadCpuReg and WriteCpuReg 56 #define CR4_REG 0x04 57 #define DR0_REG 0x10 58 #define DR1_REG 0x11 59 #define DR2_REG 0x12 60 #define DR3_REG 0x13 61 #define DR7_REG 0x17 62 63 // PROTOTYPES FOR amdlib32.asm 64 UINT8 65 ReadIo8 ( 66 IN UINT16 Address 67 ); 68 69 UINT16 70 ReadIo16 ( 71 IN UINT16 Address 72 ); 73 74 UINT32 75 ReadIo32 ( 76 IN UINT16 Address 77 ); 78 79 VOID 80 WriteIo8 ( 81 IN UINT16 Address, 82 IN UINT8 Data 83 ); 84 85 VOID 86 WriteIo16 ( 87 IN UINT16 Address, 88 IN UINT16 Data 89 ); 90 91 VOID 92 WriteIo32 ( 93 IN UINT16 Address, 94 IN UINT32 Data 95 ); 96 97 UINT8 98 Read64Mem8 ( 99 IN UINT64 Address 100 ); 101 102 UINT16 103 Read64Mem16 ( 104 IN UINT64 Address 105 ); 106 107 UINT32 108 Read64Mem32 ( 109 IN UINT64 Address 110 ); 111 112 VOID 113 Write64Mem8 ( 114 IN UINT64 Address, 115 IN UINT8 Data 116 ); 117 118 VOID 119 Write64Mem16 ( 120 IN UINT64 Address, 121 IN UINT16 Data 122 ); 123 124 VOID 125 Write64Mem32 ( 126 IN UINT64 Address, 127 IN UINT32 Data 128 ); 129 130 UINT64 131 ReadTSC ( 132 void 133 ); 134 135 // MSR 136 VOID 137 LibAmdMsrRead ( 138 IN UINT32 MsrAddress, 139 OUT UINT64 *Value, 140 IN OUT AMD_CONFIG_PARAMS *StdHeader 141 ); 142 143 VOID 144 LibAmdMsrWrite ( 145 IN UINT32 MsrAddress, 146 IN UINT64 *Value, 147 IN OUT AMD_CONFIG_PARAMS *StdHeader 148 ); 149 150 // IO 151 VOID 152 LibAmdIoRead ( 153 IN ACCESS_WIDTH AccessWidth, 154 IN UINT16 IoAddress, 155 OUT VOID *Value, 156 IN OUT AMD_CONFIG_PARAMS *StdHeader 157 ); 158 159 VOID 160 LibAmdIoWrite ( 161 IN ACCESS_WIDTH AccessWidth, 162 IN UINT16 IoAddress, 163 IN CONST VOID *Value, 164 IN OUT AMD_CONFIG_PARAMS *StdHeader 165 ); 166 167 VOID 168 LibAmdIoRMW ( 169 IN ACCESS_WIDTH AccessWidth, 170 IN UINT16 IoAddress, 171 IN CONST VOID *Data, 172 IN CONST VOID *DataMask, 173 IN OUT AMD_CONFIG_PARAMS *StdHeader 174 ); 175 176 VOID 177 LibAmdIoPoll ( 178 IN ACCESS_WIDTH AccessWidth, 179 IN UINT16 IoAddress, 180 IN CONST VOID *Data, 181 IN CONST VOID *DataMask, 182 IN UINT64 Delay, 183 IN OUT AMD_CONFIG_PARAMS *StdHeader 184 ); 185 186 // Memory or MMIO 187 VOID 188 LibAmdMemRead ( 189 IN ACCESS_WIDTH AccessWidth, 190 IN UINT64 MemAddress, 191 OUT VOID *Value, 192 IN OUT AMD_CONFIG_PARAMS *StdHeader 193 ); 194 195 VOID 196 LibAmdMemWrite ( 197 IN ACCESS_WIDTH AccessWidth, 198 IN UINT64 MemAddress, 199 IN CONST VOID *Value, 200 IN OUT AMD_CONFIG_PARAMS *StdHeader 201 ); 202 203 VOID 204 LibAmdMemRMW ( 205 IN ACCESS_WIDTH AccessWidth, 206 IN UINT64 MemAddress, 207 IN CONST VOID *Data, 208 IN CONST VOID *DataMask, 209 IN OUT AMD_CONFIG_PARAMS *StdHeader 210 ); 211 212 VOID 213 LibAmdMemPoll ( 214 IN ACCESS_WIDTH AccessWidth, 215 IN UINT64 MemAddress, 216 IN CONST VOID *Data, 217 IN CONST VOID *DataMask, 218 IN UINT64 Delay, 219 IN OUT AMD_CONFIG_PARAMS *StdHeader 220 ); 221 222 // PCI 223 VOID 224 LibAmdPciRead ( 225 IN ACCESS_WIDTH AccessWidth, 226 IN PCI_ADDR PciAddress, 227 OUT VOID *Value, 228 IN OUT AMD_CONFIG_PARAMS *StdHeader 229 ); 230 231 VOID 232 LibAmdPciWrite ( 233 IN ACCESS_WIDTH AccessWidth, 234 IN PCI_ADDR PciAddress, 235 IN CONST VOID *Value, 236 IN OUT AMD_CONFIG_PARAMS *StdHeader 237 ); 238 239 VOID 240 LibAmdPciRMW ( 241 IN ACCESS_WIDTH AccessWidth, 242 IN PCI_ADDR PciAddress, 243 IN CONST VOID *Data, 244 IN CONST VOID *DataMask, 245 IN OUT AMD_CONFIG_PARAMS *StdHeader 246 ); 247 248 VOID 249 LibAmdPciPoll ( 250 IN ACCESS_WIDTH AccessWidth, 251 IN PCI_ADDR PciAddress, 252 IN CONST VOID *Data, 253 IN CONST VOID *DataMask, 254 IN UINT64 Delay, 255 IN OUT AMD_CONFIG_PARAMS *StdHeader 256 ); 257 258 VOID 259 LibAmdPciReadBits ( 260 IN PCI_ADDR Address, 261 IN UINT8 Highbit, 262 IN UINT8 Lowbit, 263 OUT UINT32 *Value, 264 IN AMD_CONFIG_PARAMS *StdHeader 265 ); 266 267 VOID 268 LibAmdPciWriteBits ( 269 IN PCI_ADDR Address, 270 IN UINT8 Highbit, 271 IN UINT8 Lowbit, 272 IN CONST UINT32 *Value, 273 IN AMD_CONFIG_PARAMS *StdHeader 274 ); 275 276 VOID 277 LibAmdPciFindNextCap ( 278 IN OUT PCI_ADDR *Address, 279 IN AMD_CONFIG_PARAMS *StdHeader 280 ); 281 282 // CPUID 283 VOID 284 LibAmdCpuidRead ( 285 IN UINT32 CpuidFcnAddress, 286 OUT CPUID_DATA *Value, 287 IN OUT AMD_CONFIG_PARAMS *StdHeader 288 ); 289 290 // Utility Functions 291 VOID 292 LibAmdMemFill ( 293 IN VOID *Destination, 294 IN UINT8 Value, 295 IN UINTN FillLength, 296 IN OUT AMD_CONFIG_PARAMS *StdHeader 297 ); 298 299 VOID 300 LibAmdMemCopy ( 301 IN VOID *Destination, 302 IN CONST VOID *Source, 303 IN UINTN CopyLength, 304 IN OUT AMD_CONFIG_PARAMS *StdHeader 305 ); 306 307 CONST VOID * 308 LibAmdLocateImage ( 309 IN CONST VOID *StartAddress, 310 IN CONST VOID *EndAddress, 311 IN UINT32 Alignment, 312 IN CONST CHAR8 ModuleSignature[8] 313 ); 314 315 UINT32 316 LibAmdGetPackageType ( 317 IN AMD_CONFIG_PARAMS *StdHeader 318 ); 319 320 BOOLEAN 321 LibAmdVerifyImageChecksum ( 322 IN CONST VOID *ImagePtr 323 ); 324 325 UINT8 326 LibAmdBitScanReverse ( 327 IN UINT32 value 328 ); 329 UINT8 330 LibAmdBitScanForward ( 331 IN UINT32 value 332 ); 333 334 VOID 335 LibAmdReadCpuReg ( 336 IN UINT8 RegNum, 337 OUT UINT32 *Value 338 ); 339 VOID 340 LibAmdWriteCpuReg ( 341 IN UINT8 RegNum, 342 IN UINT32 Value 343 ); 344 345 VOID 346 LibAmdWriteBackInvalidateCache ( 347 void 348 ); 349 350 VOID 351 LibAmdSimNowEnterDebugger ( 352 void 353 ); 354 355 VOID 356 LibAmdHDTBreakPoint ( 357 void 358 ); 359 360 UINT8 361 LibAmdAccessWidth ( 362 IN ACCESS_WIDTH AccessWidth 363 ); 364 365 VOID 366 LibAmdCLFlush ( 367 IN UINT64 Address, 368 IN UINT8 Count 369 ); 370 371 VOID 372 StopHere ( 373 void 374 ); 375 376 VOID 377 LibAmdFinit ( 378 void 379 ); 380 381 VOID 382 LibAmdFnclex ( 383 void 384 ); 385 386 VOID 387 LibAmdReadMxcsr ( 388 OUT UINT32 *Value 389 ); 390 391 VOID 392 LibAmdWriteMxcsr ( 393 IN UINT32 *Value 394 ); 395 396 #endif // _AMD_LIB_H_ 397