/aosp_15_r20/external/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 306 static bool isCSRestore(MachineInstr &MI, const MCPhysReg *CSRegs) { in isCSRestore() 336 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in emitEpilogue() local 474 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in emitPopSpecialFixUp() local
|
H A D | ARMFrameLowering.cpp | 102 const MCPhysReg *CSRegs) { in isCSRestore() 724 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in emitEpilogue() local 1526 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
|
H A D | ARMBaseRegisterInfo.h | 78 const MCPhysReg *CSRegs) { in isCalleeSavedRegister()
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
H A D | Thumb1FrameLowering.cpp | 455 static bool isCSRestore(MachineInstr &MI, const MCPhysReg *CSRegs) { in isCSRestore() 485 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in emitEpilogue() local 659 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in emitPopSpecialFixUp() local
|
H A D | ARMBaseRegisterInfo.h | 90 const MCPhysReg *CSRegs) { in isCalleeSavedRegister()
|
H A D | ARMFrameLowering.cpp | 146 const MCPhysReg *CSRegs) { in isCSRestore() 799 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in emitEpilogue() local 1704 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 239 static bool isCalleeSavedReg(const MCPhysReg *CSRegs, MCPhysReg Reg) { in isCalleeSavedReg() 280 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in allocateSGPRSpillToVGPR() local
|
H A D | GCNNSAReassign.cpp | 84 const MCPhysReg *CSRegs; member in __anon44fec1230111::GCNNSAReassign
|
H A D | SILowerSGPRSpills.cpp | 204 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in spillCalleeSavedRegs() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 293 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in splitWWMSpillRegisters() local 302 bool SIMachineFunctionInfo::isCalleeSavedReg(const MCPhysReg *CSRegs, in isCalleeSavedReg()
|
H A D | GCNNSAReassign.cpp | 81 const MCPhysReg *CSRegs; member in __anon5b2b92290111::GCNNSAReassign
|
H A D | SILowerSGPRSpills.cpp | 219 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in spillCalleeSavedRegs() local
|
H A D | SIFrameLowering.cpp | 50 const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs(); in findScratchNonCalleeSaveRegister() local 1460 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determinePrologEpilogSGPRSaves() local
|
/aosp_15_r20/external/llvm/lib/CodeGen/ |
H A D | TargetFrameLoweringImpl.cpp | 76 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in determineCalleeSaves() local
|
/aosp_15_r20/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 255 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(MF); in findScratchNonCalleeSaveRegister() local 1105 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 120 const MCPhysReg *CSRegs) { in isCalleeSavedRegister()
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | TargetFrameLoweringImpl.cpp | 94 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local
|
H A D | RegUsageInfoCollector.cpp | 207 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in computeCalleeSavedRegs() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
H A D | RegUsageInfoCollector.cpp | 206 const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in computeCalleeSavedRegs() local
|
H A D | TargetFrameLoweringImpl.cpp | 101 const MCPhysReg *CSRegs = MF.getRegInfo().getCalleeSavedRegs(); in determineCalleeSaves() local
|
H A D | PrologEpilogInserter.cpp | 433 const MCPhysReg *CSRegs = F.getRegInfo().getCalleeSavedRegs(); in assignCalleeSavedSpillSlots() local 1323 for (const MCPhysReg *CSRegs = TRI.getCalleeSavedRegs(&MF); in insertZeroCallUsedRegs() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
H A D | RISCVFrameLowering.cpp | 374 static const MCPhysReg CSRegs[] = { RISCV::X1, /* ra */ in determineCalleeSaves() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 660 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(MBB->getParent()); in findScratchRegister() local 2146 const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF); in assignCalleeSavedSpillSlots() local
|
/aosp_15_r20/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZFrameLowering.cpp | 104 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); in determineCalleeSaves() local
|
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/CSKY/ |
H A D | CSKYFrameLowering.cpp | 380 static const MCPhysReg CSRegs[] = {CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, in determineCalleeSaves() local
|