xref: /aosp_15_r20/external/intel-media-driver/media_driver/agnostic/gen9/codec/hal/codechal_hw_g9_X.h (revision ba62d9d3abf0e404f2022b4cd7a85e107f48596f)
1 /*
2 * Copyright (c) 2017, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file      codechal_hw_g9_X.h
24 //! \brief         This modules implements HW interface layer to be used on gen9 platforms on all operating systems/DDIs, across CODECHAL components.
25 //!
26 #ifndef __CODECHAL_HW_G9_X_H__
27 #define __CODECHAL_HW_G9_X_H__
28 
29 #include "codechal_hw.h"
30 #include "mhw_mi_hwcmd_g9_X.h"
31 #include "mhw_render_hwcmd_g9_X.h"
32 #include "mhw_vdbox_mfx_hwcmd_g9_skl.h"
33 #include "mhw_vdbox_vdenc_hwcmd_g9_skl.h"
34 
35 //!  Codechal hw interface Gen9
36 /*!
37 This class defines the interfaces for hardware dependent settings and functions used in Codechal for Gen9 platforms
38 */
39 class CodechalHwInterfaceG9 : public CodechalHwInterface
40 {
41 protected:
42     static const uint32_t m_sliceShutdownAvcTargetUsageThresholdG9Halo = 4;
43     static const CODECHAL_SSEU_SETTING m_defaultSsEuLutG9[CODECHAL_NUM_MEDIA_STATES];
44 
45 public:
46     //!
47     //! \brief    Constructor
48     //!
CodechalHwInterfaceG9(PMOS_INTERFACE osInterface,CODECHAL_FUNCTION codecFunction,MhwInterfaces * mhwInterfaces)49     CodechalHwInterfaceG9(
50         PMOS_INTERFACE    osInterface,
51         CODECHAL_FUNCTION codecFunction,
52         MhwInterfaces     *mhwInterfaces)
53         : CodechalHwInterface(osInterface, codecFunction, mhwInterfaces)
54     {
55         CODECHAL_HW_FUNCTION_ENTER;
56 
57         InitCacheabilityControlSettings(codecFunction);
58 
59         m_sizeOfCmdBatchBufferEnd = mhw_mi_g9_X::MI_BATCH_BUFFER_END_CMD::byteSize;
60         m_vdencBrcImgStateBufferSize = mhw_vdbox_vdenc_g9_skl::VDENC_IMG_STATE_CMD::byteSize + mhw_vdbox_mfx_g9_skl::MFX_AVC_IMG_STATE_CMD::byteSize +
61             mhw_mi_g9_X::MI_BATCH_BUFFER_END_CMD::byteSize;
62 
63         // Slice Shutdown Threshold
64         m_ssdResolutionThreshold = m_sliceShutdownAvcResolutionThreshold;
65         if (MEDIA_IS_SKU(m_skuTable, FtrGT4))
66         {
67             m_ssdTargetUsageThreshold = m_sliceShutdownAvcTargetUsageThresholdG9Halo;
68         }
69         else
70         {
71             m_ssdTargetUsageThreshold = m_sliceShutdownAvcTargetUsageThreshold;
72         }
73         m_mpeg2SSDResolutionThreshold = m_sliceShutdownMpeg2ResolutionThreshold;
74 
75         m_ssEuTable = m_defaultSsEuLutG9;
76 
77         m_maxKernelLoadCmdSize =
78             mhw_mi_g9_X::PIPE_CONTROL_CMD::byteSize +
79             mhw_render_g9_X::PIPELINE_SELECT_CMD::byteSize +
80             mhw_render_g9_X::MEDIA_OBJECT_CMD::byteSize +
81             mhw_render_g9_X::STATE_BASE_ADDRESS_CMD::byteSize +
82             mhw_render_g9_X::MEDIA_VFE_STATE_CMD::byteSize +
83             mhw_render_g9_X::MEDIA_CURBE_LOAD_CMD::byteSize +
84             mhw_render_g9_X::MEDIA_INTERFACE_DESCRIPTOR_LOAD_CMD::byteSize +
85             mhw_mi_g9_X::MI_BATCH_BUFFER_START_CMD::byteSize +
86             mhw_render_g9_X::MEDIA_OBJECT_WALKER_CMD::byteSize +
87             mhw_mi_g9_X::MI_STORE_DATA_IMM_CMD::byteSize;
88 
89         m_sizeOfCmdMediaObject = mhw_render_g9_X::MEDIA_OBJECT_CMD::byteSize;
90         m_sizeOfCmdMediaStateFlush = mhw_mi_g9_X::MEDIA_STATE_FLUSH_CMD::byteSize;
91 
92         if (osInterface->bEnableVdboxBalancing)
93         {
94            bEnableVdboxBalancingbyUMD = true;
95            // Enabled VDbox Balancing, the HuC will be disabled.
96            m_noHuC = true;
97         }
98     }
99 
100     //!
101     //! \brief    Destructor
102     //!
~CodechalHwInterfaceG9()103     virtual ~CodechalHwInterfaceG9() {}
104 };
105 
106 #endif // __CODECHAL_HW_G9_X_H__
107