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Searched defs:DstRC (Results 1 – 25 of 73) sorted by relevance

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/aosp_15_r20/external/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp143 const TargetRegisterClass *DstRC = in getCopyRegClasses() local
152 const TargetRegisterClass *DstRC, in isVGPRToSGPRCopy()
158 const TargetRegisterClass *DstRC, in isSGPRToVGPRCopy()
193 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
264 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
356 const TargetRegisterClass *DstRC, *Src0RC, *Src1RC; in runOnMachineFunction() local
H A DSILowerI1Copies.cpp102 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst.getReg()); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp181 const TargetRegisterClass *DstRC = Register::isVirtualRegister(DstReg) in getCopyRegClasses() local
189 const TargetRegisterClass *DstRC, in isVGPRToSGPRCopy()
196 const TargetRegisterClass *DstRC, in isSGPRToVGPRCopy()
261 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
614 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
676 const TargetRegisterClass *DstRC, *Src0RC, *Src1RC; in runOnMachineFunction() local
H A DAMDGPUInstructionSelector.cpp498 const TargetRegisterClass *DstRC = in selectG_MERGE_VALUES() local
556 const TargetRegisterClass *DstRC = in selectG_UNMERGE_VALUES() local
605 const TargetRegisterClass *DstRC = in selectG_INSERT() local
1272 const TargetRegisterClass *DstRC in selectG_TRUNC() local
1483 const TargetRegisterClass *DstRC = in selectG_CONSTANT() local
1653 const TargetRegisterClass *DstRC = TRI.getRegClassForTypeOnBank(Ty, *DstRB, in selectG_PTR_MASK() local
1715 const TargetRegisterClass *DstRC = TRI.getRegClassForTypeOnBank(DstTy, *DstRB, in selectG_EXTRACT_VECTOR_ELT() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp249 const TargetRegisterClass *DstRC = getRegClassFromGRPhysReg(DstReg); in selectCopy() local
277 const TargetRegisterClass *DstRC = in selectCopy() local
683 static bool canTurnIntoCOPY(const TargetRegisterClass *DstRC, in canTurnIntoCOPY()
692 const TargetRegisterClass *DstRC, const unsigned SrcReg, in selectTurnIntoCOPY()
727 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectTruncOrPtrToInt() local
809 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectZext() local
902 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectAnyext() local
1216 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI); in emitExtractSubreg() local
1256 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI); in emitInsertSubreg() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp285 const TargetRegisterClass *DstRC = getRegClassFromGRPhysReg(DstReg); in selectCopy() local
313 const TargetRegisterClass *DstRC = in selectCopy() local
722 static bool canTurnIntoCOPY(const TargetRegisterClass *DstRC, in canTurnIntoCOPY()
731 const TargetRegisterClass *DstRC, const unsigned SrcReg, in selectTurnIntoCOPY()
766 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectTruncOrPtrToInt() local
895 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstRB); in selectAnyext() local
1209 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI); in emitExtractSubreg() local
1249 const TargetRegisterClass *DstRC = getRegClass(DstTy, DstReg, MRI); in emitInsertSubreg() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp195 const TargetRegisterClass *DstRC = DstReg.isVirtual() in getCopyRegClasses() local
203 const TargetRegisterClass *DstRC, in isVGPRToSGPRCopy()
210 const TargetRegisterClass *DstRC, in isSGPRToVGPRCopy()
278 const TargetRegisterClass *SrcRC, *DstRC; in foldVGPRCopyIntoRegSequence() local
625 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
754 const TargetRegisterClass *SrcRC, *DstRC; in runOnMachineFunction() local
891 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); in analyzeVGPRToSGPRCopy() local
H A DAMDGPUInstructionSelector.cpp109 const TargetRegisterClass *DstRC in constrainCopyLikeIntrin() local
500 const TargetRegisterClass *DstRC = in selectG_EXTRACT() local
593 const TargetRegisterClass *DstRC = in selectG_MERGE_VALUES() local
654 const TargetRegisterClass *DstRC = in selectG_UNMERGE_VALUES() local
857 const TargetRegisterClass *DstRC = in selectG_INSERT() local
1411 const TargetRegisterClass *DstRC = TRI.getRegClassForSizeOnBank(32, *DstBank); in selectRelocConstant() local
2170 const TargetRegisterClass *DstRC = in selectG_TRUNC() local
2312 const TargetRegisterClass *DstRC = in selectG_SZA_EXT() local
2501 const TargetRegisterClass *DstRC = in selectG_CONSTANT() local
2824 const TargetRegisterClass *DstRC = TRI.getRegClassForTypeOnBank(Ty, *DstRB); in selectG_PTRMASK() local
[all …]
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp154 const TargetRegisterClass *DstRC, in isCrossCopy()
438 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes() local
487 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in isUndefInput() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp148 const TargetRegisterClass *DstRC, in isCrossCopy()
432 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes() local
481 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in isUndefInput() local
H A DMachineCombiner.cpp178 auto DstRC = MRI->getRegClass(Dst); in isTransientMI() local
187 auto DstRC = MRI->getRegClass(Dst); in isTransientMI() local
195 auto DstRC = MRI->getRegClass(Dst); in isTransientMI() local
/aosp_15_r20/external/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp157 const TargetRegisterClass *DstRC, in isCrossCopy()
441 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes() local
490 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in isUndefInput() local
H A DRegisterCoalescer.cpp353 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in setRegisters() local
971 const TargetRegisterClass *DstRC = MRI->getRegClass(DstReg); in reMaterializeTrivialDef() local
1354 auto DstRC = MRI->getRegClass(CP.getDstReg()); in joinCopy() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelect.cpp177 const TargetRegisterClass *DstRC = MRI.getRegClassOrNull(DstReg); in runOnMachineFunction() local
240 auto DstRC = MRI.getRegClass(DstReg); in runOnMachineFunction() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
H A DAArch64InstructionSelector.cpp681 const TargetRegisterClass *DstRC; in selectCopy() local
2055 const TargetRegisterClass *DstRC = in select() local
2380 const TargetRegisterClass *DstRC = in select() local
2779 unsigned EltSize, const TargetRegisterClass *DstRC, Register Scalar, in emitScalarToVector()
2845 auto *DstRC = &AArch64::GPR64RegClass; in selectMergeValues() local
2912 const TargetRegisterClass *DstRC = in emitExtractVectorElt() local
3398 const TargetRegisterClass *DstRC = in emitVectorConcat() local
3869 const TargetRegisterClass *DstRC = &AArch64::FPR128RegClass; in emitLaneInsert() local
3984 const TargetRegisterClass *DstRC = &AArch64::FPR128RegClass; in selectBuildVector() local
/aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp157 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
333 const TargetRegisterClass *DstRC = nullptr; in AddRegisterOperand() local
594 const TargetRegisterClass *DstRC = in EmitCopyToRegClassNode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp952 const TargetRegisterClass *DstRC; in selectCopy() local
3127 const TargetRegisterClass *DstRC = getRegClassForTypeOnBank(DstTy, DstRB); in select() local
3440 const TargetRegisterClass *DstRC = getRegClassForTypeOnBank(DstTy, DstRB); in select() local
3982 unsigned EltSize, const TargetRegisterClass *DstRC, Register Scalar, in emitScalarToVector()
4047 auto *DstRC = &AArch64::GPR64RegClass; in selectMergeValues() local
4118 const TargetRegisterClass *DstRC = in emitExtractVectorElt() local
4713 const TargetRegisterClass *DstRC = in emitVectorConcat() local
5257 const TargetRegisterClass *DstRC = &AArch64::FPR128RegClass; in emitLaneInsert() local
5517 const TargetRegisterClass *DstRC = in tryOptBuildVecToSubregToReg() local
5550 const TargetRegisterClass *DstRC = &AArch64::FPR128RegClass; in selectBuildVector() local
H A DAArch64PostSelectOptimize.cpp108 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); in foldSimpleCrossClassCopies() local
/aosp_15_r20/external/llvm/utils/TableGen/
H A DFastISelEmitter.cpp193 const CodeGenRegisterClass *DstRC = nullptr; in initialize() local
479 const CodeGenRegisterClass *DstRC = nullptr; in collectPatterns() local
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp120 const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass; in processBlock() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp120 const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass; in processBlock() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelect.cpp175 auto DstRC = MRI.getRegClass(DstReg); in runOnMachineFunction() local
/aosp_15_r20/external/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp131 const TargetRegisterClass *DstRC = in processBlock() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp156 const TargetRegisterClass *SrcRC = nullptr, *DstRC = nullptr; in EmitCopyFromReg() local
614 const TargetRegisterClass *DstRC = in EmitCopyToRegClassNode() local
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
H A DAVRRegisterInfo.cpp279 const TargetRegisterClass *DstRC, in shouldCoalesce()

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