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Searched defs:FCR (Results 1 – 10 of 10) sorted by relevance

/aosp_15_r20/external/fec/
H A Dint.h16 #define FCR (rs->fcr) macro
H A Dchar.h16 #define FCR (rs->fcr) macro
H A Dfixed.h29 #define FCR 112 macro
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/DebugInfo/CodeView/
H A DStringsAndChecksums.cpp71 const DebugSubsectionRecord &FCR) { in initializeChecksums()
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/CodeView/
H A DStringsAndChecksums.cpp72 const DebugSubsectionRecord &FCR) { in initializeChecksums()
/aosp_15_r20/device/google/contexthub/firmware/os/platform/stm32/
Ddma.c44 volatile uint32_t FCR; member
/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/imx/imx8ulp/upower/
Dupmu.h262 MU_FCR_t FCR; member
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp10252 std::optional<FPValueAndVReg> FCR; in isCanonicalized() local
/aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l4a6xx.h673 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
756 …__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset… member
/aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h604 __IO uint32_t FCR; /*!< LCD frame control register, Address offset: 0x04 */ member
685 …__IO uint32_t FCR; /*!< QUADSPI Flag Clear register, Address offset… member