xref: /aosp_15_r20/external/coreboot/payloads/libpayload/drivers/usb/uhci_private.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /*
2  *
3  * Copyright (C) 2008-2010 coresystems GmbH
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. The name of the author may not be used to endorse or promote products
14  *    derived from this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 #ifndef __UHCI_PRIVATE_H
30 #define __UHCI_PRIVATE_H
31 
32 typedef enum { UHCI_SETUP = 0x2d, UHCI_IN = 0x69, UHCI_OUT = 0xe1 } uhci_pid_t;
33 
34 typedef u32 flistp_t;
35 #define FLISTP_TERMINATE 1
36 #define FLISTP_QH 2
37 
38 typedef struct {
39 	u32 ptr;
40 #define TD_TERMINATE 1
41 #define TD_QH 2
42 #define TD_DEPTH_FIRST 4
43 
44 	u32 ctrlsts;
45 #define TD_STATUS_MASK (0xff << 16)
46 #define TD_STATUS_BITSTUFF_ERR (1 << 17)
47 #define TD_STATUS_CRC_ERR (1 << 18)
48 #define TD_STATUS_NAK_RCVD (1 << 19)
49 #define TD_STATUS_BABBLE (1 << 20)
50 #define TD_STATUS_DATABUF_ERR (1 << 21)
51 #define TD_STATUS_STALLED (1 << 22)
52 #define TD_STATUS_ACTIVE (1 << 23)
53 #define TD_LOWSPEED (1 << 26)
54 #define TD_COUNTER_SHIFT 27
55 
56 	u32 token;
57 #define TD_PID_MASK 0xff
58 #define TD_DEVADDR_SHIFT 8
59 #define TD_DEVADDR_MASK (((1 << 7)-1) << TD_DEVADDR_SHIFT)
60 #define TD_EP_SHIFT 15
61 #define TD_EP_MASK (0xf << TD_EP_SHIFT)
62 #define TD_TOGGLE_SHIFT 19
63 #define TD_MAXLEN_SHIFT 21
64 #define TD_TOGGLE_DATA0 0
65 #define TD_TOGGLE_DATA1 (1 << TD_TOGGLE_SHIFT)
66 
67 	u32 bufptr;
68 
69 } __packed
70      td_t;
71 
72      typedef struct {
73 	     flistp_t headlinkptr;
74 	     volatile flistp_t elementlinkptr;
75      } __packed
76      qh_t;
77 
78      typedef enum { USBCMD = 0, USBSTS = 2, USBINTR = 4, FRNUM =
79 		     6, FLBASEADD = 8, SOFMOD = 0xc, PORTSC1 = 0x10, PORTSC2 =
80 		     0x12
81      } usbreg;
82 
83      void uhci_reg_write32(hci_t *ctrl, usbreg reg, u32 value);
84      u32 uhci_reg_read32(hci_t *ctrl, usbreg reg);
85      void uhci_reg_write16(hci_t *ctrl, usbreg reg, u16 value);
86      u16 uhci_reg_read16(hci_t *ctrl, usbreg reg);
87      void uhci_reg_write8(hci_t *ctrl, usbreg reg, u8 value);
88      u8 uhci_reg_read8(hci_t *ctrl, usbreg reg);
89 
90      typedef struct uhci {
91 	     flistp_t *framelistptr;
92 	     qh_t *qh_prei, *qh_intr, *qh_data, *qh_last;
93 	     usbdev_t *roothub;
94      } uhci_t;
95 
96 #define UHCI_INST(controller) ((uhci_t*)((controller)->instance))
97 
98 #endif
99