xref: /aosp_15_r20/external/coreboot/util/intelp2m/platforms/common/register.go (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1package common
2
3// Bit field constants for PAD_CFG_DW0 register
4const (
5	AllFields uint32 = 0xffffffff
6
7	PadRstCfgShift uint8  = 30
8	PadRstCfgMask  uint32 = 0x3 << PadRstCfgShift
9
10	RxPadStateSelectShift uint8  = 29
11	RxPadStateSelectMask  uint32 = 0x1 << RxPadStateSelectShift
12
13	RxRawOverrideTo1Shift uint8  = 28
14	RxRawOverrideTo1Mask  uint32 = 0x1 << RxRawOverrideTo1Shift
15
16	RxLevelEdgeConfigurationShift uint8  = 25
17	RxLevelEdgeConfigurationMask  uint32 = 0x3 << RxLevelEdgeConfigurationShift
18
19	RxInvertShift uint8  = 23
20	RxInvertMask  uint32 = 0x1 << RxInvertShift
21
22	RxTxEnableConfigShift uint8  = 21
23	RxTxEnableConfigMask  uint32 = 0x3 << RxTxEnableConfigShift
24
25	InputRouteIOxApicShift uint8  = 20
26	InputRouteIOxApicMask  uint32 = 0x1 << InputRouteIOxApicShift
27
28	InputRouteSCIShift uint8  = 19
29	InputRouteSCIMask  uint32 = 0x1 << InputRouteSCIShift
30
31	InputRouteSMIShift uint8  = 18
32	InputRouteSMIMask  uint32 = 0x1 << InputRouteSMIShift
33
34	InputRouteNMIShift uint8  = 17
35	InputRouteNMIMask  uint32 = 0x1 << InputRouteNMIShift
36
37	PadModeShift uint8  = 10
38	PadModeMask  uint32 = 0x7 << PadModeShift
39
40	RxTxBufDisableShift uint8  = 8
41	RxTxBufDisableMask  uint32 = 0x3 << RxTxBufDisableShift
42
43	RxStateShift uint8  = 1
44	RxStateMask  uint32 = 0x1 << RxStateShift
45
46	TxStateMask uint32 = 0x1
47)
48
49// config DW registers
50const (
51	PAD_CFG_DW0 = 0
52	PAD_CFG_DW1 = 1
53	MAX_DW_NUM  = 2
54)
55
56// Register - configuration data structure based on DW0/1 dw value
57// value    : register value
58// mask     : bit fileds mask
59// roFileds : read only fields mask
60type Register struct {
61	value    uint32
62	mask     uint32
63	roFileds uint32
64}
65
66func (reg *Register) ValueSet(value uint32) *Register {
67	reg.value = value
68	return reg
69}
70
71func (reg *Register) ValueGet() uint32 {
72	return reg.value
73}
74
75func (reg *Register) ReadOnlyFieldsSet(fileldMask uint32) *Register {
76	reg.roFileds = fileldMask
77	return reg
78}
79
80func (reg *Register) ReadOnlyFieldsGet() uint32 {
81	return reg.roFileds
82}
83
84// Check the mask of the new macro
85// Returns true if the macro is generated correctly
86func (reg *Register) MaskCheck() bool {
87	mask := ^(reg.mask | reg.roFileds)
88	return reg.value&mask == 0
89}
90
91// getResetConfig - get Reset Configuration from PADRSTCFG field in PAD_CFG_DW0_GPx register
92func (reg *Register) getFieldVal(mask uint32, shift uint8) uint8 {
93	reg.mask |= mask
94	return uint8((reg.value & mask) >> shift)
95}
96
97// CntrMaskFieldsClear - clear filed in control mask
98// fieldMask - mask of the field to be cleared
99func (reg *Register) CntrMaskFieldsClear(fieldMask uint32) {
100	reg.mask &= ^fieldMask;
101}
102
103// IgnoredFieldsGet - return mask of unchecked (ignored) fields.
104//                    These bit fields were not read when the macro was
105//                    generated.
106// return
107//   mask of ignored bit field
108func (reg *Register) IgnoredFieldsGet() uint32 {
109	mask := reg.mask | reg.roFileds
110	return reg.value & ^mask
111}
112
113// getResetConfig - returns type reset source for corresponding pad
114// PADRSTCFG field in PAD_CFG_DW0 register
115func (reg *Register) GetResetConfig() uint8 {
116	return reg.getFieldVal(PadRstCfgMask, PadRstCfgShift)
117}
118
119// getRXPadStateSelect - returns RX Pad State (RXINV)
120// 0 = Raw RX pad state directly from RX buffer
121// 1 = Internal RX pad state
122func (reg *Register) GetRXPadStateSelect() uint8 {
123	return reg.getFieldVal(RxPadStateSelectMask, RxPadStateSelectShift)
124}
125
126// getRXRawOverrideStatus - returns 1 if the selected pad state is being
127// overridden to '1' (RXRAW1 field)
128func (reg *Register) GetRXRawOverrideStatus() uint8 {
129	return reg.getFieldVal(RxRawOverrideTo1Mask, RxRawOverrideTo1Shift)
130}
131
132// getRXLevelEdgeConfiguration - returns RX Level/Edge Configuration (RXEVCFG)
133// 0h = Level, 1h = Edge, 2h = Drive '0', 3h = Reserved (implement as setting 0h)
134func (reg *Register) GetRXLevelEdgeConfiguration() uint8 {
135	return reg.getFieldVal(RxLevelEdgeConfigurationMask, RxLevelEdgeConfigurationShift)
136}
137
138// GetRxInvert - returns RX Invert state (RXINV)
139// 1 - Inversion, 0 - No inversion
140func (reg *Register) GetRxInvert() uint8 {
141	return reg.getFieldVal(RxInvertMask, RxInvertShift)
142}
143
144// getRxTxEnableConfig - returns RX/TX Enable Config (RXTXENCFG)
145// 0 = Function defined in Pad Mode controls TX and RX Enables
146// 1 = Function controls TX Enable and RX Disabled with RX drive 0 internally
147// 2 = Function controls TX Enable and RX Disabled with RX drive 1 internally
148// 3 = Function controls TX Enabled and RX is always enabled
149func (reg *Register) GetRxTxEnableConfig() uint8 {
150	return reg.getFieldVal(RxTxEnableConfigMask, RxTxEnableConfigShift)
151}
152
153// getGPIOInputRouteIOxAPIC - returns 1 if the pad can be routed to cause
154// peripheral IRQ when configured in GPIO input mode.
155func (reg *Register) GetGPIOInputRouteIOxAPIC() uint8 {
156	return reg.getFieldVal(InputRouteIOxApicMask, InputRouteIOxApicShift)
157}
158
159// getGPIOInputRouteSCI - returns 1 if the pad can be routed to cause SCI when
160// configured in GPIO input mode.
161func (reg *Register) GetGPIOInputRouteSCI() uint8 {
162	return reg.getFieldVal(InputRouteSCIMask, InputRouteSCIShift)
163}
164
165// getGPIOInputRouteSMI - returns 1 if the pad can be routed to cause SMI when
166// configured in GPIO input mode
167func (reg *Register) GetGPIOInputRouteSMI() uint8 {
168	return reg.getFieldVal(InputRouteSMIMask, InputRouteSMIShift)
169}
170
171// getGPIOInputRouteNMI - returns 1 if the pad can be routed to cause NMI when
172// configured in GPIO input mode
173func (reg *Register) GetGPIOInputRouteNMI() uint8 {
174	return reg.getFieldVal(InputRouteNMIMask, InputRouteNMIShift)
175}
176
177// getPadMode - reutrns pad mode or one of the native functions
178// 0h = GPIO control the Pad.
179// 1h = native function 1, if applicable, controls the Pad
180// 2h = native function 2, if applicable, controls the Pad
181// 3h = native function 3, if applicable, controls the Pad
182// 4h = enable GPIO blink/PWM capability if applicable
183func (reg *Register) GetPadMode() uint8 {
184	return reg.getFieldVal(PadModeMask, PadModeShift)
185}
186
187// getGPIORxTxDisableStatus - returns GPIO RX/TX buffer state (GPIORXDIS | GPIOTXDIS)
188// 0 - both are enabled, 1 - TX Disable, 2 - RX Disable, 3 - both are disabled
189func (reg *Register) GetGPIORxTxDisableStatus() uint8 {
190	return reg.getFieldVal(RxTxBufDisableMask, RxTxBufDisableShift)
191}
192
193// getGPIORXState - returns GPIO RX State (GPIORXSTATE)
194func (reg *Register) GetGPIORXState() uint8 {
195	return reg.getFieldVal(RxStateMask, RxStateShift)
196}
197
198// getGPIOTXState - returns GPIO TX State (GPIOTXSTATE)
199func (reg *Register) GetGPIOTXState() uint8 {
200	return reg.getFieldVal(TxStateMask, 0)
201}
202
203// Bit field constants for PAD_CFG_DW1 register
204const (
205	PadTolShift uint8  = 25
206	PadTolMask  uint32 = 0x1 << PadTolShift
207
208	IOStandbyStateShift uint8  = 14
209	IOStandbyStateMask  uint32 = 0xF << IOStandbyStateShift
210
211	TermShift uint8  = 10
212	TermMask  uint32 = 0xF << TermShift
213
214	IOStandbyTerminationShift uint8  = 8
215	IOStandbyTerminationMask  uint32 = 0x3 << IOStandbyTerminationShift
216
217	InterruptSelectMask uint32 = 0xFF
218)
219
220// GetPadTol
221func (reg *Register) GetPadTol() uint8 {
222	return reg.getFieldVal(PadTolMask, PadTolShift)
223}
224
225// getIOStandbyState - return IO Standby State (IOSSTATE)
226// 0 = Tx enabled driving last value driven, Rx enabled
227// 1 = Tx enabled driving 0, Rx disabled and Rx driving 0 back to its controller internally
228// 2 = Tx enabled driving 0, Rx disabled and Rx driving 1 back to its controller internally
229// 3 = Tx enabled driving 1, Rx disabled and Rx driving 0 back to its controller internally
230// 4 = Tx enabled driving 1, Rx disabled and Rx driving 1 back to its controller internally
231// 5 = Tx enabled driving 0, Rx enabled
232// 6 = Tx enabled driving 1, Rx enabled
233// 7 = Hi-Z, Rx driving 0 back to its controller internally
234// 8 = Hi-Z, Rx driving 1 back to its controller internally
235// 9 = Tx disabled, Rx enabled
236// 15 = IO-Standby is ignored for this pin (same as functional mode)
237// Others reserved
238func (reg *Register) GetIOStandbyState() uint8 {
239	return reg.getFieldVal(IOStandbyStateMask, IOStandbyStateShift)
240}
241
242// getIOStandbyTermination - return IO Standby Termination (IOSTERM)
243// 0 = Same as functional mode (no change)
244// 1 = Disable Pull-up and Pull-down (no on-die termination)
245// 2 = Enable Pull-down
246// 3 = Enable Pull-up
247func (reg *Register) GetIOStandbyTermination() uint8 {
248	return reg.getFieldVal(IOStandbyTerminationMask, IOStandbyTerminationShift)
249}
250
251// getTermination - returns the pad termination state defines the different weak
252// pull-up and pull-down settings that are supported by the buffer
253// 0000 = none; 0010 = 5k PD; 0100 = 20k PD; 1010 = 5k PU; 1100 = 20k PU;
254// 1111 = Native controller selected
255func (reg *Register) GetTermination() uint8 {
256	return reg.getFieldVal(TermMask, TermShift)
257}
258
259// getInterruptSelect - returns Interrupt Line number from the GPIO controller
260func (reg *Register) GetInterruptSelect() uint8 {
261	return reg.getFieldVal(InterruptSelectMask, 0)
262}
263