xref: /btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp_ex.c (revision a8f7f3fcbcd51f8d2e92aca076b6a9f812db358c) 
1 /**
2   ******************************************************************************
3   * @file    stm32f4xx_hal_cryp_ex.c
4   * @author  MCD Application Team
5   * @brief   Extended CRYP HAL module driver
6   *          This file provides firmware functions to manage the following
7   *          functionalities of CRYP extension peripheral:
8   *           + Extended AES processing functions
9   *
10   @verbatim
11   ==============================================================================
12                      ##### How to use this driver #####
13   ==============================================================================
14     [..]
15     The CRYP extension HAL driver can be used as follows:
16     (#)After AES-GCM or AES-CCM  Encryption/Decryption user can start following API
17        to get the  authentication messages :
18       (##) HAL_CRYPEx_AESGCM_GenerateAuthTAG
19       (##) HAL_CRYPEx_AESCCM_GenerateAuthTAG
20 
21   @endverbatim
22   ******************************************************************************
23   * @attention
24   *
25   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
26   * All rights reserved.</center></h2>
27   *
28   * This software component is licensed by ST under BSD 3-Clause license,
29   * the "License"; You may not use this file except in compliance with the
30   * License. You may obtain a copy of the License at:
31   *                        opensource.org/licenses/BSD-3-Clause
32   *
33   ******************************************************************************
34   */
35 
36 /* Includes ------------------------------------------------------------------*/
37 #include "stm32f4xx_hal.h"
38 
39 /** @addtogroup STM32F4xx_HAL_Driver
40   * @{
41   */
42 #if defined (AES)  || defined (CRYP)
43 #if defined (CRYP_CR_ALGOMODE_AES_GCM)|| defined (AES)
44 /** @defgroup CRYPEx CRYPEx
45   * @brief CRYP Extension HAL module driver.
46   * @{
47   */
48 
49 
50 #ifdef HAL_CRYP_MODULE_ENABLED
51 
52 /* Private typedef -----------------------------------------------------------*/
53 /* Private define ------------------------------------------------------------*/
54 /** @addtogroup CRYPEx_Private_Defines
55   * @{
56   */
57 #if defined(AES)
58 #define CRYP_PHASE_INIT                              0x00000000U             /*!< GCM/GMAC (or CCM) init phase */
59 #define CRYP_PHASE_HEADER                            AES_CR_GCMPH_0          /*!< GCM/GMAC or CCM header phase */
60 #define CRYP_PHASE_PAYLOAD                           AES_CR_GCMPH_1          /*!< GCM(/CCM) payload phase   */
61 #define CRYP_PHASE_FINAL                             AES_CR_GCMPH            /*!< GCM/GMAC or CCM  final phase  */
62 
63 #define CRYP_OPERATINGMODE_ENCRYPT                   0x00000000U             /*!< Encryption mode   */
64 #define CRYP_OPERATINGMODE_KEYDERIVATION             AES_CR_MODE_0           /*!< Key derivation mode  only used when performing ECB and CBC decryptions  */
65 #define CRYP_OPERATINGMODE_DECRYPT                   AES_CR_MODE_1           /*!< Decryption       */
66 #define CRYP_OPERATINGMODE_KEYDERIVATION_DECRYPT     AES_CR_MODE             /*!< Key derivation and decryption only used when performing ECB and CBC decryptions  */
67 
68 #else /* CRYP */
69 
70 #define CRYP_PHASE_INIT                 0x00000000U
71 #define CRYP_PHASE_HEADER               CRYP_CR_GCM_CCMPH_0
72 #define CRYP_PHASE_PAYLOAD              CRYP_CR_GCM_CCMPH_1
73 #define CRYP_PHASE_FINAL                CRYP_CR_GCM_CCMPH
74 
75 #define CRYP_OPERATINGMODE_ENCRYPT      0x00000000U
76 #define CRYP_OPERATINGMODE_DECRYPT      CRYP_CR_ALGODIR
77 #endif /* End AES or CRYP */
78 
79 #define  CRYPEx_PHASE_PROCESS       0x02U     /*!< CRYP peripheral is in processing phase */
80 #define  CRYPEx_PHASE_FINAL         0x03U     /*!< CRYP peripheral is in final phase this is relevant only with CCM and GCM modes */
81 
82 /*  CTR0 information to use in CCM algorithm */
83 #define CRYP_CCM_CTR0_0            0x07FFFFFFU
84 #define CRYP_CCM_CTR0_3            0xFFFFFF00U
85 
86 
87 /**
88   * @}
89   */
90 
91 /* Private macro -------------------------------------------------------------*/
92 /* Private variables ---------------------------------------------------------*/
93 /* Private function prototypes -----------------------------------------------*/
94 
95 
96 
97 /* Exported functions---------------------------------------------------------*/
98 /** @addtogroup CRYPEx_Exported_Functions
99   * @{
100   */
101 
102 /** @defgroup CRYPEx_Exported_Functions_Group1 Extended AES processing functions
103   *  @brief   Extended processing functions.
104   *
105 @verbatim
106   ==============================================================================
107               ##### Extended AES processing functions #####
108   ==============================================================================
109     [..]  This section provides functions allowing to generate the authentication
110           TAG in Polling mode
111       (#)HAL_CRYPEx_AESGCM_GenerateAuthTAG
112       (#)HAL_CRYPEx_AESCCM_GenerateAuthTAG
113          they should be used after Encrypt/Decrypt operation.
114 
115 @endverbatim
116   * @{
117   */
118 
119 
120 /**
121   * @brief  generate the GCM authentication TAG.
122   * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
123   *         the configuration information for CRYP module
124   * @param  AuthTag: Pointer to the authentication buffer
125   * @param  Timeout: Timeout duration
126   * @retval HAL status
127   */
HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef * hcryp,uint32_t * AuthTag,uint32_t Timeout)128 HAL_StatusTypeDef HAL_CRYPEx_AESGCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
129 {
130   uint32_t tickstart;
131   uint64_t headerlength = (uint64_t)(hcryp->Init.HeaderSize) * 32U; /* Header length in bits */
132   uint64_t inputlength = (uint64_t)hcryp->SizesSum * 8U; /* input length in bits */
133   uint32_t tagaddr = (uint32_t)AuthTag;
134 
135   if (hcryp->State == HAL_CRYP_STATE_READY)
136   {
137     /* Process locked */
138     __HAL_LOCK(hcryp);
139 
140     /* Change the CRYP peripheral state */
141     hcryp->State = HAL_CRYP_STATE_BUSY;
142 
143     /* Check if initialization phase has already been performed */
144     if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
145     {
146       /* Change the CRYP phase */
147       hcryp->Phase = CRYPEx_PHASE_FINAL;
148     }
149     else /* Initialization phase has not been performed*/
150     {
151       /* Disable the Peripheral */
152       __HAL_CRYP_DISABLE(hcryp);
153 
154       /* Sequence error code field */
155       hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
156 
157       /* Change the CRYP peripheral state */
158       hcryp->State = HAL_CRYP_STATE_READY;
159 
160       /* Process unlocked */
161       __HAL_UNLOCK(hcryp);
162       return HAL_ERROR;
163     }
164 
165 #if defined(CRYP)
166 
167     /* Disable CRYP to start the final phase */
168     __HAL_CRYP_DISABLE(hcryp);
169 
170     /* Select final phase */
171     MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH, CRYP_PHASE_FINAL);
172 
173     /*ALGODIR bit must be set to �0�.*/
174     hcryp->Instance->CR &=  ~CRYP_CR_ALGODIR;
175 
176     /* Enable the CRYP peripheral */
177     __HAL_CRYP_ENABLE(hcryp);
178 
179     /* Write the number of bits in header (64 bits) followed by the number of bits
180     in the payload */
181     if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
182     {
183       hcryp->Instance->DIN = 0U;
184       hcryp->Instance->DIN = __RBIT((uint32_t)(headerlength));
185       hcryp->Instance->DIN = 0U;
186       hcryp->Instance->DIN = __RBIT((uint32_t)(inputlength));
187     }
188     else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
189     {
190       hcryp->Instance->DIN = 0U;
191       hcryp->Instance->DIN = __REV((uint32_t)(headerlength));
192       hcryp->Instance->DIN = 0U;
193       hcryp->Instance->DIN = __REV((uint32_t)(inputlength));
194     }
195     else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
196     {
197       hcryp->Instance->DIN = 0U;
198       hcryp->Instance->DIN = __ROR((uint32_t)headerlength, 16U);
199       hcryp->Instance->DIN = 0U;
200       hcryp->Instance->DIN = __ROR((uint32_t)inputlength, 16U);
201     }
202     else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
203     {
204       hcryp->Instance->DIN = 0U;
205       hcryp->Instance->DIN = (uint32_t)(headerlength);
206       hcryp->Instance->DIN = 0U;
207       hcryp->Instance->DIN = (uint32_t)(inputlength);
208     }
209     else
210     {
211       /* Nothing to do */
212     }
213 
214     /* Wait for OFNE flag to be raised */
215     tickstart = HAL_GetTick();
216     while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
217     {
218       /* Check for the Timeout */
219       if (Timeout != HAL_MAX_DELAY)
220       {
221         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
222         {
223           /* Disable the CRYP Peripheral Clock */
224           __HAL_CRYP_DISABLE(hcryp);
225 
226           /* Change state */
227           hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
228           hcryp->State = HAL_CRYP_STATE_READY;
229 
230           /* Process unlocked */
231           __HAL_UNLOCK(hcryp);
232           return HAL_ERROR;
233         }
234       }
235     }
236 
237     /* Read the authentication TAG in the output FIFO */
238     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
239     tagaddr += 4U;
240     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
241     tagaddr += 4U;
242     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
243     tagaddr += 4U;
244     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
245 
246 #else /* AES*/
247 
248     /* Select final phase */
249     MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
250 
251     /* Write the number of bits in header (64 bits) followed by the number of bits
252     in the payload */
253     if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
254     {
255       hcryp->Instance->DINR = 0U;
256       hcryp->Instance->DINR = __RBIT((uint32_t)(headerlength));
257       hcryp->Instance->DINR = 0U;
258       hcryp->Instance->DINR = __RBIT((uint32_t)(inputlength));
259     }
260     else if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
261     {
262       hcryp->Instance->DINR = 0U;
263       hcryp->Instance->DINR = __REV((uint32_t)(headerlength));
264       hcryp->Instance->DINR = 0U;
265       hcryp->Instance->DINR = __REV((uint32_t)(inputlength));
266     }
267     else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
268     {
269       hcryp->Instance->DINR = 0U;
270       hcryp->Instance->DINR = __ROR((uint32_t)headerlength, 16U);
271       hcryp->Instance->DINR = 0U;
272       hcryp->Instance->DINR = __ROR((uint32_t)inputlength, 16U);
273     }
274     else if (hcryp->Init.DataType == CRYP_DATATYPE_32B)
275     {
276       hcryp->Instance->DINR = 0U;
277       hcryp->Instance->DINR = (uint32_t)(headerlength);
278       hcryp->Instance->DINR = 0U;
279       hcryp->Instance->DINR = (uint32_t)(inputlength);
280     }
281     else
282     {
283       /* Nothing to do */
284     }
285     /* Wait for CCF flag to be raised */
286     tickstart = HAL_GetTick();
287     while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
288     {
289       /* Check for the Timeout */
290       if (Timeout != HAL_MAX_DELAY)
291       {
292         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
293         {
294           /* Disable the CRYP peripheral clock */
295           __HAL_CRYP_DISABLE(hcryp);
296 
297           /* Change state */
298           hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
299           hcryp->State = HAL_CRYP_STATE_READY;
300 
301           /* Process unlocked */
302           __HAL_UNLOCK(hcryp);
303           return HAL_ERROR;
304         }
305       }
306     }
307 
308     /* Read the authentication TAG in the output FIFO */
309     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
310     tagaddr += 4U;
311     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
312     tagaddr += 4U;
313     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
314     tagaddr += 4U;
315     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
316 
317     /* Clear CCF flag */
318     __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
319 
320 #endif /* End AES or CRYP */
321 
322     /* Disable the peripheral */
323     __HAL_CRYP_DISABLE(hcryp);
324 
325     /* Change the CRYP peripheral state */
326     hcryp->State = HAL_CRYP_STATE_READY;
327 
328     /* Process unlocked */
329     __HAL_UNLOCK(hcryp);
330   }
331   else
332   {
333     /* Busy error code field */
334     hcryp->ErrorCode |= HAL_CRYP_ERROR_BUSY;
335     return HAL_ERROR;
336   }
337   /* Return function status */
338   return HAL_OK;
339 }
340 
341 /**
342   * @brief  AES CCM Authentication TAG generation.
343   * @param  hcryp: pointer to a CRYP_HandleTypeDef structure that contains
344   *         the configuration information for CRYP module
345   * @param  AuthTag: Pointer to the authentication buffer
346   * @param  Timeout: Timeout duration
347   * @retval HAL status
348   */
HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef * hcryp,uint32_t * AuthTag,uint32_t Timeout)349 HAL_StatusTypeDef HAL_CRYPEx_AESCCM_GenerateAuthTAG(CRYP_HandleTypeDef *hcryp, uint32_t *AuthTag, uint32_t Timeout)
350 {
351   uint32_t tagaddr = (uint32_t)AuthTag;
352   uint32_t ctr0 [4] = {0};
353   uint32_t ctr0addr = (uint32_t)ctr0;
354   uint32_t tickstart;
355 
356   if (hcryp->State == HAL_CRYP_STATE_READY)
357   {
358     /* Process locked */
359     __HAL_LOCK(hcryp);
360 
361     /* Change the CRYP peripheral state */
362     hcryp->State = HAL_CRYP_STATE_BUSY;
363 
364     /* Check if initialization phase has already been performed */
365     if (hcryp->Phase == CRYPEx_PHASE_PROCESS)
366     {
367       /* Change the CRYP phase */
368       hcryp->Phase = CRYPEx_PHASE_FINAL;
369     }
370     else /* Initialization phase has not been performed*/
371     {
372       /* Disable the peripheral */
373       __HAL_CRYP_DISABLE(hcryp);
374 
375       /* Sequence error code field */
376       hcryp->ErrorCode |= HAL_CRYP_ERROR_AUTH_TAG_SEQUENCE;
377 
378       /* Change the CRYP peripheral state */
379       hcryp->State = HAL_CRYP_STATE_READY;
380 
381       /* Process unlocked */
382       __HAL_UNLOCK(hcryp);
383       return HAL_ERROR;
384     }
385 
386 #if defined(CRYP)
387 
388     /* Disable CRYP to start the final phase */
389     __HAL_CRYP_DISABLE(hcryp);
390 
391     /* Select final phase & ALGODIR bit must be set to �0�. */
392     MODIFY_REG(hcryp->Instance->CR, CRYP_CR_GCM_CCMPH | CRYP_CR_ALGODIR, CRYP_PHASE_FINAL | CRYP_OPERATINGMODE_ENCRYPT);
393 
394     /* Enable the CRYP peripheral */
395     __HAL_CRYP_ENABLE(hcryp);
396 
397     /* Write the counter block in the IN FIFO, CTR0 information from B0
398     data has to be swapped according to the DATATYPE*/
399     ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
400     ctr0[1] = hcryp->Init.B0[1];
401     ctr0[2] = hcryp->Init.B0[2];
402     ctr0[3] = hcryp->Init.B0[3] &  CRYP_CCM_CTR0_3;
403 
404     if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
405     {
406       hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
407       ctr0addr += 4U;
408       hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
409       ctr0addr += 4U;
410       hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
411       ctr0addr += 4U;
412       hcryp->Instance->DIN = __REV(*(uint32_t *)(ctr0addr));
413     }
414     else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
415     {
416       hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
417       ctr0addr += 4U;
418       hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
419       ctr0addr += 4U;
420       hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
421       ctr0addr += 4U;
422       hcryp->Instance->DIN = __ROR(*(uint32_t *)(ctr0addr), 16U);
423     }
424     else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
425     {
426       hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
427       ctr0addr += 4U;
428       hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
429       ctr0addr += 4U;
430       hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
431       ctr0addr += 4U;
432       hcryp->Instance->DIN = __RBIT(*(uint32_t *)(ctr0addr));
433     }
434     else
435     {
436       hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
437       ctr0addr += 4U;
438       hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
439       ctr0addr += 4U;
440       hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
441       ctr0addr += 4U;
442       hcryp->Instance->DIN = *(uint32_t *)(ctr0addr);
443     }
444     /* Wait for OFNE flag to be raised */
445     tickstart = HAL_GetTick();
446     while (HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
447     {
448       /* Check for the Timeout */
449       if (Timeout != HAL_MAX_DELAY)
450       {
451         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
452         {
453           /* Disable the CRYP peripheral Clock */
454           __HAL_CRYP_DISABLE(hcryp);
455 
456           /* Change state */
457           hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
458           hcryp->State = HAL_CRYP_STATE_READY;
459 
460           /* Process unlocked */
461           __HAL_UNLOCK(hcryp);
462           return HAL_ERROR;
463         }
464       }
465     }
466 
467     /* Read the Auth TAG in the IN FIFO */
468     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
469     tagaddr += 4U;
470     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
471     tagaddr += 4U;
472     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
473     tagaddr += 4U;
474     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUT;
475 
476 #else /* AES */
477 
478     /* Select final phase */
479     MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_PHASE_FINAL);
480 
481     /* Write the counter block in the IN FIFO, CTR0 information from B0
482     data has to be swapped according to the DATATYPE*/
483     if (hcryp->Init.DataType == CRYP_DATATYPE_8B)
484     {
485       ctr0[0] = (__REV(hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0);
486       ctr0[1] = __REV(hcryp->Init.B0[1]);
487       ctr0[2] = __REV(hcryp->Init.B0[2]);
488       ctr0[3] = (__REV(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
489 
490       hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
491       ctr0addr += 4U;
492       hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
493       ctr0addr += 4U;
494       hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
495       ctr0addr += 4U;
496       hcryp->Instance->DINR = __REV(*(uint32_t *)(ctr0addr));
497     }
498     else if (hcryp->Init.DataType == CRYP_DATATYPE_16B)
499     {
500       ctr0[0] = (__ROR((hcryp->Init.B0[0]), 16U)& CRYP_CCM_CTR0_0);
501       ctr0[1] =   __ROR((hcryp->Init.B0[1]), 16U);
502       ctr0[2] =   __ROR((hcryp->Init.B0[2]), 16U);
503       ctr0[3] = (__ROR((hcryp->Init.B0[3]), 16U)& CRYP_CCM_CTR0_3);
504 
505       hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
506       ctr0addr += 4U;
507       hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
508       ctr0addr += 4U;
509       hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
510       ctr0addr += 4U;
511       hcryp->Instance->DINR = __ROR(*(uint32_t *)(ctr0addr), 16U);
512     }
513     else if (hcryp->Init.DataType == CRYP_DATATYPE_1B)
514     {
515       ctr0[0] = (__RBIT(hcryp->Init.B0[0])& CRYP_CCM_CTR0_0);
516       ctr0[1] = __RBIT(hcryp->Init.B0[1]);
517       ctr0[2] = __RBIT(hcryp->Init.B0[2]);
518       ctr0[3] = (__RBIT(hcryp->Init.B0[3])& CRYP_CCM_CTR0_3);
519 
520       hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
521       ctr0addr += 4U;
522       hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
523       ctr0addr += 4U;
524       hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
525       ctr0addr += 4U;
526       hcryp->Instance->DINR = __RBIT(*(uint32_t *)(ctr0addr));
527     }
528     else
529     {
530       ctr0[0] = (hcryp->Init.B0[0]) & CRYP_CCM_CTR0_0;
531       ctr0[1] = hcryp->Init.B0[1];
532       ctr0[2] = hcryp->Init.B0[2];
533       ctr0[3] = hcryp->Init.B0[3] &  CRYP_CCM_CTR0_3;
534 
535       hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
536       ctr0addr += 4U;
537       hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
538       ctr0addr += 4U;
539       hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
540       ctr0addr += 4U;
541       hcryp->Instance->DINR = *(uint32_t *)(ctr0addr);
542     }
543 
544     /* Wait for CCF flag to be raised */
545     tickstart = HAL_GetTick();
546     while (HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF))
547     {
548       /* Check for the Timeout */
549       if (Timeout != HAL_MAX_DELAY)
550       {
551         if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
552         {
553           /* Disable the CRYP peripheral Clock */
554           __HAL_CRYP_DISABLE(hcryp);
555 
556           /* Change state */
557           hcryp->ErrorCode |= HAL_CRYP_ERROR_TIMEOUT;
558           hcryp->State = HAL_CRYP_STATE_READY;
559 
560           /* Process unlocked */
561           __HAL_UNLOCK(hcryp);
562           return HAL_ERROR;
563         }
564       }
565     }
566 
567     /* Read the authentication TAG in the output FIFO */
568     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
569     tagaddr += 4U;
570     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
571     tagaddr += 4U;
572     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
573     tagaddr += 4U;
574     *(uint32_t *)(tagaddr) = hcryp->Instance->DOUTR;
575 
576     /* Clear CCF Flag */
577     __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_CCF_CLEAR);
578 
579 #endif /* End of AES || CRYP */
580 
581     /* Change the CRYP peripheral state */
582     hcryp->State = HAL_CRYP_STATE_READY;
583 
584     /* Process unlocked */
585     __HAL_UNLOCK(hcryp);
586 
587     /* Disable CRYP  */
588     __HAL_CRYP_DISABLE(hcryp);
589   }
590   else
591   {
592     /* Busy error code field */
593     hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
594     return HAL_ERROR;
595   }
596   /* Return function status */
597   return HAL_OK;
598 }
599 
600 /**
601   * @}
602   */
603 
604 #if defined (AES)
605 /** @defgroup CRYPEx_Exported_Functions_Group2 Key Derivation functions
606   *  @brief   AutoKeyDerivation functions
607   *
608 @verbatim
609   ==============================================================================
610               ##### Key Derivation functions #####
611   ==============================================================================
612     [..]  This section provides functions allowing to Enable or Disable the
613           the AutoKeyDerivation parameter in CRYP_HandleTypeDef structure
614           These function are allowed only in TinyAES IP.
615 
616 @endverbatim
617   * @{
618   */
619 
620 /**
621   * @brief  AES enable key derivation functions
622   * @param  hcryp: pointer to a CRYP_HandleTypeDef structure.
623   * @retval None
624   */
HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef * hcryp)625 void  HAL_CRYPEx_EnableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
626 {
627   if (hcryp->State == HAL_CRYP_STATE_READY)
628   {
629     hcryp->AutoKeyDerivation = ENABLE;
630   }
631   else
632   {
633     /* Busy error code field */
634     hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
635   }
636 }
637 /**
638   * @brief  AES disable key derivation functions
639   * @param  hcryp: pointer to a CRYP_HandleTypeDef structure.
640   * @retval None
641   */
HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef * hcryp)642 void  HAL_CRYPEx_DisableAutoKeyDerivation(CRYP_HandleTypeDef *hcryp)
643 {
644   if (hcryp->State == HAL_CRYP_STATE_READY)
645   {
646     hcryp->AutoKeyDerivation = DISABLE;
647   }
648   else
649   {
650     /* Busy error code field */
651     hcryp->ErrorCode = HAL_CRYP_ERROR_BUSY;
652   }
653 }
654 
655 /**
656   * @}
657   */
658 #endif /* AES or GCM CCM defined*/
659 #endif /* AES */
660 #endif /* HAL_CRYP_MODULE_ENABLED */
661 
662 /**
663   * @}
664   */
665 #endif /* TinyAES or CRYP*/
666 /**
667   * @}
668   */
669 
670 /**
671   * @}
672   */
673 
674 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
675