Home
last modified time | relevance | path

Searched defs:HII (Results 1 – 25 of 51) sorted by relevance

123

/aosp_15_r20/external/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp499 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local
585 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local
735 auto &HII = *HST.getInstrInfo(); in insertCFIInstructionsAt() local
1052 auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in insertCSRSpillsInBlock() local
1107 auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in insertCSRRestoresInBlock() local
1377 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandCopy() argument
1399 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandStoreInt() argument
1431 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandLoadInt() argument
1462 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandStoreVecPred() argument
1503 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandLoadVecPred() argument
[all …]
H A DHexagonBitSimplify.cpp575 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits()
913 const HexagonInstrInfo &HII; member in __anonb78d304d0411::DeadCodeElimination
1015 const HexagonInstrInfo &HII; member in __anonb78d304d0511::RedundantInstrElimination
1326 const HexagonInstrInfo &HII; member in __anonb78d304d0611::ConstGeneration
1467 const HexagonInstrInfo &HII; member in __anonb78d304d0711::CopyGeneration
1690 const HexagonInstrInfo &HII; member in __anonb78d304d0811::BitSimplification
2185 auto &HII = *HST.getInstrInfo(); in runOnMachineFunction() local
2314 const HexagonInstrInfo *HII; member in __anonb78d304d0911::HexagonLoopRescheduling
H A DHexagonVLIWPacketizer.cpp88 const HexagonInstrInfo *HII; member in __anon202ff7f50111::HexagonPacketizer
446 const HexagonInstrInfo *HII) { in getPredicateSense()
455 const HexagonInstrInfo *HII) { in getPostIncrementOperand()
979 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
H A DHexagonRDFOpt.cpp206 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); in rewrite() local
281 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in runOnMachineFunction() local
H A DHexagonFixupHwLoops.cpp113 const HexagonInstrInfo *HII = in fixupLoopInstrs() local
H A DHexagonRegisterInfo.cpp169 auto &HII = *HST.getInstrInfo(); in eliminateFrameIndex() local
H A DHexagonBranchRelaxation.cpp57 const HexagonInstrInfo *HII; member
/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp588 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local
649 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local
737 auto &HII = *HST.getInstrInfo(); in insertAllocframe() local
885 auto &HII = *HST.getInstrInfo(); in insertCFIInstructionsAt() local
1220 auto &HII = *HST.getInstrInfo(); in insertCSRSpillsInBlock() local
1286 auto &HII = *HST.getInstrInfo(); in insertCSRRestoresInBlock() local
1604 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandCopy() argument
1625 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandStoreInt() argument
1658 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandLoadInt() argument
1689 const HexagonInstrInfo &HII, SmallVectorImpl<unsigned> &NewRegs) const { in expandStoreVecPred() argument
[all …]
H A DHexagonSubtarget.cpp181 const HexagonInstrInfo &HII, const SUnit &Inst1, in shouldTFRICallBind()
201 auto &HII = *DAG->MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in apply() local
266 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII); in apply() local
H A DHexagonRDFOpt.cpp220 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); in rewrite() local
294 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in runOnMachineFunction() local
H A DHexagonBitSimplify.cpp622 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits()
966 const HexagonInstrInfo &HII; member in __anon8d6f032f0411::DeadCodeElimination
1068 const HexagonInstrInfo &HII; member in __anon8d6f032f0511::RedundantInstrElimination
1386 const HexagonInstrInfo &HII; member in __anon8d6f032f0611::ConstGeneration
1507 const HexagonInstrInfo &HII; member in __anon8d6f032f0711::CopyGeneration
1784 const HexagonInstrInfo &HII; member in __anon8d6f032f0811::BitSimplification
2765 auto &HII = *HST.getInstrInfo(); in runOnMachineFunction() local
2900 const HexagonInstrInfo *HII = nullptr; member in __anon8d6f032f0d11::HexagonLoopRescheduling
H A DHexagonVLIWPacketizer.cpp115 const HexagonInstrInfo *HII = nullptr; member in __anonaa1477970111::HexagonPacketizer
561 const HexagonInstrInfo *HII) { in getPredicateSense()
570 const HexagonInstrInfo *HII) { in getPostIncrementOperand()
1095 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
H A DHexagonHazardRecognizer.h45 const HexagonInstrInfo *HII, in HexagonHazardRecognizer()
H A DHexagonISelDAGToDAG.h32 const HexagonInstrInfo *HII; variable
H A DHexagonFixupHwLoops.cpp112 const HexagonInstrInfo *HII = in fixupLoopInstrs() local
H A DHexagonBranchRelaxation.cpp68 const HexagonInstrInfo *HII; member
/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.cpp593 auto &HII = *HST.getInstrInfo(); in insertPrologueInBlock() local
766 auto &HII = *HST.getInstrInfo(); in insertEpilogueInBlock() local
888 auto &HII = *HST.getInstrInfo(); in insertAllocframe() local
1034 auto &HII = *HST.getInstrInfo(); in insertCFIInstructionsAt() local
1368 auto &HII = *HST.getInstrInfo(); in insertCSRSpillsInBlock() local
1434 auto &HII = *HST.getInstrInfo(); in insertCSRRestoresInBlock() local
1718 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandCopy() argument
1739 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreInt() argument
1772 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadInt() argument
1803 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVecPred() argument
[all …]
H A DHexagonRDFOpt.cpp220 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); in rewrite() local
294 const auto &HII = *MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in runOnMachineFunction() local
H A DHexagonBitSimplify.cpp652 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits()
995 const HexagonInstrInfo &HII; member in __anonf34567f50411::DeadCodeElimination
1097 const HexagonInstrInfo &HII; member in __anonf34567f50511::RedundantInstrElimination
1415 const HexagonInstrInfo &HII; member in __anonf34567f50611::ConstGeneration
1544 const HexagonInstrInfo &HII; member in __anonf34567f50711::CopyGeneration
1819 const HexagonInstrInfo &HII; member in __anonf34567f50811::BitSimplification
2800 auto &HII = *HST.getInstrInfo(); in runOnMachineFunction() local
2935 const HexagonInstrInfo *HII = nullptr; member in __anonf34567f50d11::HexagonLoopRescheduling
H A DHexagonVLIWPacketizer.cpp116 const HexagonInstrInfo *HII = nullptr; member in __anon7f6cee9d0111::HexagonPacketizer
567 const HexagonInstrInfo *HII) { in getPredicateSense()
576 const HexagonInstrInfo *HII) { in getPostIncrementOperand()
1106 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
H A DHexagonSubtarget.cpp303 const HexagonInstrInfo &HII, const SUnit &Inst1, in shouldTFRICallBind()
323 auto &HII = *DAG->MF.getSubtarget<HexagonSubtarget>().getInstrInfo(); in apply() local
386 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII); in apply() local
H A DHexagonHazardRecognizer.h49 const HexagonInstrInfo *HII, in HexagonHazardRecognizer()
H A DHexagonISelDAGToDAG.h31 const HexagonInstrInfo *HII; variable
H A DHexagonFixupHwLoops.cpp112 const HexagonInstrInfo *HII = in fixupLoopInstrs() local
H A DHexagonBranchRelaxation.cpp69 const HexagonInstrInfo *HII; member

123