1 /*********************************************************************************************************************** 2 * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved. 3 * 4 * This file is part of Renesas SynergyTM Software Package (SSP) 5 * 6 * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation 7 * and/or its licensors ("Renesas") and subject to statutory and contractual protections. 8 * 9 * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with 10 * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name 11 * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS 12 * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED 13 * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A 14 * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR 15 * CONSEQUENTIAL DAMAGES, INCLUDING DAMAGES RESULTING FROM LOSS OF USE, DATA, OR PROJECTS, WHETHER IN AN ACTION OF 16 * CONTRACT OR TORT, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE CONTENTS. Third-party contents 17 * included in this file may be subject to different terms. 18 **********************************************************************************************************************/ 19 20 /********************************************************************************************************************** 21 * File Name : r_ioport_api.h 22 * Description : IOPORT driver interface. 23 **********************************************************************************************************************/ 24 25 /*******************************************************************************************************************//** 26 * @ingroup Interface_Library 27 * @defgroup IOPORT_API I/O Port Interface 28 * @brief Interface for accessing I/O ports and configuring I/O functionality. 29 * 30 * The IOPort shared interface provides the ability to access the IOPorts of a device at both bit and port level. 31 * Port and pin direction can be changed. 32 * 33 * Related SSP architecture topics: 34 * - @ref ssp-interfaces 35 * - @ref ssp-predefined-layers 36 * - @ref using-ssp-modules 37 * 38 * IOPORT Interface description: @ref HALIOPORTInterface 39 * 40 * @{ 41 **********************************************************************************************************************/ 42 43 #ifndef DRV_IOPORT_API_H 44 #define DRV_IOPORT_API_H 45 46 /*********************************************************************************************************************** 47 * Includes 48 **********************************************************************************************************************/ 49 /* Common error codes and definitions. */ 50 #include "bsp_api.h" 51 52 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */ 53 SSP_HEADER 54 55 /********************************************************************************************************************** 56 * Macro definitions 57 **********************************************************************************************************************/ 58 #define IOPORT_API_VERSION_MAJOR (1U) 59 #define IOPORT_API_VERSION_MINOR (3U) 60 61 /* Private definition to set enumeration values. */ 62 #define IOPORT_PRV_PFS_PSEL_OFFSET (24) 63 64 /********************************************************************************************************************** 65 * Typedef definitions 66 **********************************************************************************************************************/ 67 68 /** IO port type used with ports */ 69 typedef uint16_t ioport_size_t; ///< IO port size on this device 70 71 /** Levels that can be set and read for individual pins */ 72 typedef enum e_ioport_level 73 { 74 IOPORT_LEVEL_LOW = 0, ///< Low 75 IOPORT_LEVEL_HIGH ///< High 76 } ioport_level_t; 77 78 /** Direction of individual pins */ 79 typedef enum e_ioport_dir 80 { 81 IOPORT_DIRECTION_INPUT = 0, ///< Input 82 IOPORT_DIRECTION_OUTPUT ///< Output 83 } ioport_direction_t; 84 85 /** Superset list of all possible IO ports. */ 86 typedef enum e_ioport_port 87 { 88 IOPORT_PORT_00 = 0x0000, ///< IO port 0 89 IOPORT_PORT_01 = 0x0100, ///< IO port 1 90 IOPORT_PORT_02 = 0x0200, ///< IO port 2 91 IOPORT_PORT_03 = 0x0300, ///< IO port 3 92 IOPORT_PORT_04 = 0x0400, ///< IO port 4 93 IOPORT_PORT_05 = 0x0500, ///< IO port 5 94 IOPORT_PORT_06 = 0x0600, ///< IO port 6 95 IOPORT_PORT_07 = 0x0700, ///< IO port 7 96 IOPORT_PORT_08 = 0x0800, ///< IO port 8 97 IOPORT_PORT_09 = 0x0900, ///< IO port 9 98 IOPORT_PORT_10 = 0x0A00, ///< IO port 10 99 IOPORT_PORT_11 = 0x0B00, ///< IO port 11 100 } ioport_port_t; 101 102 /** Superset list of all possible IO port pins. */ 103 typedef enum e_ioport_port_pin_t 104 { 105 IOPORT_PORT_00_PIN_00 = 0x0000, ///< IO port 0 pin 0 106 IOPORT_PORT_00_PIN_01 = 0x0001, ///< IO port 0 pin 1 107 IOPORT_PORT_00_PIN_02 = 0x0002, ///< IO port 0 pin 2 108 IOPORT_PORT_00_PIN_03 = 0x0003, ///< IO port 0 pin 3 109 IOPORT_PORT_00_PIN_04 = 0x0004, ///< IO port 0 pin 4 110 IOPORT_PORT_00_PIN_05 = 0x0005, ///< IO port 0 pin 5 111 IOPORT_PORT_00_PIN_06 = 0x0006, ///< IO port 0 pin 6 112 IOPORT_PORT_00_PIN_07 = 0x0007, ///< IO port 0 pin 7 113 IOPORT_PORT_00_PIN_08 = 0x0008, ///< IO port 0 pin 8 114 IOPORT_PORT_00_PIN_09 = 0x0009, ///< IO port 0 pin 9 115 IOPORT_PORT_00_PIN_10 = 0x000A, ///< IO port 0 pin 10 116 IOPORT_PORT_00_PIN_11 = 0x000B, ///< IO port 0 pin 11 117 IOPORT_PORT_00_PIN_12 = 0x000C, ///< IO port 0 pin 12 118 IOPORT_PORT_00_PIN_13 = 0x000D, ///< IO port 0 pin 13 119 IOPORT_PORT_00_PIN_14 = 0x000E, ///< IO port 0 pin 14 120 IOPORT_PORT_00_PIN_15 = 0x000F, ///< IO port 0 pin 15 121 122 IOPORT_PORT_01_PIN_00 = 0x0100, ///< IO port 1 pin 0 123 IOPORT_PORT_01_PIN_01 = 0x0101, ///< IO port 1 pin 1 124 IOPORT_PORT_01_PIN_02 = 0x0102, ///< IO port 1 pin 2 125 IOPORT_PORT_01_PIN_03 = 0x0103, ///< IO port 1 pin 3 126 IOPORT_PORT_01_PIN_04 = 0x0104, ///< IO port 1 pin 4 127 IOPORT_PORT_01_PIN_05 = 0x0105, ///< IO port 1 pin 5 128 IOPORT_PORT_01_PIN_06 = 0x0106, ///< IO port 1 pin 6 129 IOPORT_PORT_01_PIN_07 = 0x0107, ///< IO port 1 pin 7 130 IOPORT_PORT_01_PIN_08 = 0x0108, ///< IO port 1 pin 8 131 IOPORT_PORT_01_PIN_09 = 0x0109, ///< IO port 1 pin 9 132 IOPORT_PORT_01_PIN_10 = 0x010A, ///< IO port 1 pin 10 133 IOPORT_PORT_01_PIN_11 = 0x010B, ///< IO port 1 pin 11 134 IOPORT_PORT_01_PIN_12 = 0x010C, ///< IO port 1 pin 12 135 IOPORT_PORT_01_PIN_13 = 0x010D, ///< IO port 1 pin 13 136 IOPORT_PORT_01_PIN_14 = 0x010E, ///< IO port 1 pin 14 137 IOPORT_PORT_01_PIN_15 = 0x010F, ///< IO port 1 pin 15 138 139 IOPORT_PORT_02_PIN_00 = 0x0200, ///< IO port 2 pin 0 140 IOPORT_PORT_02_PIN_01 = 0x0201, ///< IO port 2 pin 1 141 IOPORT_PORT_02_PIN_02 = 0x0202, ///< IO port 2 pin 2 142 IOPORT_PORT_02_PIN_03 = 0x0203, ///< IO port 2 pin 3 143 IOPORT_PORT_02_PIN_04 = 0x0204, ///< IO port 2 pin 4 144 IOPORT_PORT_02_PIN_05 = 0x0205, ///< IO port 2 pin 5 145 IOPORT_PORT_02_PIN_06 = 0x0206, ///< IO port 2 pin 6 146 IOPORT_PORT_02_PIN_07 = 0x0207, ///< IO port 2 pin 7 147 IOPORT_PORT_02_PIN_08 = 0x0208, ///< IO port 2 pin 8 148 IOPORT_PORT_02_PIN_09 = 0x0209, ///< IO port 2 pin 9 149 IOPORT_PORT_02_PIN_10 = 0x020A, ///< IO port 2 pin 10 150 IOPORT_PORT_02_PIN_11 = 0x020B, ///< IO port 2 pin 11 151 IOPORT_PORT_02_PIN_12 = 0x020C, ///< IO port 2 pin 12 152 IOPORT_PORT_02_PIN_13 = 0x020D, ///< IO port 2 pin 13 153 IOPORT_PORT_02_PIN_14 = 0x020E, ///< IO port 2 pin 14 154 IOPORT_PORT_02_PIN_15 = 0x020F, ///< IO port 2 pin 15 155 156 IOPORT_PORT_03_PIN_00 = 0x0300, ///< IO port 3 pin 0 157 IOPORT_PORT_03_PIN_01 = 0x0301, ///< IO port 3 pin 1 158 IOPORT_PORT_03_PIN_02 = 0x0302, ///< IO port 3 pin 2 159 IOPORT_PORT_03_PIN_03 = 0x0303, ///< IO port 3 pin 3 160 IOPORT_PORT_03_PIN_04 = 0x0304, ///< IO port 3 pin 4 161 IOPORT_PORT_03_PIN_05 = 0x0305, ///< IO port 3 pin 5 162 IOPORT_PORT_03_PIN_06 = 0x0306, ///< IO port 3 pin 6 163 IOPORT_PORT_03_PIN_07 = 0x0307, ///< IO port 3 pin 7 164 IOPORT_PORT_03_PIN_08 = 0x0308, ///< IO port 3 pin 8 165 IOPORT_PORT_03_PIN_09 = 0x0309, ///< IO port 3 pin 9 166 IOPORT_PORT_03_PIN_10 = 0x030A, ///< IO port 3 pin 10 167 IOPORT_PORT_03_PIN_11 = 0x030B, ///< IO port 3 pin 11 168 IOPORT_PORT_03_PIN_12 = 0x030C, ///< IO port 3 pin 12 169 IOPORT_PORT_03_PIN_13 = 0x030D, ///< IO port 3 pin 13 170 IOPORT_PORT_03_PIN_14 = 0x030E, ///< IO port 3 pin 14 171 IOPORT_PORT_03_PIN_15 = 0x030F, ///< IO port 3 pin 15 172 173 IOPORT_PORT_04_PIN_00 = 0x0400, ///< IO port 4 pin 0 174 IOPORT_PORT_04_PIN_01 = 0x0401, ///< IO port 4 pin 1 175 IOPORT_PORT_04_PIN_02 = 0x0402, ///< IO port 4 pin 2 176 IOPORT_PORT_04_PIN_03 = 0x0403, ///< IO port 4 pin 3 177 IOPORT_PORT_04_PIN_04 = 0x0404, ///< IO port 4 pin 4 178 IOPORT_PORT_04_PIN_05 = 0x0405, ///< IO port 4 pin 5 179 IOPORT_PORT_04_PIN_06 = 0x0406, ///< IO port 4 pin 6 180 IOPORT_PORT_04_PIN_07 = 0x0407, ///< IO port 4 pin 7 181 IOPORT_PORT_04_PIN_08 = 0x0408, ///< IO port 4 pin 8 182 IOPORT_PORT_04_PIN_09 = 0x0409, ///< IO port 4 pin 9 183 IOPORT_PORT_04_PIN_10 = 0x040A, ///< IO port 4 pin 10 184 IOPORT_PORT_04_PIN_11 = 0x040B, ///< IO port 4 pin 11 185 IOPORT_PORT_04_PIN_12 = 0x040C, ///< IO port 4 pin 12 186 IOPORT_PORT_04_PIN_13 = 0x040D, ///< IO port 4 pin 13 187 IOPORT_PORT_04_PIN_14 = 0x040E, ///< IO port 4 pin 14 188 IOPORT_PORT_04_PIN_15 = 0x040F, ///< IO port 4 pin 15 189 190 IOPORT_PORT_05_PIN_00 = 0x0500, ///< IO port 5 pin 0 191 IOPORT_PORT_05_PIN_01 = 0x0501, ///< IO port 5 pin 1 192 IOPORT_PORT_05_PIN_02 = 0x0502, ///< IO port 5 pin 2 193 IOPORT_PORT_05_PIN_03 = 0x0503, ///< IO port 5 pin 3 194 IOPORT_PORT_05_PIN_04 = 0x0504, ///< IO port 5 pin 4 195 IOPORT_PORT_05_PIN_05 = 0x0505, ///< IO port 5 pin 5 196 IOPORT_PORT_05_PIN_06 = 0x0506, ///< IO port 5 pin 6 197 IOPORT_PORT_05_PIN_07 = 0x0507, ///< IO port 5 pin 7 198 IOPORT_PORT_05_PIN_08 = 0x0508, ///< IO port 5 pin 8 199 IOPORT_PORT_05_PIN_09 = 0x0509, ///< IO port 5 pin 9 200 IOPORT_PORT_05_PIN_10 = 0x050A, ///< IO port 5 pin 10 201 IOPORT_PORT_05_PIN_11 = 0x050B, ///< IO port 5 pin 11 202 IOPORT_PORT_05_PIN_12 = 0x050C, ///< IO port 5 pin 12 203 IOPORT_PORT_05_PIN_13 = 0x050D, ///< IO port 5 pin 13 204 IOPORT_PORT_05_PIN_14 = 0x050E, ///< IO port 5 pin 14 205 IOPORT_PORT_05_PIN_15 = 0x050F, ///< IO port 5 pin 15 206 207 IOPORT_PORT_06_PIN_00 = 0x0600, ///< IO port 6 pin 0 208 IOPORT_PORT_06_PIN_01 = 0x0601, ///< IO port 6 pin 1 209 IOPORT_PORT_06_PIN_02 = 0x0602, ///< IO port 6 pin 2 210 IOPORT_PORT_06_PIN_03 = 0x0603, ///< IO port 6 pin 3 211 IOPORT_PORT_06_PIN_04 = 0x0604, ///< IO port 6 pin 4 212 IOPORT_PORT_06_PIN_05 = 0x0605, ///< IO port 6 pin 5 213 IOPORT_PORT_06_PIN_06 = 0x0606, ///< IO port 6 pin 6 214 IOPORT_PORT_06_PIN_07 = 0x0607, ///< IO port 6 pin 7 215 IOPORT_PORT_06_PIN_08 = 0x0608, ///< IO port 6 pin 8 216 IOPORT_PORT_06_PIN_09 = 0x0609, ///< IO port 6 pin 9 217 IOPORT_PORT_06_PIN_10 = 0x060A, ///< IO port 6 pin 10 218 IOPORT_PORT_06_PIN_11 = 0x060B, ///< IO port 6 pin 11 219 IOPORT_PORT_06_PIN_12 = 0x060C, ///< IO port 6 pin 12 220 IOPORT_PORT_06_PIN_13 = 0x060D, ///< IO port 6 pin 13 221 IOPORT_PORT_06_PIN_14 = 0x060E, ///< IO port 6 pin 14 222 IOPORT_PORT_06_PIN_15 = 0x060F, ///< IO port 6 pin 15 223 224 IOPORT_PORT_07_PIN_00 = 0x0700, ///< IO port 7 pin 0 225 IOPORT_PORT_07_PIN_01 = 0x0701, ///< IO port 7 pin 1 226 IOPORT_PORT_07_PIN_02 = 0x0702, ///< IO port 7 pin 2 227 IOPORT_PORT_07_PIN_03 = 0x0703, ///< IO port 7 pin 3 228 IOPORT_PORT_07_PIN_04 = 0x0704, ///< IO port 7 pin 4 229 IOPORT_PORT_07_PIN_05 = 0x0705, ///< IO port 7 pin 5 230 IOPORT_PORT_07_PIN_06 = 0x0706, ///< IO port 7 pin 6 231 IOPORT_PORT_07_PIN_07 = 0x0707, ///< IO port 7 pin 7 232 IOPORT_PORT_07_PIN_08 = 0x0708, ///< IO port 7 pin 8 233 IOPORT_PORT_07_PIN_09 = 0x0709, ///< IO port 7 pin 9 234 IOPORT_PORT_07_PIN_10 = 0x070A, ///< IO port 7 pin 10 235 IOPORT_PORT_07_PIN_11 = 0x070B, ///< IO port 7 pin 11 236 IOPORT_PORT_07_PIN_12 = 0x070C, ///< IO port 7 pin 12 237 IOPORT_PORT_07_PIN_13 = 0x070D, ///< IO port 7 pin 13 238 IOPORT_PORT_07_PIN_14 = 0x070E, ///< IO port 7 pin 14 239 IOPORT_PORT_07_PIN_15 = 0x070F, ///< IO port 7 pin 15 240 241 IOPORT_PORT_08_PIN_00 = 0x0800, ///< IO port 8 pin 0 242 IOPORT_PORT_08_PIN_01 = 0x0801, ///< IO port 8 pin 1 243 IOPORT_PORT_08_PIN_02 = 0x0802, ///< IO port 8 pin 2 244 IOPORT_PORT_08_PIN_03 = 0x0803, ///< IO port 8 pin 3 245 IOPORT_PORT_08_PIN_04 = 0x0804, ///< IO port 8 pin 4 246 IOPORT_PORT_08_PIN_05 = 0x0805, ///< IO port 8 pin 5 247 IOPORT_PORT_08_PIN_06 = 0x0806, ///< IO port 8 pin 6 248 IOPORT_PORT_08_PIN_07 = 0x0807, ///< IO port 8 pin 7 249 IOPORT_PORT_08_PIN_08 = 0x0808, ///< IO port 8 pin 8 250 IOPORT_PORT_08_PIN_09 = 0x0809, ///< IO port 8 pin 9 251 IOPORT_PORT_08_PIN_10 = 0x080A, ///< IO port 8 pin 10 252 IOPORT_PORT_08_PIN_11 = 0x080B, ///< IO port 8 pin 11 253 IOPORT_PORT_08_PIN_12 = 0x080C, ///< IO port 8 pin 12 254 IOPORT_PORT_08_PIN_13 = 0x080D, ///< IO port 8 pin 13 255 IOPORT_PORT_08_PIN_14 = 0x080E, ///< IO port 8 pin 14 256 IOPORT_PORT_08_PIN_15 = 0x080F, ///< IO port 8 pin 15 257 258 IOPORT_PORT_09_PIN_00 = 0x0900, ///< IO port 9 pin 0 259 IOPORT_PORT_09_PIN_01 = 0x0901, ///< IO port 9 pin 1 260 IOPORT_PORT_09_PIN_02 = 0x0902, ///< IO port 9 pin 2 261 IOPORT_PORT_09_PIN_03 = 0x0903, ///< IO port 9 pin 3 262 IOPORT_PORT_09_PIN_04 = 0x0904, ///< IO port 9 pin 4 263 IOPORT_PORT_09_PIN_05 = 0x0905, ///< IO port 9 pin 5 264 IOPORT_PORT_09_PIN_06 = 0x0906, ///< IO port 9 pin 6 265 IOPORT_PORT_09_PIN_07 = 0x0907, ///< IO port 9 pin 7 266 IOPORT_PORT_09_PIN_08 = 0x0908, ///< IO port 9 pin 8 267 IOPORT_PORT_09_PIN_09 = 0x0909, ///< IO port 9 pin 9 268 IOPORT_PORT_09_PIN_10 = 0x090A, ///< IO port 9 pin 10 269 IOPORT_PORT_09_PIN_11 = 0x090B, ///< IO port 9 pin 11 270 IOPORT_PORT_09_PIN_12 = 0x090C, ///< IO port 9 pin 12 271 IOPORT_PORT_09_PIN_13 = 0x090D, ///< IO port 9 pin 13 272 IOPORT_PORT_09_PIN_14 = 0x090E, ///< IO port 9 pin 14 273 IOPORT_PORT_09_PIN_15 = 0x090F, ///< IO port 9 pin 15 274 275 IOPORT_PORT_10_PIN_00 = 0x0A00, ///< IO port 10 pin 0 276 IOPORT_PORT_10_PIN_01 = 0x0A01, ///< IO port 10 pin 1 277 IOPORT_PORT_10_PIN_02 = 0x0A02, ///< IO port 10 pin 2 278 IOPORT_PORT_10_PIN_03 = 0x0A03, ///< IO port 10 pin 3 279 IOPORT_PORT_10_PIN_04 = 0x0A04, ///< IO port 10 pin 4 280 IOPORT_PORT_10_PIN_05 = 0x0A05, ///< IO port 10 pin 5 281 IOPORT_PORT_10_PIN_06 = 0x0A06, ///< IO port 10 pin 6 282 IOPORT_PORT_10_PIN_07 = 0x0A07, ///< IO port 10 pin 7 283 IOPORT_PORT_10_PIN_08 = 0x0A08, ///< IO port 10 pin 8 284 IOPORT_PORT_10_PIN_09 = 0x0A09, ///< IO port 10 pin 9 285 IOPORT_PORT_10_PIN_10 = 0x0A0A, ///< IO port 10 pin 10 286 IOPORT_PORT_10_PIN_11 = 0x0A0B, ///< IO port 10 pin 11 287 IOPORT_PORT_10_PIN_12 = 0x0A0C, ///< IO port 10 pin 12 288 IOPORT_PORT_10_PIN_13 = 0x0A0D, ///< IO port 10 pin 13 289 IOPORT_PORT_10_PIN_14 = 0x0A0E, ///< IO port 10 pin 14 290 IOPORT_PORT_10_PIN_15 = 0x0A0F, ///< IO port 10 pin 15 291 292 IOPORT_PORT_11_PIN_00 = 0x0B00, ///< IO port 11 pin 0 293 IOPORT_PORT_11_PIN_01 = 0x0B01, ///< IO port 11 pin 1 294 IOPORT_PORT_11_PIN_02 = 0x0B02, ///< IO port 11 pin 2 295 IOPORT_PORT_11_PIN_03 = 0x0B03, ///< IO port 11 pin 3 296 IOPORT_PORT_11_PIN_04 = 0x0B04, ///< IO port 11 pin 4 297 IOPORT_PORT_11_PIN_05 = 0x0B05, ///< IO port 11 pin 5 298 IOPORT_PORT_11_PIN_06 = 0x0B06, ///< IO port 11 pin 6 299 IOPORT_PORT_11_PIN_07 = 0x0B07, ///< IO port 11 pin 7 300 IOPORT_PORT_11_PIN_08 = 0x0B08, ///< IO port 11 pin 8 301 IOPORT_PORT_11_PIN_09 = 0x0B09, ///< IO port 11 pin 9 302 IOPORT_PORT_11_PIN_10 = 0x0B0A, ///< IO port 11 pin 10 303 IOPORT_PORT_11_PIN_11 = 0x0B0B, ///< IO port 11 pin 11 304 IOPORT_PORT_11_PIN_12 = 0x0B0C, ///< IO port 11 pin 12 305 IOPORT_PORT_11_PIN_13 = 0x0B0D, ///< IO port 11 pin 13 306 IOPORT_PORT_11_PIN_14 = 0x0B0E, ///< IO port 11 pin 14 307 IOPORT_PORT_11_PIN_15 = 0x0B0F, ///< IO port 11 pin 15 308 } ioport_port_pin_t; 309 310 /** Superset of all peripheral functions. */ 311 typedef enum e_ioport_peripheral 312 { 313 IOPORT_PERIPHERAL_IO = 0x00, ///< Pin will functions as an IO pin 314 IOPORT_PERIPHERAL_DEBUG = (0x00UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a DEBUG pin 315 IOPORT_PERIPHERAL_AGT = (0x01UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an AGT 316 // peripheral pin 317 IOPORT_PERIPHERAL_GPT0 = (0x02UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a GPT 318 // peripheral pin 319 IOPORT_PERIPHERAL_GPT1 = (0x03UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a GPT 320 // peripheral pin 321 IOPORT_PERIPHERAL_SCI0_2_4_6_8 = (0x04UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an SCI 322 // peripheral pin 323 IOPORT_PERIPHERAL_SCI1_3_5_7_9 = (0x05UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an SCI 324 // peripheral pin 325 IOPORT_PERIPHERAL_RSPI = (0x06UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a RSPI 326 // peripheral pin 327 IOPORT_PERIPHERAL_RIIC = (0x07UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a RIIC 328 // peripheral pin 329 IOPORT_PERIPHERAL_KEY = (0x08UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a KEY 330 // peripheral pin 331 IOPORT_PERIPHERAL_CLKOUT_COMP_RTC = (0x09UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a 332 // clock/comparator/RTC peripheral pin 333 IOPORT_PERIPHERAL_CAC_AD = (0x0AUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a CAC/ADC 334 // peripheral pin 335 IOPORT_PERIPHERAL_BUS = (0x0BUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a BUS 336 // peripheral pin 337 IOPORT_PERIPHERAL_CTSU = (0x0CUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a CTSU 338 // peripheral pin 339 IOPORT_PERIPHERAL_LCDC = (0x0DUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a segment LCD 340 // peripheral pin 341 IOPORT_PERIPHERAL_DALI = (0x0EUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a DALI 342 // peripheral pin 343 IOPORT_PERIPHERAL_CAN = (0x10UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a CAN 344 // peripheral pin 345 IOPORT_PERIPHERAL_QSPI = (0x11UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a QSPI 346 // peripheral pin 347 IOPORT_PERIPHERAL_SSI = (0x12UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an SSI 348 // peripheral pin 349 IOPORT_PERIPHERAL_USB_FS = (0x13UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a USB 350 // full speed peripheral pin 351 IOPORT_PERIPHERAL_USB_HS = (0x14UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a USB 352 // high speed peripheral pin 353 IOPORT_PERIPHERAL_SDHI_MMC = (0x15UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an SD/MMC 354 // peripheral pin 355 IOPORT_PERIPHERAL_ETHER_MII = (0x16UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an Ethernet 356 // MMI peripheral pin 357 IOPORT_PERIPHERAL_ETHER_RMII = (0x17UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as an Ethernet 358 // RMMI peripheral pin 359 IOPORT_PERIPHERAL_PDC = (0x18UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a PDC 360 // peripheral pin 361 IOPORT_PERIPHERAL_LCD_GRAPHICS = (0x19UL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a graphics 362 // LCD peripheral pin 363 IOPORT_PERIPHERAL_TRACE = (0x1AUL << IOPORT_PRV_PFS_PSEL_OFFSET), ///< Pin will function as a debug trace 364 // peripheral pin 365 IOPORT_PERIPHERAL_END ///< Marks end of enum - used by 366 // parameter checking 367 } ioport_peripheral_t; 368 369 /** Superset of Ethernet channels. */ 370 typedef enum e_ioport_eth_ch 371 { 372 IOPORT_ETHERNET_CHANNEL_0 = 0x10, ///< Used to select Ethernet channel 0 373 IOPORT_ETHERNET_CHANNEL_1 = 0x20, ///< Used to select Ethernet channel 1 374 IOPORT_ETHERNET_CHANNEL_END ///< Marks end of enum - used by parameter checking 375 } ioport_ethernet_channel_t; 376 377 /** Superset of Ethernet PHY modes. */ 378 typedef enum e_ioport_eth_mode 379 { 380 IOPORT_ETHERNET_MODE_MII = 0, ///< Ethernet PHY mode set to MII 381 IOPORT_ETHERNET_MODE_RMII, ///< Ethernet PHY mode set to RMII 382 IOPORT_ETHERNET_MODE_END ///< Marks end of enum - used by parameter checking 383 } ioport_ethernet_mode_t; 384 385 /** Options to configure pin functions */ 386 typedef enum e_ioport_cfg_options 387 { 388 IOPORT_CFG_PORT_DIRECTION_INPUT = 0x00000000, ///< Sets the pin direction to input (default) 389 IOPORT_CFG_PORT_DIRECTION_OUTPUT = 0x00000004, ///< Sets the pin direction to output 390 IOPORT_CFG_PORT_OUTPUT_LOW = 0x00000000, ///< Sets the pin level to low 391 IOPORT_CFG_PORT_OUTPUT_HIGH = 0x00000001, ///< Sets the pin level to high 392 IOPORT_CFG_PULLUP_ENABLE = 0x00000010, ///< Enables the pin's internal pull-up 393 IOPORT_CFG_PIM_TTL = 0x00000020, ///< Enables the pin's input mode 394 IOPORT_CFG_NMOS_ENABLE = 0x00000040, ///< Enables the pin's NMOS open-drain output 395 IOPORT_CFG_PMOS_ENABLE = 0x00000080, ///< Enables the pin's PMOS open-drain ouput 396 IOPORT_CFG_DRIVE_MID = 0x00000400, ///< Sets pin drive output to medium 397 IOPORT_CFG_DRIVE_MID_IIC = 0x00000C00, ///< Sets pin to drive output needed for IIC on a 20mA port 398 IOPORT_CFG_DRIVE_HIGH = 0x00000C00, ///< Sets pin drive output to high 399 IOPORT_CFG_EVENT_RISING_EDGE = 0x00001000, ///< Sets pin event trigger to rising edge 400 IOPORT_CFG_EVENT_FALLING_EDGE = 0x00002000, ///< Sets pin event trigger to falling edge 401 IOPORT_CFG_EVENT_BOTH_EDGES = 0x00003000, ///< Sets pin event trigger to both edges 402 IOPORT_CFG_IRQ_ENABLE = 0x00004000, ///< Sets pin as an IRQ pin 403 IOPORT_CFG_ANALOG_ENABLE = 0x00008000, ///< Enables pin to operate as an analog pin 404 IOPORT_CFG_PERIPHERAL_PIN = 0x00010000 ///< Enables pin to operate as a peripheral pin 405 } ioport_cfg_options_t; 406 407 /** Pin identifier and pin PFS pin configuration value */ 408 typedef struct st_ioport_pin_cfg 409 { 410 uint32_t pin_cfg; ///< Pin PFS configuration - Use ioport_cfg_options_t parameters to configure 411 ioport_port_pin_t pin; ///< Pin identifier 412 } ioport_pin_cfg_t; 413 414 /** Multiple pin configuration data for loading into PFS registers by R_IOPORT_Init() */ 415 typedef struct st_ioport_cfg 416 { 417 uint16_t number_of_pins; ///< Number of pins for which there is configuration data 418 ioport_pin_cfg_t const * p_pin_cfg_data; ///< Pin configuration data 419 } ioport_cfg_t; 420 421 /** IOPort driver structure. IOPort functions implemented at the HAL layer will follow this API. */ 422 typedef struct st_ioport_api 423 { 424 /** Initialize internal driver data and initial pin configurations. Called during startup. Do 425 * not call this API during runtime. Use ioport_api_t::pinsCfg for runtime reconfiguration of 426 * multiple pins. 427 * @par Implemented as 428 * - R_IOPORT_Init() 429 * @param[in] p_cfg Pointer to pin configuration data array. 430 */ 431 ssp_err_t (* init)(const ioport_cfg_t * p_cfg); 432 433 /** Configure multiple pins. 434 * @par Implemented as 435 * - R_IOPORT_PinsCfg() 436 * @param[in] p_cfg Pointer to pin configuration data array. 437 */ 438 ssp_err_t (* pinsCfg)(const ioport_cfg_t * p_cfg); 439 440 /** Configure settings for an individual pin. 441 * @par Implemented as 442 * - R_IOPORT_PinCfg() 443 * @param[in] pin Pin to be read. 444 * @param[in] cfg Configuration options for the pin. 445 */ 446 ssp_err_t (* pinCfg)(ioport_port_pin_t pin, uint32_t cfg); 447 448 /** Set the pin direction of a pin. 449 * @par Implemented as 450 * - R_IOPORT_PinDirectionSet() 451 * @param[in] pin Pin being configured. 452 * @param[in] direction Direction to set pin to which is a member of ioport_direction_t. 453 */ 454 ssp_err_t (* pinDirectionSet)(ioport_port_pin_t pin, ioport_direction_t direction); 455 456 /** Read the event input data of the specified pin and return the level. 457 * @par Implemented as 458 * - R_IOPORT_PinEventInputRead() 459 * @param[in] pin Pin to be read. 460 * @param[in] p_pin_event Pointer to return the event data. 461 */ 462 ssp_err_t (* pinEventInputRead)(ioport_port_pin_t pin, ioport_level_t * p_pin_event); 463 464 /** Write pin event data. 465 * @par Implemented as 466 * - R_IOPORT_PinEventOutputWrite() 467 * @param[in] pin Pin event data is to be written to. 468 * @param[in] pin_value Level to be written to pin output event. 469 */ 470 ssp_err_t (* pinEventOutputWrite)(ioport_port_pin_t pin, ioport_level_t pin_value); 471 472 /** Configure the PHY mode of the Ethernet channels. 473 * @par Implemented as 474 * - R_IOPORT_EthernetModeCfg() 475 * @param[in] channel Channel configuration will be set for. 476 * @param[in] mode PHY mode to set the channel to. 477 */ 478 ssp_err_t (* pinEthernetModeCfg)(ioport_ethernet_channel_t channel, ioport_ethernet_mode_t mode); 479 480 /** Read level of a pin. 481 * @par Implemented as 482 * - R_IOPORT_PinRead() 483 * @param[in] pin Pin to be read. 484 * @param[in] p_pin_value Pointer to return the pin level. 485 */ 486 ssp_err_t (* pinRead)(ioport_port_pin_t pin, ioport_level_t * p_pin_value); 487 488 /** Write specified level to a pin. 489 * @par Implemented as 490 * - R_IOPORT_PinWrite() 491 * @param[in] pin Pin to be written to. 492 * @param[in] level State to be written to the pin. 493 */ 494 ssp_err_t (* pinWrite)(ioport_port_pin_t pin, ioport_level_t level); 495 496 /** Set the direction of one or more pins on a port. 497 * @par Implemented as 498 * - R_IOPORT_PortDirectionSet() 499 * @param[in] port Port being configured. 500 * @param[in] direction_values Value controlling direction of pins on port (1 - output, 0 - input). 501 * @param[in] mask Mask controlling which pins on the port are to be configured. 502 */ 503 ssp_err_t (* portDirectionSet)(ioport_port_t port, ioport_size_t direction_values, ioport_size_t mask); 504 505 /** Read captured event data for a port. 506 * @par Implemented as 507 * - R_IOPORT_PortEventInputRead() 508 * @param[in] port Port to be read. 509 * @param[in] p_event_data Pointer to return the event data. 510 */ 511 ssp_err_t (* portEventInputRead)(ioport_port_t port, ioport_size_t * p_event_data); 512 513 /** Write event output data for a port. 514 * @par Implemented as 515 * - R_IOPORT_PortEventOutputWrite() 516 * @param[in] port Port event data will be written to. 517 * @param[in] event_data Data to be written as event data to specified port. 518 * @param[in] mask_value Each bit set to 1 in the mask corresponds to that bit's value in event data. 519 * being written to port. 520 */ 521 ssp_err_t (* portEventOutputWrite)(ioport_port_t port, ioport_size_t event_data, ioport_size_t mask_value); 522 523 /** Read states of pins on the specified port. 524 * @par Implemented as 525 * - R_IOPORT_PortRead() 526 * @param[in] port Port to be read. 527 * @param[in] p_port_value Pointer to return the port value. 528 */ 529 ssp_err_t (* portRead)(ioport_port_t port, ioport_size_t * p_port_value); 530 531 /** Write to multiple pins on a port. 532 * @par Implemented as 533 * - R_IOPORT_PortWrite() 534 * @param[in] port Port to be written to. 535 * @param[in] value Value to be written to the port. 536 * @param[in] mask Mask controlling which pins on the port are written to. 537 */ 538 ssp_err_t (* portWrite)(ioport_port_t port, ioport_size_t value, ioport_size_t mask); 539 540 /** Return the version of the IOPort driver. 541 * @par Implemented as 542 * - R_IOPORT_VersionGet() 543 * @param[out] p_data Memory address to return version information to. 544 */ 545 ssp_err_t (* versionGet)(ssp_version_t * p_data); 546 } ioport_api_t; 547 548 /** This structure encompasses everything that is needed to use an instance of this interface. */ 549 typedef struct st_ioport_instance 550 { 551 ioport_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance 552 ioport_api_t const * p_api; ///< Pointer to the API structure for this instance 553 } ioport_instance_t; 554 555 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */ 556 SSP_FOOTER 557 558 #endif /* DRV_IOPORT_API_H */ 559 560 /*******************************************************************************************************************//** 561 * @} (end defgroup IOPORT_API) 562 **********************************************************************************************************************/ 563