| /aosp_15_r20/frameworks/compile/libbcc/lib/ |
| D | RSX86TranslateGEPPass.cpp | 86 llvm::Value *Incr = llvm::ConstantInt::get( in computeGEPOffset() local
94 llvm::Value *Incr = llvm::BinaryOperator::CreateMul( in computeGEPOffset() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 232 int64_t Incr; in tryToCombine() local
354 MachineOperand &Incr, unsigned BaseReg) { in canFixPastUses()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| H A D | ARCOptAddrMode.cpp | 221 int64_t Incr; in tryToCombine() local
343 MachineOperand &Incr, unsigned BaseReg) { in canFixPastUses()
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| /aosp_15_r20/external/tensorflow/tensorflow/core/lib/gtl/ |
| H A D | cleanup_test.cc | 267 void Incr(volatile int* ip) { ++*ip; } in Incr() function
268 void Incr() { Incr(&i); } in Incr() function
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 412 Register Incr = I->getOperand(2).getReg(); in expandAtomicBinOpSubword() local
634 Register Incr = I->getOperand(2).getReg(); in expandAtomicBinOp() local
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| H A D | MipsISelLowering.cpp | 1555 Register Incr = MI.getOperand(2).getReg(); in emitAtomicBinary() local
1666 Register Incr = MI.getOperand(2).getReg(); in emitAtomicBinaryPartword() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 412 Register Incr = I->getOperand(2).getReg(); in expandAtomicBinOpSubword() local
634 Register Incr = I->getOperand(2).getReg(); in expandAtomicBinOp() local
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| H A D | MipsISelLowering.cpp | 1551 Register Incr = MI.getOperand(2).getReg(); in emitAtomicBinary() local
1662 Register Incr = MI.getOperand(2).getReg(); in emitAtomicBinaryPartword() local
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| /aosp_15_r20/external/grpc-grpc/test/cpp/util/ |
| H A D | metrics_server.cc | 41 void QpsGauge::Incr() { in Incr() function in grpc::testing::QpsGauge
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| /aosp_15_r20/external/AFLplusplus/instrumentation/ |
| H A D | SanitizerCoveragePCGUARD.so.cc | 1014 Value *Incr = IRB.CreateAdd(Counter, One); in InjectCoverage() local
1241 Value *Incr = IRB.CreateAdd(Counter, One); in InjectCoverageAtBlock() local
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| H A D | SanitizerCoverageLTO.so.cc | 1435 Value *Incr = IRB.CreateAdd(Counter, One); in instrumentFunction() local
1708 Value *Incr = IRB.CreateAdd(Counter, One); in InjectCoverageAtBlock() local
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| H A D | afl-llvm-pass.so.cc | 804 Value *Incr = IRB.CreateAdd(Counter, One); local
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| /aosp_15_r20/external/swiftshader/third_party/subzero/crosstest/ |
| H A D | test_vector_ops_main.cpp | 34 Ty Incr; in getTestVectors() local
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| /aosp_15_r20/external/pigweed/pw_containers/public/pw_containers/ |
| H A D | inline_deque.h | 692 constexpr InlineDequeIterator& Incr(difference_type n) { in Incr() function
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 530 int Incr; in updateOffset() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 536 int Incr; in updateOffset() local
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| /aosp_15_r20/external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 1144 unsigned Incr = MI.getOperand(2).getReg(); in emitAtomicBinary() local
1243 unsigned Incr = MI.getOperand(2).getReg(); in emitAtomicBinaryPartword() local
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| /aosp_15_r20/external/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfUnit.cpp | 575 int Incr = (LittleEndian ? 1 : -1); in addConstantFPValue() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 227 auto *Incr = dyn_cast<BinaryOperator>(PN->getIncomingValue(BackEdge)); in handleFloatingPointIV() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfUnit.cpp | 521 int Incr = (LittleEndian ? 1 : -1); in addConstantFPValue() local
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| /aosp_15_r20/external/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 259 auto *Incr = dyn_cast<BinaryOperator>(PN->getIncomingValue(BackEdge)); in handleFloatingPointIV() local
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| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1881 int SubReg = 0, End = NumRegs, Incr = 1; in copyPhysRegTuple() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 426 int I = 0, End = NF, Incr = 1; in copyPhysReg() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| H A D | IndVarSimplify.cpp | 321 auto *Incr = dyn_cast<BinaryOperator>(PN->getIncomingValue(BackEdge)); in handleFloatingPointIV() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 2843 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic()
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