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Searched defs:LCKR (Results 1 – 25 of 29) sorted by relevance

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/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f410rx.h292 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f410tx.h289 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f410cx.h292 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f411xe.h275 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f401xe.h274 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f401xc.h274 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f412cx.h395 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f415xx.h439 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f412zx.h415 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f412vx.h415 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f412rx.h415 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f405xx.h440 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f417xx.h535 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f407xx.h536 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f446xx.h468 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f413xx.h453 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f423xx.h454 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f427xx.h582 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f437xx.h583 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32f429xx.h584 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dstm32l073xx.h313 …__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C… member
/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h309 …__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
H A Dstm32wb55xx.h341 …__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/
H A Dstm32f407xx.h552 __IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member
/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h503 …__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */ member

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