| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1233 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in matchIsFiniteTest() local
1251 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldLogicOfFCmps() local
2768 Value *LHS1 = LHS->getOperand(1), *RHS1 = RHS->getOperand(1); in foldAndOrOfICmps() local
3481 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldXorOfICmps() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1361 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldLogicOfFCmps() local
2820 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in foldXorOfICmps() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 564 SDValue LHS1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_0, in getAVRCmp() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 779 SDValue LHS1 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_0, in getAVRCmp() local
|
| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 3772 SDValue LHS1 = Op.getOperand(0); in isSaturatingConditional() local
4044 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
8354 unsigned LHS1 = MI.getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4775 SDValue LHS1 = Op.getOperand(0); in isSaturatingConditional() local
5193 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
10692 Register LHS1 = MI.getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 1799 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in simplifyAndOrOfFCmps() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 928 auto *LHS1 = dyn_cast<ConstantSDNode>(LHS.getOperand(1)); in isDesirableToCommuteWithShift() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Analysis/ |
| H A D | InstructionSimplify.cpp | 1965 Value *LHS0 = LHS->getOperand(0), *LHS1 = LHS->getOperand(1); in simplifyAndOrOfFCmps() local
|
| /aosp_15_r20/external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15118 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in Lower256IntVSETCC() local
19222 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in Lower256IntArith() local
19251 SDValue LHS1 = extract256BitVector(LHS, 0, DAG, dl); in Lower512IntArith() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5665 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local
12067 Register LHS1 = MI.getOperand(1).getReg(); in EmitInstrWithCustomInserter() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21229 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in Lower256IntVSETCC() local
25698 SDValue LHS1 = extract128BitVector(LHS, 0, DAG, dl); in split256IntArith() local
25727 SDValue LHS1 = extract256BitVector(LHS, 0, DAG, dl); in split512IntArith() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 24598 SDValue LHS1, LHS2; in splitIntVSETCC() local
48213 SDValue LHS1 = LHS.getOperand(1); in combineVectorHADDSUB() local
|