Searched defs:LoadConst32 (Results 1 – 4 of 4) sorted by relevance
| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | code_generator_riscv64.cc | 280 __ LoadConst32(counter, ProfilingInfo::GetOptimizeThreshold()); in EmitNativeCode() local
432 __ LoadConst32(calling_convention.GetRegisterAt(0), type_index.index_); in EmitNativeCode() local
485 __ LoadConst32(calling_convention.GetRegisterAt(0), in EmitNativeCode() local
770 __ LoadConst32(calling_convention.GetRegisterAt(0), string_index.index_); in EmitNativeCode() local
3967 __ LoadConst32(out, 1); in VisitInstanceOf() local
3988 __ LoadConst32(out, 1); in VisitInstanceOf() local
4006 __ LoadConst32(out, 1); in VisitInstanceOf() local
4030 __ LoadConst32(out, 1); in VisitInstanceOf() local
4072 __ LoadConst32(out, 1); in VisitInstanceOf() local
4588 __ LoadConst32(calling_convention.GetRegisterAt(0), instruction->GetStringIndex().index_); in VisitLoadString() local
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| H A D | intrinsics_riscv64.cc | 5425 __ LoadConst32(out, 0x3f000000); in GenMathRound() local
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| /aosp_15_r20/art/compiler/utils/riscv64/ |
| H A D | assembler_riscv64_test.cc | 8670 TEST_F(AssemblerRISCV64Test, LoadConst32) { in TEST_F() argument
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| H A D | assembler_riscv64.cc | 6418 void Riscv64Assembler::LoadConst32(XRegister rd, int32_t value) { in LoadConst32() function in art::riscv64::Riscv64Assembler
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