| /aosp_15_r20/art/compiler/optimizing/ |
| H A D | code_generator_arm_vixl.cc | 1288 __ Lsr(temp, second_lo, shift_value); in GenerateLongDataProc() local
3313 __ Lsr(out, out, 5); in GenerateConditionWithZero() local
3342 __ Lsr(out, in, 31); in GenerateConditionWithZero() local
4629 __ Lsr(out, temp1, shift); in GenerateDivRemWithAnyConstant() local
5351 __ Lsr(out_reg_hi, in_reg_hi, Operand::From(rot)); in HandleLongRotate() local
5353 __ Lsr(out_reg_lo, in_reg_lo, Operand::From(rot)); in HandleLongRotate() local
5384 __ Lsr(out_reg_lo, in_reg_lo, shift_right); in HandleLongRotate() local
5387 __ Lsr(shift_left, in_reg_hi, shift_right); in HandleLongRotate() local
5394 __ Lsr(out_reg_hi, in_reg_hi, shift_right); in HandleLongRotate() local
5397 __ Lsr(out_reg_lo, in_reg_lo, shift_right); in HandleLongRotate() local
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| H A D | code_generator_vector_arm64_sve.cc | 843 __ Lsr(dst.VnB(), p_reg, lhs.VnB(), value); in VisitVecUShr() local
847 __ Lsr(dst.VnH(), p_reg, lhs.VnH(), value); in VisitVecUShr() local
850 __ Lsr(dst.VnS(), p_reg, lhs.VnS(), value); in VisitVecUShr() local
853 __ Lsr(dst.VnD(), p_reg, lhs.VnD(), value); in VisitVecUShr() local
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| H A D | intrinsics_arm_vixl.cc | 601 __ Lsr(temp0, temp3, 1u); in VisitStringCompareTo() local
602 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo() local
749 __ Lsr(temp2, temp2, temp1); // Extract second character. in GenerateStringCompareToLoop() local
750 __ Lsr(temp3, temp3, 16u); // uncompressed ? 0xffffu : 0xffu in GenerateStringCompareToLoop() local
751 __ Lsr(out, temp_reg, temp1); // Extract first character. in GenerateStringCompareToLoop() local
756 __ Lsr(temp2, temp2, temp1); in GenerateStringCompareToLoop() local
757 __ Lsr(out, temp_reg, temp1); in GenerateStringCompareToLoop() local
2003 __ Lsr(out_reg_lo, temp, out_reg_lo); in GenHighestOneBit() local
2027 __ Lsr(out, temp, out); in GenHighestOneBit() local
2506 __ Lsr(out, out, WhichPowerOf2(out.GetSizeInBits())); in VisitReferenceRefersTo() local
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| H A D | code_generator_arm64.cc | 1635 __ Lsr(temp, object, gc::accounting::CardTable::kCardShift); in MarkGCCard() local
1660 __ Lsr(temp, object, gc::accounting::CardTable::kCardShift); in CheckGCCardIsValid() local
2584 __ Lsr(dst, lhs, shift_value); in HandleShift() local
2594 __ Lsr(dst, lhs, rhs_reg); in HandleShift() local
3011 __ Lsr(out.W(), out.W(), 1u); in VisitArrayLength() local
3604 __ Lsr(out, temp, shift); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant() local
3720 __ Lsr(out.X(), temp.X(), 32 + shift); in GenerateInt32DivRemWithAnyConstant() local
3722 __ Lsr(temp.X(), temp.X(), 32 + shift); in GenerateInt32DivRemWithAnyConstant() local
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| H A D | intrinsics_arm64.cc | 484 __ Lsr(dst, dst, temp); in GenHighestOneBit() local
2085 __ Lsr(temp0, temp3, 1u); in VisitStringCompareTo() local
2086 __ Lsr(temp1, temp2, 1u); in VisitStringCompareTo() local
2166 __ Lsr(temp2, temp2, temp1); in VisitStringCompareTo() local
2167 __ Lsr(temp4, temp4, temp1); in VisitStringCompareTo() local
2406 __ Lsr(temp, temp, 1u); // Extract length. in VisitStringEquals() local
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| /aosp_15_r20/external/vixl/test/aarch64/ |
| H A D | test-assembler-sve-aarch64.cc | 8533 __ Lsr(x1, x1, 1); in TEST_SVE() local
8542 __ Lsr(x2, x2, 2); in TEST_SVE() local
9527 __ Lsr(z29.VnD(), z28.VnD(), 1); // Shift right to 0x4000000040000000 in TEST_SVE() local
9532 __ Lsr(z29.VnD(), z29.VnD(), 1); // Shift right to 0x2000000020000000 in TEST_SVE() local
9537 __ Lsr(z29.VnD(), z29.VnD(), 1); // Shift right to 0x1000000010000000 in TEST_SVE() local
9721 __ Lsr(z29.VnD(), z28.VnD(), 1); // Shift right to 0x4000000040000000 in TEST_SVE() local
9726 __ Lsr(z29.VnD(), z29.VnD(), 1); // Shift right to 0x2000000020000000 in TEST_SVE() local
9731 __ Lsr(z29.VnD(), z29.VnD(), 1); // Shift right to 0x1000000010000000 in TEST_SVE() local
9898 __ Lsr(zn, zn, shift); in GatherLoadScalarPlusVectorHelper() local
10423 __ Lsr(x1, x1, 1); in TEST_SVE() local
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| H A D | test-assembler-aarch64.cc | 6222 __ Lsr(x16, x0, x1); in TEST() local
6223 __ Lsr(x17, x0, x2); in TEST() local
6224 __ Lsr(x18, x0, x3); in TEST() local
6225 __ Lsr(x19, x0, x4); in TEST() local
6226 __ Lsr(x20, x0, x5); in TEST() local
6227 __ Lsr(x21, x0, x6); in TEST() local
6229 __ Lsr(w22, w0, w1); in TEST() local
6230 __ Lsr(w23, w0, w2); in TEST() local
6231 __ Lsr(w24, w0, w3); in TEST() local
6232 __ Lsr(w25, w0, w4); in TEST() local
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| H A D | test-utils-aarch64.cc | 974 __ Lsr(t2, t2, 4); in ComputeMachineStateHash() local
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| /aosp_15_r20/external/vixl/src/aarch64/ |
| H A D | macro-assembler-aarch64.h | 2032 void Lsr(const Register& rd, const Register& rn, unsigned shift) { in Lsr() function
2039 void Lsr(const Register& rd, const Register& rn, const Register& rm) { in Lsr() function
5255 void Lsr(const ZRegister& zd, in Lsr() function
5267 void Lsr(const ZRegister& zd, const ZRegister& zn, int shift) { in Lsr() function
5272 void Lsr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Lsr() function
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.h | 398 Lsr, enumerator
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| /aosp_15_r20/external/vixl/test/aarch32/ |
| H A D | test-assembler-aarch32.cc | 784 __ Lsr(r4, r1, 8); in TEST() local
810 __ Lsr(r4, r1, r9); in TEST() local
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| /aosp_15_r20/external/vixl/src/aarch32/ |
| H A D | macro-assembler-aarch32.h | 2321 void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) { in Lsr() function
2338 void Lsr(Register rd, Register rm, const Operand& operand) { in Lsr() function
2341 void Lsr(FlagsUpdate flags, in Lsr() function
2367 void Lsr(FlagsUpdate flags, in Lsr() function
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