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Searched defs:MISC_DQO1_DQO1_RO (Results 1 – 3 of 3) sorted by relevance

/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8192/include/
H A Dddrphy_nao_reg.h225 #define MISC_DQO1_DQO1_RO GENMASK(31, 0) macro
H A DMargaux_Register_DDRPHY_NAO.h265 #define MISC_DQO1_DQO1_RO Fld(32, 0) //[31:0] macro
/aosp_15_r20/external/coreboot/src/vendorcode/mediatek/mt8195/include/
H A D8195_Register_DDRPHY_NAO.h265 #define MISC_DQO1_DQO1_RO Fld(32, 0) //[31:0] macro