1 /*
2 * Copyright (c) 2017-2018, Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 //!
23 //! \file codechal_encode_vp8.cpp
24 //! \brief Defines base class for VP8 dual-pipe encoder.
25 //!
26 #include "codechal_encode_vp8.h"
27 #include "codechal_mmc_encode_vp8.h"
28 #if USE_CODECHAL_DEBUG_TOOL
29 #include "codechal_debug.h"
30 #endif
31
32 #define ENCODE_VP8_BRC_HISTORY_BUFFER_SIZE 704
33
34 static uint16_t PakQPInputTable[160 * 18] =
35 {
36 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
37 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
38 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
39 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
40 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
41 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
42 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
43 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
44 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
45 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
46 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
47 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
48 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
49 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
50 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
51 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
52 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x4000, 0x0004, 0x0010, 0x4000, 0x0004, 0x0010,
53 0x3333, 0x0005, 0x0010, 0x3333, 0x0005, 0x0010, 0x2000, 0x0008, 0x0010, 0x1999, 0x000a, 0x0010, 0x3333, 0x0005, 0x0010, 0x3333, 0x0005, 0x0010,
54 0x2aaa, 0x0006, 0x0010, 0x2aaa, 0x0006, 0x0010, 0x1c71, 0x0009, 0x0010, 0x1555, 0x000c, 0x0010, 0x2aaa, 0x0006, 0x0010, 0x2aaa, 0x0006, 0x0010,
55 0x2492, 0x0007, 0x0010, 0x2492, 0x0007, 0x0010, 0x1999, 0x000a, 0x0010, 0x1249, 0x000e, 0x0010, 0x2492, 0x0007, 0x0010, 0x2492, 0x0007, 0x0010,
56 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010, 0x1555, 0x000c, 0x0010, 0x1000, 0x0010, 0x0010, 0x2000, 0x0008, 0x0010, 0x2000, 0x0008, 0x0010,
57 0x1c71, 0x0009, 0x0010, 0x1c71, 0x0009, 0x0010, 0x13b1, 0x000d, 0x0010, 0x0e38, 0x0012, 0x0010, 0x1c71, 0x0009, 0x0010, 0x1c71, 0x0009, 0x0010,
58 0x1999, 0x000a, 0x0010, 0x1999, 0x000a, 0x0010, 0x1111, 0x000f, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x1999, 0x000a, 0x0010, 0x1999, 0x000a, 0x0010,
59 0x1745, 0x000b, 0x0010, 0x1999, 0x000a, 0x0010, 0x0f0f, 0x0011, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x1745, 0x000b, 0x0010, 0x1999, 0x000a, 0x0010,
60 0x1555, 0x000c, 0x0010, 0x1745, 0x000b, 0x0010, 0x0e38, 0x0012, 0x0010, 0x0ba2, 0x0016, 0x0010, 0x1555, 0x000c, 0x0010, 0x1745, 0x000b, 0x0010,
61 0x13b1, 0x000d, 0x0010, 0x1555, 0x000c, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x0aaa, 0x0018, 0x0010, 0x13b1, 0x000d, 0x0010, 0x1555, 0x000c, 0x0010,
62 0x1249, 0x000e, 0x0010, 0x13b1, 0x000d, 0x0010, 0x0c30, 0x0015, 0x0010, 0x09d8, 0x001a, 0x0010, 0x1249, 0x000e, 0x0010, 0x13b1, 0x000d, 0x0010,
63 0x1111, 0x000f, 0x0010, 0x1249, 0x000e, 0x0010, 0x0b21, 0x0017, 0x0010, 0x0924, 0x001c, 0x0010, 0x1111, 0x000f, 0x0010, 0x1249, 0x000e, 0x0010,
64 0x1000, 0x0010, 0x0010, 0x1111, 0x000f, 0x0010, 0x0aaa, 0x0018, 0x0010, 0x0888, 0x001e, 0x0010, 0x1000, 0x0010, 0x0010, 0x1111, 0x000f, 0x0010,
65 0x0f0f, 0x0011, 0x0010, 0x1000, 0x0010, 0x0010, 0x09d8, 0x001a, 0x0010, 0x0800, 0x0020, 0x0010, 0x0f0f, 0x0011, 0x0010, 0x1000, 0x0010, 0x0010,
66 0x0e38, 0x0012, 0x0010, 0x0f0f, 0x0011, 0x0010, 0x097b, 0x001b, 0x0010, 0x0787, 0x0022, 0x0010, 0x0e38, 0x0012, 0x0010, 0x0f0f, 0x0011, 0x0010,
67 0x0d79, 0x0013, 0x0010, 0x0f0f, 0x0011, 0x0010, 0x08d3, 0x001d, 0x0010, 0x0787, 0x0022, 0x0010, 0x0d79, 0x0013, 0x0010, 0x0f0f, 0x0011, 0x0010,
68 0x0ccc, 0x0014, 0x0010, 0x0e38, 0x0012, 0x0010, 0x0842, 0x001f, 0x0010, 0x071c, 0x0024, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x0e38, 0x0012, 0x0010,
69 0x0c30, 0x0015, 0x0010, 0x0d79, 0x0013, 0x0010, 0x0800, 0x0020, 0x0010, 0x06bc, 0x0026, 0x0010, 0x0c30, 0x0015, 0x0010, 0x0d79, 0x0013, 0x0010,
70 0x0ba2, 0x0016, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x0787, 0x0022, 0x0010, 0x0666, 0x0028, 0x0010, 0x0ba2, 0x0016, 0x0010, 0x0ccc, 0x0014, 0x0010,
71 0x0b21, 0x0017, 0x0010, 0x0ccc, 0x0014, 0x0010, 0x0750, 0x0023, 0x0010, 0x0666, 0x0028, 0x0010, 0x0b21, 0x0017, 0x0010, 0x0ccc, 0x0014, 0x0010,
72 0x0aaa, 0x0018, 0x0010, 0x0c30, 0x0015, 0x0010, 0x06eb, 0x0025, 0x0010, 0x0618, 0x002a, 0x0010, 0x0aaa, 0x0018, 0x0010, 0x0c30, 0x0015, 0x0010,
73 0x0a3d, 0x0019, 0x0010, 0x0c30, 0x0015, 0x0010, 0x06bc, 0x0026, 0x0010, 0x0618, 0x002a, 0x0010, 0x0a3d, 0x0019, 0x0010, 0x0c30, 0x0015, 0x0010,
74 0x09d8, 0x001a, 0x0010, 0x0ba2, 0x0016, 0x0010, 0x0666, 0x0028, 0x0010, 0x05d1, 0x002c, 0x0010, 0x09d8, 0x001a, 0x0010, 0x0ba2, 0x0016, 0x0010,
75 0x097b, 0x001b, 0x0010, 0x0ba2, 0x0016, 0x0010, 0x063e, 0x0029, 0x0010, 0x05d1, 0x002c, 0x0010, 0x097b, 0x001b, 0x0010, 0x0ba2, 0x0016, 0x0010,
76 0x0924, 0x001c, 0x0010, 0x0b21, 0x0017, 0x0010, 0x05f4, 0x002b, 0x0010, 0x0590, 0x002e, 0x0010, 0x0924, 0x001c, 0x0010, 0x0b21, 0x0017, 0x0010,
77 0x08d3, 0x001d, 0x0010, 0x0b21, 0x0017, 0x0010, 0x05d1, 0x002c, 0x0010, 0x0590, 0x002e, 0x0010, 0x08d3, 0x001d, 0x0010, 0x0b21, 0x0017, 0x0010,
78 0x0888, 0x001e, 0x0010, 0x0aaa, 0x0018, 0x0010, 0x0590, 0x002e, 0x0010, 0x0555, 0x0030, 0x0010, 0x0888, 0x001e, 0x0010, 0x0aaa, 0x0018, 0x0010,
79 0x0842, 0x001f, 0x0010, 0x0a3d, 0x0019, 0x0010, 0x0555, 0x0030, 0x0010, 0x051e, 0x0032, 0x0010, 0x0842, 0x001f, 0x0010, 0x0a3d, 0x0019, 0x0010,
80 0x0800, 0x0020, 0x0010, 0x0a3d, 0x0019, 0x0010, 0x0539, 0x0031, 0x0010, 0x051e, 0x0032, 0x0010, 0x0800, 0x0020, 0x0010, 0x0a3d, 0x0019, 0x0010,
81 0x07c1, 0x0021, 0x0010, 0x09d8, 0x001a, 0x0010, 0x0505, 0x0033, 0x0010, 0x04ec, 0x0034, 0x0010, 0x07c1, 0x0021, 0x0010, 0x09d8, 0x001a, 0x0010,
82 0x0787, 0x0022, 0x0010, 0x097b, 0x001b, 0x0010, 0x04ec, 0x0034, 0x0010, 0x04bd, 0x0036, 0x0010, 0x0787, 0x0022, 0x0010, 0x097b, 0x001b, 0x0010,
83 0x0750, 0x0023, 0x0010, 0x0924, 0x001c, 0x0010, 0x04bd, 0x0036, 0x0010, 0x0492, 0x0038, 0x0010, 0x0750, 0x0023, 0x0010, 0x0924, 0x001c, 0x0010,
84 0x071c, 0x0024, 0x0010, 0x08d3, 0x001d, 0x0010, 0x04a7, 0x0037, 0x0010, 0x0469, 0x003a, 0x0010, 0x071c, 0x0024, 0x0010, 0x08d3, 0x001d, 0x0010,
85 0x06eb, 0x0025, 0x0010, 0x0888, 0x001e, 0x0010, 0x047d, 0x0039, 0x0010, 0x0444, 0x003c, 0x0010, 0x06eb, 0x0025, 0x0010, 0x0888, 0x001e, 0x0010,
86 0x06bc, 0x0026, 0x0010, 0x0842, 0x001f, 0x0010, 0x0469, 0x003a, 0x0010, 0x0421, 0x003e, 0x0010, 0x06bc, 0x0026, 0x0010, 0x0842, 0x001f, 0x0010,
87 0x0690, 0x0027, 0x0010, 0x0800, 0x0020, 0x0010, 0x0444, 0x003c, 0x0010, 0x0400, 0x0040, 0x0010, 0x0690, 0x0027, 0x0010, 0x0800, 0x0020, 0x0010,
88 0x0666, 0x0028, 0x0010, 0x07c1, 0x0021, 0x0010, 0x0421, 0x003e, 0x0010, 0x03e0, 0x0042, 0x0010, 0x0666, 0x0028, 0x0010, 0x07c1, 0x0021, 0x0010,
89 0x063e, 0x0029, 0x0010, 0x0787, 0x0022, 0x0010, 0x0410, 0x003f, 0x0010, 0x03c3, 0x0044, 0x0010, 0x063e, 0x0029, 0x0010, 0x0787, 0x0022, 0x0010,
90 0x0618, 0x002a, 0x0010, 0x0750, 0x0023, 0x0010, 0x03f0, 0x0041, 0x0010, 0x03a8, 0x0046, 0x0010, 0x0618, 0x002a, 0x0010, 0x0750, 0x0023, 0x0010,
91 0x05f4, 0x002b, 0x0010, 0x071c, 0x0024, 0x0010, 0x03e0, 0x0042, 0x0010, 0x038e, 0x0048, 0x0010, 0x05f4, 0x002b, 0x0010, 0x071c, 0x0024, 0x0010,
92 0x05d1, 0x002c, 0x0010, 0x06eb, 0x0025, 0x0010, 0x03c3, 0x0044, 0x0010, 0x0375, 0x004a, 0x0010, 0x05d1, 0x002c, 0x0010, 0x06eb, 0x0025, 0x0010,
93 0x05b0, 0x002d, 0x0010, 0x06eb, 0x0025, 0x0010, 0x03b5, 0x0045, 0x0010, 0x0375, 0x004a, 0x0010, 0x05b0, 0x002d, 0x0010, 0x06eb, 0x0025, 0x0010,
94 0x0590, 0x002e, 0x0010, 0x06bc, 0x0026, 0x0010, 0x039b, 0x0047, 0x0010, 0x035e, 0x004c, 0x0010, 0x0590, 0x002e, 0x0010, 0x06bc, 0x0026, 0x0010,
95 0x0572, 0x002f, 0x0010, 0x0690, 0x0027, 0x0010, 0x038e, 0x0048, 0x0010, 0x0348, 0x004e, 0x0010, 0x0572, 0x002f, 0x0010, 0x0690, 0x0027, 0x0010,
96 0x0555, 0x0030, 0x0010, 0x0666, 0x0028, 0x0010, 0x0375, 0x004a, 0x0010, 0x0333, 0x0050, 0x0010, 0x0555, 0x0030, 0x0010, 0x0666, 0x0028, 0x0010,
97 0x0539, 0x0031, 0x0010, 0x063e, 0x0029, 0x0010, 0x0369, 0x004b, 0x0010, 0x031f, 0x0052, 0x0010, 0x0539, 0x0031, 0x0010, 0x063e, 0x0029, 0x0010,
98 0x051e, 0x0032, 0x0010, 0x0618, 0x002a, 0x0010, 0x0353, 0x004d, 0x0010, 0x030c, 0x0054, 0x0010, 0x051e, 0x0032, 0x0010, 0x0618, 0x002a, 0x0010,
99 0x0505, 0x0033, 0x0010, 0x05f4, 0x002b, 0x0010, 0x033d, 0x004f, 0x0010, 0x02fa, 0x0056, 0x0010, 0x0505, 0x0033, 0x0010, 0x05f4, 0x002b, 0x0010,
100 0x04ec, 0x0034, 0x0010, 0x05d1, 0x002c, 0x0010, 0x0333, 0x0050, 0x0010, 0x02e8, 0x0058, 0x0010, 0x04ec, 0x0034, 0x0010, 0x05d1, 0x002c, 0x0010,
101 0x04d4, 0x0035, 0x0010, 0x05b0, 0x002d, 0x0010, 0x031f, 0x0052, 0x0010, 0x02d8, 0x005a, 0x0010, 0x04d4, 0x0035, 0x0010, 0x05b0, 0x002d, 0x0010,
102 0x04bd, 0x0036, 0x0010, 0x0590, 0x002e, 0x0010, 0x0315, 0x0053, 0x0010, 0x02c8, 0x005c, 0x0010, 0x04bd, 0x0036, 0x0010, 0x0590, 0x002e, 0x0010,
103 0x04a7, 0x0037, 0x0010, 0x0590, 0x002e, 0x0010, 0x0303, 0x0055, 0x0010, 0x02c8, 0x005c, 0x0010, 0x04a7, 0x0037, 0x0010, 0x0590, 0x002e, 0x0010,
104 0x0492, 0x0038, 0x0010, 0x0572, 0x002f, 0x0010, 0x02fa, 0x0056, 0x0010, 0x02b9, 0x005e, 0x0010, 0x0492, 0x0038, 0x0010, 0x0572, 0x002f, 0x0010,
105 0x047d, 0x0039, 0x0010, 0x0555, 0x0030, 0x0010, 0x02e8, 0x0058, 0x0010, 0x02aa, 0x0060, 0x0010, 0x047d, 0x0039, 0x0010, 0x0555, 0x0030, 0x0010,
106 0x0469, 0x003a, 0x0010, 0x0539, 0x0031, 0x0010, 0x02e0, 0x0059, 0x0010, 0x029c, 0x0062, 0x0010, 0x0469, 0x003a, 0x0010, 0x0539, 0x0031, 0x0010,
107 0x0444, 0x003c, 0x0010, 0x051e, 0x0032, 0x0010, 0x02c0, 0x005d, 0x0010, 0x028f, 0x0064, 0x0010, 0x0444, 0x003c, 0x0010, 0x051e, 0x0032, 0x0010,
108 0x0421, 0x003e, 0x0010, 0x0505, 0x0033, 0x0010, 0x02aa, 0x0060, 0x0010, 0x0282, 0x0066, 0x0010, 0x0421, 0x003e, 0x0010, 0x0505, 0x0033, 0x0010,
109 0x0400, 0x0040, 0x0010, 0x04ec, 0x0034, 0x0010, 0x0295, 0x0063, 0x0010, 0x0276, 0x0068, 0x0010, 0x0400, 0x0040, 0x0010, 0x04ec, 0x0034, 0x0010,
110 0x03e0, 0x0042, 0x0010, 0x04d4, 0x0035, 0x0010, 0x0282, 0x0066, 0x0010, 0x026a, 0x006a, 0x0010, 0x03e0, 0x0042, 0x0010, 0x04d4, 0x0035, 0x0010,
111 0x03c3, 0x0044, 0x0010, 0x04bd, 0x0036, 0x0010, 0x0270, 0x0069, 0x0010, 0x025e, 0x006c, 0x0010, 0x03c3, 0x0044, 0x0010, 0x04bd, 0x0036, 0x0010,
112 0x03a8, 0x0046, 0x0010, 0x04a7, 0x0037, 0x0010, 0x025e, 0x006c, 0x0010, 0x0253, 0x006e, 0x0010, 0x03a8, 0x0046, 0x0010, 0x04a7, 0x0037, 0x0010,
113 0x038e, 0x0048, 0x0010, 0x0492, 0x0038, 0x0010, 0x024e, 0x006f, 0x0010, 0x0249, 0x0070, 0x0010, 0x038e, 0x0048, 0x0010, 0x0492, 0x0038, 0x0010,
114 0x0375, 0x004a, 0x0010, 0x047d, 0x0039, 0x0010, 0x023e, 0x0072, 0x0010, 0x023e, 0x0072, 0x0010, 0x0375, 0x004a, 0x0010, 0x047d, 0x0039, 0x0010,
115 0x035e, 0x004c, 0x0010, 0x0469, 0x003a, 0x0010, 0x0230, 0x0075, 0x0010, 0x0234, 0x0074, 0x0010, 0x035e, 0x004c, 0x0010, 0x0469, 0x003a, 0x0010,
116 0x0348, 0x004e, 0x0010, 0x0456, 0x003b, 0x0010, 0x0222, 0x0078, 0x0010, 0x022b, 0x0076, 0x0010, 0x0348, 0x004e, 0x0010, 0x0456, 0x003b, 0x0010,
117 0x0333, 0x0050, 0x0010, 0x0444, 0x003c, 0x0010, 0x0210, 0x007c, 0x0010, 0x0222, 0x0078, 0x0010, 0x0333, 0x0050, 0x0010, 0x0444, 0x003c, 0x0010,
118 0x031f, 0x0052, 0x0010, 0x0432, 0x003d, 0x0010, 0x0204, 0x007f, 0x0010, 0x0219, 0x007a, 0x0010, 0x031f, 0x0052, 0x0010, 0x0432, 0x003d, 0x0010,
119 0x030c, 0x0054, 0x0010, 0x0421, 0x003e, 0x0010, 0x01f8, 0x0082, 0x0010, 0x0210, 0x007c, 0x0010, 0x030c, 0x0054, 0x0010, 0x0421, 0x003e, 0x0010,
120 0x02fa, 0x0056, 0x0010, 0x0410, 0x003f, 0x0010, 0x01ec, 0x0085, 0x0010, 0x0208, 0x007e, 0x0010, 0x02fa, 0x0056, 0x0010, 0x0410, 0x003f, 0x0010,
121 0x02e8, 0x0058, 0x0010, 0x0400, 0x0040, 0x0010, 0x01e1, 0x0088, 0x0010, 0x0200, 0x0080, 0x0010, 0x02e8, 0x0058, 0x0010, 0x0400, 0x0040, 0x0010,
122 0x02d8, 0x005a, 0x0010, 0x03f0, 0x0041, 0x0010, 0x01d7, 0x008b, 0x0010, 0x01f8, 0x0082, 0x0010, 0x02d8, 0x005a, 0x0010, 0x03f0, 0x0041, 0x0010,
123 0x02c8, 0x005c, 0x0010, 0x03e0, 0x0042, 0x0010, 0x01cd, 0x008e, 0x0010, 0x01f0, 0x0084, 0x0010, 0x02c8, 0x005c, 0x0010, 0x03e0, 0x0042, 0x0010,
124 0x02b9, 0x005e, 0x0010, 0x03d2, 0x0043, 0x0010, 0x01c3, 0x0091, 0x0010, 0x01e9, 0x0086, 0x0010, 0x02b9, 0x005e, 0x0010, 0x03d2, 0x0043, 0x0010,
125 0x02aa, 0x0060, 0x0010, 0x03c3, 0x0044, 0x0010, 0x01ba, 0x0094, 0x0010, 0x01e1, 0x0088, 0x0010, 0x02aa, 0x0060, 0x0010, 0x03c3, 0x0044, 0x0010,
126 0x029c, 0x0062, 0x0010, 0x03b5, 0x0045, 0x0010, 0x01b2, 0x0097, 0x0010, 0x01da, 0x008a, 0x0010, 0x029c, 0x0062, 0x0010, 0x03b5, 0x0045, 0x0010,
127 0x028f, 0x0064, 0x0010, 0x03a8, 0x0046, 0x0010, 0x01a6, 0x009b, 0x0010, 0x01d4, 0x008c, 0x0010, 0x028f, 0x0064, 0x0010, 0x03a8, 0x0046, 0x0010,
128 0x0282, 0x0066, 0x0010, 0x039b, 0x0047, 0x0010, 0x019e, 0x009e, 0x0010, 0x01cd, 0x008e, 0x0010, 0x0282, 0x0066, 0x0010, 0x039b, 0x0047, 0x0010,
129 0x0276, 0x0068, 0x0010, 0x038e, 0x0048, 0x0010, 0x0197, 0x00a1, 0x0010, 0x01c7, 0x0090, 0x0010, 0x0276, 0x0068, 0x0010, 0x038e, 0x0048, 0x0010,
130 0x026a, 0x006a, 0x0010, 0x0381, 0x0049, 0x0010, 0x018f, 0x00a4, 0x0010, 0x01c0, 0x0092, 0x0010, 0x026a, 0x006a, 0x0010, 0x0381, 0x0049, 0x0010,
131 0x025e, 0x006c, 0x0010, 0x0375, 0x004a, 0x0010, 0x0188, 0x00a7, 0x0010, 0x01ba, 0x0094, 0x0010, 0x025e, 0x006c, 0x0010, 0x0375, 0x004a, 0x0010,
132 0x0253, 0x006e, 0x0010, 0x0369, 0x004b, 0x0010, 0x0181, 0x00aa, 0x0010, 0x01b4, 0x0096, 0x0010, 0x0253, 0x006e, 0x0010, 0x0369, 0x004b, 0x0010,
133 0x0249, 0x0070, 0x0010, 0x035e, 0x004c, 0x0010, 0x017a, 0x00ad, 0x0010, 0x01af, 0x0098, 0x0010, 0x0249, 0x0070, 0x0010, 0x035e, 0x004c, 0x0010,
134 0x023e, 0x0072, 0x0010, 0x035e, 0x004c, 0x0010, 0x0174, 0x00b0, 0x0010, 0x01af, 0x0098, 0x0010, 0x023e, 0x0072, 0x0010, 0x035e, 0x004c, 0x0010,
135 0x0234, 0x0074, 0x0010, 0x0353, 0x004d, 0x0010, 0x016e, 0x00b3, 0x0010, 0x01a9, 0x009a, 0x0010, 0x0234, 0x0074, 0x0010, 0x0353, 0x004d, 0x0010,
136 0x0226, 0x0077, 0x0010, 0x0348, 0x004e, 0x0010, 0x0164, 0x00b8, 0x0010, 0x01a4, 0x009c, 0x0010, 0x0226, 0x0077, 0x0010, 0x0348, 0x004e, 0x0010,
137 0x0219, 0x007a, 0x0010, 0x033d, 0x004f, 0x0010, 0x015a, 0x00bd, 0x0010, 0x019e, 0x009e, 0x0010, 0x0219, 0x007a, 0x0010, 0x033d, 0x004f, 0x0010,
138 0x020c, 0x007d, 0x0010, 0x0333, 0x0050, 0x0010, 0x0153, 0x00c1, 0x0010, 0x0199, 0x00a0, 0x0010, 0x020c, 0x007d, 0x0010, 0x0333, 0x0050, 0x0010,
139 0x0200, 0x0080, 0x0010, 0x0329, 0x0051, 0x0010, 0x014a, 0x00c6, 0x0010, 0x0194, 0x00a2, 0x0010, 0x0200, 0x0080, 0x0010, 0x0329, 0x0051, 0x0010,
140 0x01f4, 0x0083, 0x0010, 0x031f, 0x0052, 0x0010, 0x0142, 0x00cb, 0x0010, 0x018f, 0x00a4, 0x0010, 0x01f4, 0x0083, 0x0010, 0x031f, 0x0052, 0x0010,
141 0x01e9, 0x0086, 0x0010, 0x0315, 0x0053, 0x0010, 0x013c, 0x00cf, 0x0010, 0x018a, 0x00a6, 0x0010, 0x01e9, 0x0086, 0x0010, 0x0315, 0x0053, 0x0010,
142 0x01de, 0x0089, 0x0010, 0x030c, 0x0054, 0x0010, 0x0135, 0x00d4, 0x0010, 0x0186, 0x00a8, 0x0010, 0x01de, 0x0089, 0x0010, 0x030c, 0x0054, 0x0010,
143 0x01d4, 0x008c, 0x0010, 0x0303, 0x0055, 0x0010, 0x012e, 0x00d9, 0x0010, 0x0181, 0x00aa, 0x0010, 0x01d4, 0x008c, 0x0010, 0x0303, 0x0055, 0x0010,
144 0x01ca, 0x008f, 0x0010, 0x02fa, 0x0056, 0x0010, 0x0128, 0x00dd, 0x0010, 0x017d, 0x00ac, 0x0010, 0x01ca, 0x008f, 0x0010, 0x02fa, 0x0056, 0x0010,
145 0x01c0, 0x0092, 0x0010, 0x02f1, 0x0057, 0x0010, 0x0121, 0x00e2, 0x0010, 0x0178, 0x00ae, 0x0010, 0x01c0, 0x0092, 0x0010, 0x02f1, 0x0057, 0x0010,
146 0x01b7, 0x0095, 0x0010, 0x02e8, 0x0058, 0x0010, 0x011c, 0x00e6, 0x0010, 0x0174, 0x00b0, 0x0010, 0x01b7, 0x0095, 0x0010, 0x02e8, 0x0058, 0x0010,
147 0x01af, 0x0098, 0x0010, 0x02e0, 0x0059, 0x0010, 0x0116, 0x00eb, 0x0010, 0x0170, 0x00b2, 0x0010, 0x01af, 0x0098, 0x0010, 0x02e0, 0x0059, 0x0010,
148 0x01a6, 0x009b, 0x0010, 0x02d0, 0x005b, 0x0010, 0x0111, 0x00f0, 0x0010, 0x0168, 0x00b6, 0x0010, 0x01a6, 0x009b, 0x0010, 0x02d0, 0x005b, 0x0010,
149 0x019e, 0x009e, 0x0010, 0x02c0, 0x005d, 0x0010, 0x010c, 0x00f4, 0x0010, 0x0160, 0x00ba, 0x0010, 0x019e, 0x009e, 0x0010, 0x02c0, 0x005d, 0x0010,
150 0x0197, 0x00a1, 0x0010, 0x02b1, 0x005f, 0x0010, 0x0107, 0x00f9, 0x0010, 0x0158, 0x00be, 0x0010, 0x0197, 0x00a1, 0x0010, 0x02b1, 0x005f, 0x0010,
151 0x018f, 0x00a4, 0x0010, 0x02aa, 0x0060, 0x0010, 0x0102, 0x00fe, 0x0010, 0x0155, 0x00c0, 0x0010, 0x018f, 0x00a4, 0x0010, 0x02aa, 0x0060, 0x0010,
152 0x0188, 0x00a7, 0x0010, 0x029c, 0x0062, 0x0010, 0x00fe, 0x0102, 0x0010, 0x014e, 0x00c4, 0x0010, 0x0188, 0x00a7, 0x0010, 0x029c, 0x0062, 0x0010,
153 0x0181, 0x00aa, 0x0010, 0x028f, 0x0064, 0x0010, 0x00f9, 0x0107, 0x0010, 0x0147, 0x00c8, 0x0010, 0x0181, 0x00aa, 0x0010, 0x028f, 0x0064, 0x0010,
154 0x017a, 0x00ad, 0x0010, 0x0288, 0x0065, 0x0010, 0x00f4, 0x010c, 0x0010, 0x0144, 0x00ca, 0x0010, 0x017a, 0x00ad, 0x0010, 0x0288, 0x0065, 0x0010,
155 0x0172, 0x00b1, 0x0010, 0x0282, 0x0066, 0x0010, 0x00ef, 0x0112, 0x0010, 0x0141, 0x00cc, 0x0010, 0x0172, 0x00b1, 0x0010, 0x0282, 0x0066, 0x0010,
156 0x016a, 0x00b5, 0x0010, 0x0276, 0x0068, 0x0010, 0x00ea, 0x0118, 0x0010, 0x013b, 0x00d0, 0x0010, 0x016a, 0x00b5, 0x0010, 0x0276, 0x0068, 0x0010,
157 0x0162, 0x00b9, 0x0010, 0x026a, 0x006a, 0x0010, 0x00e5, 0x011e, 0x0010, 0x0135, 0x00d4, 0x0010, 0x0162, 0x00b9, 0x0010, 0x026a, 0x006a, 0x0010,
158 0x015a, 0x00bd, 0x0010, 0x025e, 0x006c, 0x0010, 0x00e0, 0x0124, 0x0010, 0x012f, 0x00d8, 0x0010, 0x015a, 0x00bd, 0x0010, 0x025e, 0x006c, 0x0010,
159 0x0153, 0x00c1, 0x0010, 0x0253, 0x006e, 0x0010, 0x00db, 0x012b, 0x0010, 0x0129, 0x00dc, 0x0010, 0x0153, 0x00c1, 0x0010, 0x0253, 0x006e, 0x0010,
160 0x014c, 0x00c5, 0x0010, 0x0249, 0x0070, 0x0010, 0x00d6, 0x0131, 0x0010, 0x0124, 0x00e0, 0x0010, 0x014c, 0x00c5, 0x0010, 0x0249, 0x0070, 0x0010,
161 0x0146, 0x00c9, 0x0010, 0x023e, 0x0072, 0x0010, 0x00d2, 0x0137, 0x0010, 0x011f, 0x00e4, 0x0010, 0x0146, 0x00c9, 0x0010, 0x023e, 0x0072, 0x0010,
162 0x013f, 0x00cd, 0x0010, 0x0234, 0x0074, 0x0010, 0x00ce, 0x013d, 0x0010, 0x011a, 0x00e8, 0x0010, 0x013f, 0x00cd, 0x0010, 0x0234, 0x0074, 0x0010,
163 0x0139, 0x00d1, 0x0010, 0x022b, 0x0076, 0x0010, 0x00ca, 0x0143, 0x0010, 0x0115, 0x00ec, 0x0010, 0x0139, 0x00d1, 0x0010, 0x022b, 0x0076, 0x0010,
164 0x0133, 0x00d5, 0x0010, 0x0219, 0x007a, 0x0010, 0x00c6, 0x014a, 0x0010, 0x010c, 0x00f4, 0x0010, 0x0133, 0x00d5, 0x0010, 0x0219, 0x007a, 0x0010,
165 0x012e, 0x00d9, 0x0010, 0x0210, 0x007c, 0x0010, 0x00c3, 0x0150, 0x0010, 0x0108, 0x00f8, 0x0010, 0x012e, 0x00d9, 0x0010, 0x0210, 0x007c, 0x0010,
166 0x0128, 0x00dd, 0x0010, 0x0208, 0x007e, 0x0010, 0x00bf, 0x0156, 0x0010, 0x0104, 0x00fc, 0x0010, 0x0128, 0x00dd, 0x0010, 0x0208, 0x007e, 0x0010,
167 0x0123, 0x00e1, 0x0010, 0x0200, 0x0080, 0x0010, 0x00bc, 0x015c, 0x0010, 0x0100, 0x0100, 0x0010, 0x0123, 0x00e1, 0x0010, 0x0200, 0x0080, 0x0010,
168 0x011e, 0x00e5, 0x0010, 0x01f8, 0x0082, 0x0010, 0x00b9, 0x0162, 0x0010, 0x00fc, 0x0104, 0x0010, 0x011e, 0x00e5, 0x0010, 0x01f8, 0x0082, 0x0010,
169 0x0118, 0x00ea, 0x0010, 0x01f0, 0x0084, 0x0010, 0x00b5, 0x016a, 0x0010, 0x00f8, 0x0108, 0x0010, 0x0118, 0x00ea, 0x0010, 0x01f0, 0x0084, 0x0010,
170 0x0112, 0x00ef, 0x0010, 0x01e9, 0x0086, 0x0010, 0x00b1, 0x0172, 0x0010, 0x00f4, 0x010c, 0x0010, 0x0112, 0x00ef, 0x0010, 0x01f0, 0x0084, 0x0010,
171 0x010b, 0x00f5, 0x0010, 0x01e1, 0x0088, 0x0010, 0x00ac, 0x017b, 0x0010, 0x00f0, 0x0110, 0x0010, 0x010b, 0x00f5, 0x0010, 0x01f0, 0x0084, 0x0010,
172 0x0107, 0x00f9, 0x0010, 0x01da, 0x008a, 0x0010, 0x00aa, 0x0181, 0x0010, 0x00ed, 0x0114, 0x0010, 0x0107, 0x00f9, 0x0010, 0x01f0, 0x0084, 0x0010,
173 0x0102, 0x00fe, 0x0010, 0x01d4, 0x008c, 0x0010, 0x00a6, 0x0189, 0x0010, 0x00ea, 0x0118, 0x0010, 0x0102, 0x00fe, 0x0010, 0x01f0, 0x0084, 0x0010,
174 0x00fd, 0x0103, 0x0010, 0x01ca, 0x008f, 0x0010, 0x00a3, 0x0191, 0x0010, 0x00e5, 0x011e, 0x0010, 0x00fd, 0x0103, 0x0010, 0x01f0, 0x0084, 0x0010,
175 0x00f8, 0x0108, 0x0010, 0x01c3, 0x0091, 0x0010, 0x00a0, 0x0199, 0x0010, 0x00e1, 0x0122, 0x0010, 0x00f8, 0x0108, 0x0010, 0x01f0, 0x0084, 0x0010,
176 0x00f3, 0x010d, 0x0010, 0x01ba, 0x0094, 0x0010, 0x009d, 0x01a0, 0x0010, 0x00dd, 0x0128, 0x0010, 0x00f3, 0x010d, 0x0010, 0x01f0, 0x0084, 0x0010,
177 0x00ef, 0x0112, 0x0010, 0x01b2, 0x0097, 0x0010, 0x009a, 0x01a8, 0x0010, 0x00d9, 0x012e, 0x0010, 0x00ef, 0x0112, 0x0010, 0x01f0, 0x0084, 0x0010,
178 0x00ea, 0x0117, 0x0010, 0x01a9, 0x009a, 0x0010, 0x0097, 0x01b0, 0x0010, 0x00d4, 0x0134, 0x0010, 0x00ea, 0x0117, 0x0010, 0x01f0, 0x0084, 0x0010,
179 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
180 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
181 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
182 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
183 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
184 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
185 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
186 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
187 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
188 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
189 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
190 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
191 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
192 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
193 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
194 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010,
195 0x00e6, 0x011c, 0x0010, 0x01a1, 0x009d, 0x0010, 0x0094, 0x01b8, 0x0010, 0x00d0, 0x013a, 0x0010, 0x00e6, 0x011c, 0x0010, 0x01f0, 0x0084, 0x0010
196 };
197
InitMmcState()198 MOS_STATUS CodechalEncodeVp8::InitMmcState()
199 {
200 CODECHAL_ENCODE_FUNCTION_ENTER;
201 #ifdef _MMC_SUPPORTED
202 m_mmcState = MOS_New(CodechalMmcEncodeVp8, m_hwInterface, this);
203 CODECHAL_ENCODE_CHK_NULL_RETURN(m_mmcState);
204 #endif
205 return MOS_STATUS_SUCCESS;
206 }
207
CodechalEncodeVp8(CodechalHwInterface * hwInterface,CodechalDebugInterface * debugInterface,PCODECHAL_STANDARD_INFO standardInfo)208 CodechalEncodeVp8::CodechalEncodeVp8(
209 CodechalHwInterface* hwInterface,
210 CodechalDebugInterface* debugInterface,
211 PCODECHAL_STANDARD_INFO standardInfo) :
212 CodechalEncoderState(hwInterface, debugInterface, standardInfo)
213 {
214 CODECHAL_ENCODE_FUNCTION_ENTER;
215
216 CODECHAL_ENCODE_ASSERT(hwInterface);
217 m_hwInterface = hwInterface;
218 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetOsInterface());
219 m_osInterface = m_hwInterface->GetOsInterface();
220 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetMfxInterface());
221 m_mfxInterface = m_hwInterface->GetMfxInterface();
222 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetHcpInterface());
223 m_hcpInterface = m_hwInterface->GetHcpInterface();
224 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetHucInterface());
225 m_hucInterface = m_hwInterface->GetHucInterface();
226 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetVdencInterface());
227 m_vdencInterface = m_hwInterface->GetVdencInterface();
228 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetMiInterface());
229 m_miInterface = m_hwInterface->GetMiInterface();
230 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetRenderInterface());
231 CODECHAL_ENCODE_ASSERT(m_hwInterface->GetRenderInterface()->m_stateHeapInterface);
232 m_stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
233
234 m_vmeKernelDump = 1;
235
236 m_tpuKernelState = MHW_KERNEL_STATE();
237 m_mpuKernelState = MHW_KERNEL_STATE();
238 m_meKernelState = MHW_KERNEL_STATE();
239
240 for (uint8_t i = 0; i < CODECHAL_ENCODE_VP8_MBENC_IDX_NUM; i++)
241 {
242 m_mbEncKernelStates[i] = MHW_KERNEL_STATE();
243 }
244 for (uint8_t i = 0; i < CODECHAL_ENCODE_VP8_BRC_IDX_NUM; i++)
245 {
246 m_brcKernelStates[i] = MHW_KERNEL_STATE();
247 }
248
249 MOS_ZeroMemory(&m_picIdx, sizeof(m_picIdx));
250 MOS_ZeroMemory(&m_refList, sizeof(m_refList));
251 MOS_ZeroMemory(&m_s4XMemvDataBuffer, sizeof(m_s4XMemvDataBuffer));
252 MOS_ZeroMemory(&m_mbEncBindingTable, sizeof(m_mbEncBindingTable));
253 MOS_ZeroMemory(&m_s4XMeDistortionBuffer, sizeof(m_s4XMeDistortionBuffer));
254 MOS_ZeroMemory(&m_brcBuffers, sizeof(m_brcBuffers));
255
256 /* VP8 uses a CM based down scale kernel */
257 m_useCmScalingKernel = true;
258 m_interlacedFieldDisabled = true;
259 m_firstField = true;
260
261 /* No field pictures in VP8 */
262 m_verticalLineStride = CODECHAL_VLINESTRIDE_FRAME;
263 m_verticalLineStrideOffset = CODECHAL_VLINESTRIDEOFFSET_TOP_FIELD;
264
265 m_codecGetStatusReportDefined = true;
266
267 m_mbEncCurbeSetInBrcUpdate = false;
268 m_mpuCurbeSetInBrcUpdate = false;
269 m_tpuCurbeSetInBrcUpdate = false;
270 }
271
~CodechalEncodeVp8()272 CodechalEncodeVp8::~CodechalEncodeVp8()
273 {
274 FreeResources();
275 }
276
Initialize(CodechalSetting * codecHalSettings)277 MOS_STATUS CodechalEncodeVp8::Initialize(CodechalSetting * codecHalSettings)
278 {
279 MOS_STATUS status = MOS_STATUS_SUCCESS;
280
281 CODECHAL_ENCODE_FUNCTION_ENTER;
282
283 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncoderState::Initialize(codecHalSettings));
284
285 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
286 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
287 CODECHAL_ENCODE_CHK_NULL_RETURN(m_miInterface);
288 CODECHAL_ENCODE_CHK_NULL_RETURN(m_stateHeapInterface);
289
290 uint32_t numMBs = 0;
291
292 // MVOffset should be 4KB aligned
293 numMBs = m_picWidthInMb * m_picHeightInMb;
294 m_mvOffset = MOS_ALIGN_CEIL((((uint16_t)numMBs) * 16 * 4), CODECHAL_PAGE_SIZE); //for MB code
295 m_mbCodeSize = m_mvOffset + (numMBs * 16 * sizeof(uint32_t));
296
297 // for VP8: the Ds+Copy kernel is by default used to do CSC and copy non-aligned surface
298 m_cscDsState->EnableCopy();
299 m_cscDsState->EnableColor();
300
301 MOS_USER_FEATURE_VALUE_DATA UserFeatureData;
302 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
303
304 if (m_codecFunction != CODECHAL_FUNCTION_PAK)
305 {
306 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
307 MOS_UserFeature_ReadValue_ID(
308 nullptr,
309 __MEDIA_USER_FEATURE_VALUE_VP8_HW_SCOREBOARD_ENABLE_ID,
310 &UserFeatureData,
311 m_osInterface->pOsContext);
312 m_useHwScoreboard = (UserFeatureData.i32Data) ? true : false;
313
314 // HME enabled by default for VP8
315 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
316 MOS_UserFeature_ReadValue_ID(
317 nullptr,
318 __MEDIA_USER_FEATURE_VALUE_VP8_ENCODE_ME_ENABLE_ID,
319 &UserFeatureData,
320 m_osInterface->pOsContext);
321
322 m_hmeSupported = (UserFeatureData.i32Data) ? true : false;
323
324 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
325 MOS_UserFeature_ReadValue_ID(
326 nullptr,
327 __MEDIA_USER_FEATURE_VALUE_VP8_ENCODE_16xME_ENABLE_ID,
328 &UserFeatureData,
329 m_osInterface->pOsContext);
330
331 m_16xMeSupported = (UserFeatureData.i32Data) ? true : false;
332
333 // disable superHME when HME is disabled
334 if (m_hmeSupported == false)
335 {
336 m_16xMeSupported = false;
337 }
338
339 // Repak enabled by default for VP8
340 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
341 MOS_UserFeature_ReadValue_ID(
342 nullptr,
343 __MEDIA_USER_FEATURE_VALUE_VP8_ENCODE_REPAK_ENABLE_ID,
344 &UserFeatureData,
345 m_osInterface->pOsContext);
346 m_repakSupported = (UserFeatureData.i32Data) ? true : false;
347
348 // Adaptive RePAK enabled by default
349 m_adaptiveRepakSupported = true;
350 #if (_DEBUG || _RELEASE_INTERNAL)
351 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
352 MOS_UserFeature_ReadValue_ID(
353 nullptr,
354 __MEDIA_USER_FEATURE_VALUE_VP8_ENCODE_ADAPTIVE_REPAK_ENABLE_ID,
355 &UserFeatureData,
356 m_osInterface->pOsContext);
357 m_adaptiveRepakSupported = (UserFeatureData.i32Data) ? true : false;
358 #endif // _DEBUG || _RELEASE_INTERNAL
359
360 MOS_ZeroMemory(&UserFeatureData, sizeof(UserFeatureData));
361 MOS_UserFeature_ReadValue_ID(
362 nullptr,
363 __MEDIA_USER_FEATURE_VALUE_VP8_ENCODE_MULTIPASS_BRC_ENABLE_ID,
364 &UserFeatureData,
365 m_osInterface->pOsContext);
366 m_multipassBrcSupported = (UserFeatureData.i32Data) ? true : false;
367 }
368
369 m_brcInit = true;
370
371 MotionEstimationDisableCheck();
372
373 if (CodecHalUsesRenderEngine(m_codecFunction, m_standard))
374 {
375 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitKernelState());
376 }
377
378 if (m_singleTaskPhaseSupported)
379 {
380 m_maxBtCount = GetMaxBtCount();
381 }
382
383 // Picture Level Commands
384 m_hwInterface->GetMfxStateCommandsDataSize(
385 CODECHAL_ENCODE_MODE_MPEG2,
386 &m_pictureStatesSize,
387 &m_picturePatchListSize,
388 0);
389
390 // Slice Level Commands (cannot be placed in 2nd level batch)
391 m_hwInterface->GetMfxPrimitiveCommandsDataSize(
392 CODECHAL_ENCODE_MODE_MPEG2,
393 &m_sliceStatesSize,
394 &m_slicePatchListSize,
395 0);
396
397 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMmcState());
398
399 return status;
400 }
401
GetMaxBtCount()402 uint32_t CodechalEncodeVp8::GetMaxBtCount()
403 {
404 auto btIdxAlignment = m_stateHeapInterface->pStateHeapInterface->GetBtIdxAlignment();
405 uint32_t scalingBtCount = MOS_ALIGN_CEIL(
406 m_scaling4xKernelStates[0].KernelParams.iBTCount,
407 btIdxAlignment);
408 uint32_t meBtCount = MOS_ALIGN_CEIL(
409 m_meKernelStates[0].KernelParams.iBTCount,
410 btIdxAlignment);
411 uint32_t mbEncBtCount = MOS_ALIGN_CEIL(
412 m_mbEncKernelStates[0].KernelParams.iBTCount,
413 btIdxAlignment);
414
415 uint32_t brcBtCount = 0;
416 for (uint32_t i = 0; i < CODECHAL_ENCODE_VP8_BRC_IDX_NUM; i++)
417 {
418 brcBtCount += MOS_ALIGN_CEIL(
419 m_brcKernelStates[i].KernelParams.iBTCount,
420 btIdxAlignment);
421 }
422
423 return MOS_MAX(scalingBtCount + meBtCount, mbEncBtCount + brcBtCount);
424 }
425
AllocateBuffer(PMOS_RESOURCE buffer,uint32_t bufSize,const char * name)426 MOS_STATUS CodechalEncodeVp8::AllocateBuffer(
427 PMOS_RESOURCE buffer,
428 uint32_t bufSize,
429 const char * name)
430 {
431 MOS_STATUS status = MOS_STATUS_SUCCESS;
432
433 CODECHAL_ENCODE_CHK_NULL_RETURN(buffer);
434
435 MOS_ALLOC_GFXRES_PARAMS allocParams;
436 MOS_ZeroMemory(&allocParams, sizeof(MOS_ALLOC_GFXRES_PARAMS));
437 allocParams.Type = MOS_GFXRES_BUFFER;
438 allocParams.TileType = MOS_TILE_LINEAR;
439 allocParams.Format = Format_Buffer;
440 allocParams.dwBytes = bufSize;
441 allocParams.pBufName = name;
442
443 status = (MOS_STATUS)m_osInterface->pfnAllocateResource(
444 m_osInterface,
445 &allocParams,
446 buffer);
447
448 if (status != MOS_STATUS_SUCCESS)
449 {
450 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to allocate %s.", name);
451 return status;
452 }
453
454 CodechalResLock bufLock(m_osInterface, buffer);
455 auto data = bufLock.Lock(CodechalResLock::writeOnly);
456 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
457
458 MOS_ZeroMemory(data, bufSize);
459
460 return status;
461 }
462
AllocateBuffer2D(PMOS_SURFACE surface,uint32_t surfWidth,uint32_t surfHeight,const char * name)463 MOS_STATUS CodechalEncodeVp8::AllocateBuffer2D(
464 PMOS_SURFACE surface,
465 uint32_t surfWidth,
466 uint32_t surfHeight,
467 const char * name)
468 {
469 MOS_STATUS status = MOS_STATUS_SUCCESS;
470
471 CODECHAL_ENCODE_CHK_NULL_RETURN(surface);
472
473 MOS_ZeroMemory(surface, sizeof(*surface));
474
475 surface->TileType = MOS_TILE_LINEAR;
476 surface->bArraySpacing = true;
477 surface->Format = Format_Buffer_2D;
478 surface->dwWidth = surfWidth;
479 surface->dwHeight = surfHeight;
480 surface->dwPitch = MOS_ALIGN_CEIL(surface->dwWidth, 64);
481
482 MOS_ALLOC_GFXRES_PARAMS AllocParamsForBuffer2D;
483 MOS_ZeroMemory(&AllocParamsForBuffer2D, sizeof(MOS_ALLOC_GFXRES_PARAMS));
484 AllocParamsForBuffer2D.Type = MOS_GFXRES_2D;
485 AllocParamsForBuffer2D.TileType = surface->TileType;
486 AllocParamsForBuffer2D.Format = surface->Format;
487 AllocParamsForBuffer2D.dwWidth = surface->dwWidth;
488 AllocParamsForBuffer2D.dwHeight = surface->dwHeight;
489 AllocParamsForBuffer2D.pBufName = name;
490
491 status = (MOS_STATUS)m_osInterface->pfnAllocateResource(
492 m_osInterface,
493 &AllocParamsForBuffer2D,
494 &surface->OsResource);
495
496 if (status != MOS_STATUS_SUCCESS)
497 {
498 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to allocate %s.", name);
499 return status;
500 }
501
502 CodechalResLock bufLock(m_osInterface, &surface->OsResource);
503 auto data = bufLock.Lock(CodechalResLock::writeOnly);
504 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
505
506 MOS_ZeroMemory(data, surface->dwWidth * surface->dwHeight);
507
508 return status;
509 }
510
AllocateBatchBuffer(PMHW_BATCH_BUFFER batchBuffer,uint32_t bufSize,const char * name)511 MOS_STATUS CodechalEncodeVp8::AllocateBatchBuffer(
512 PMHW_BATCH_BUFFER batchBuffer,
513 uint32_t bufSize,
514 const char * name)
515 {
516 MOS_STATUS status = MOS_STATUS_SUCCESS;
517
518 CODECHAL_ENCODE_CHK_NULL_RETURN(batchBuffer);
519
520 MOS_ZeroMemory(
521 batchBuffer,
522 sizeof(MHW_BATCH_BUFFER));
523
524 batchBuffer->bSecondLevel = true;
525
526 status = Mhw_AllocateBb(
527 m_osInterface,
528 batchBuffer,
529 nullptr,
530 bufSize);
531
532 if (status != MOS_STATUS_SUCCESS)
533 {
534 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to allocate %s.", name);
535 return status;
536 }
537
538 status = Mhw_LockBb(m_osInterface, batchBuffer);
539
540 if (status != MOS_STATUS_SUCCESS)
541 {
542 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to lock %s.", name);
543 return status;
544 }
545
546 MOS_ZeroMemory(batchBuffer->pData, bufSize);
547
548 status = Mhw_UnlockBb(
549 m_osInterface,
550 batchBuffer,
551 false);
552
553 if (status != MOS_STATUS_SUCCESS)
554 {
555 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to unlock %s.", name);
556 return status;
557 }
558
559 return status;
560 }
561
AllocateResources()562 MOS_STATUS CodechalEncodeVp8::AllocateResources()
563 {
564 MOS_STATUS status = MOS_STATUS_SUCCESS;
565 struct CodechalResourcesBrcParams allocateResBrcParams;
566
567 CODECHAL_ENCODE_FUNCTION_ENTER;
568
569 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodechalEncoderState::AllocateResources());
570
571 // Allocate Ref Lists
572 CodecHalAllocateDataList(
573 m_refList,
574 CODECHAL_NUM_UNCOMPRESSED_SURFACE_VP8);
575
576 //Reference Frame MB count surface 32 bytes,
577 CODECHAL_ENCODE_CHK_STATUS_RETURN(
578 AllocateBuffer(&m_resRefMbCountSurface,
579 32,
580 "Reference Frame MB count surface"));
581
582 // MB Mode Cost Luma Buffer, 10 words
583 CODECHAL_ENCODE_CHK_STATUS_RETURN(
584 AllocateBuffer2D(&m_mbModeCostLumaBuffer,
585 MOS_ALIGN_CEIL((sizeof(uint16_t) * 10), 64),
586 1,
587 "MBMode Cost Luma Buffer"));
588
589 // Block Mode Cost Luma Buffer, 10*10*10 words
590 CODECHAL_ENCODE_CHK_STATUS_RETURN(
591 AllocateBuffer2D(&m_blockModeCostBuffer,
592 MOS_ALIGN_CEIL((sizeof(uint16_t)) * 10 * 10 * 10, 64),
593 1,
594 "BlockMode Cost Buffer"));
595
596 // Chroma Recon Buffer, 64 bytes per MB
597 CODECHAL_ENCODE_CHK_STATUS_RETURN(
598 AllocateBuffer(&m_chromaReconBuffer,
599 64 * m_picWidthInMb * m_picHeightInMb,
600 "Chroma Recon Buffer"));
601
602 // Per-MB Quant data, 1 Dword per MB
603 CODECHAL_ENCODE_CHK_STATUS_RETURN(
604 AllocateBuffer2D(&m_perMbQuantDataBuffer,
605 MOS_ALIGN_CEIL((m_picWidthInMb * 4), 64),
606 m_picHeightInMb,
607 "Per MB Quant Data Buffer"));
608
609 ///pred mv data surface
610 uint32_t picSizeInMb = m_picWidthInMb * m_picHeightInMb;
611 CODECHAL_ENCODE_CHK_STATUS_RETURN(
612 AllocateBuffer(&m_resPredMvDataSurface,
613 4 * picSizeInMb * sizeof(uint32_t),
614 "Per MV data surface"));
615
616 //ModeCostUpdate Surface used by P-kernel and MPU kernel
617 CODECHAL_ENCODE_CHK_STATUS_RETURN(
618 AllocateBuffer(&m_resModeCostUpdateSurface,
619 16 * sizeof(uint32_t),
620 "Mode Cost Update Surface"));
621
622 if (m_encEnabled)
623 {
624 MOS_ZeroMemory(&allocateResBrcParams, sizeof(struct CodechalResourcesBrcParams));
625 allocateResBrcParams.bHWWalker = m_hwWalker;
626 allocateResBrcParams.dwDownscaledWidthInMB4x = m_downscaledWidthInMb4x;
627 allocateResBrcParams.dwDownscaledHeightInMB4x = m_downscaledHeightInMb4x;
628 allocateResBrcParams.dwFrameWidthInMB = m_picWidthInMb;
629 allocateResBrcParams.dwFrameHeightInMB = m_picHeightInMb;
630 CODECHAL_ENCODE_CHK_STATUS_RETURN(AllocateBrcResources(&allocateResBrcParams));
631
632 // allocate VME Kernel Dump buffer
633 if (m_vmeKernelDump)
634 {
635 CODECHAL_ENCODE_CHK_STATUS_RETURN(
636 AllocateBuffer(&m_resVmeKernelDumpBuffer,
637 VP8_KERNEL_DUMP_SIZE,
638 "VME Kernel Dump Buffer"));
639 }
640
641 if (m_hmeSupported)
642 {
643 CODECHAL_ENCODE_CHK_STATUS_RETURN(
644 AllocateBuffer2D(&m_s4XMemvDataBuffer,
645 m_downscaledWidthInMb4x * 32,
646 m_downscaledHeightInMb4x * 4 * 4,
647 "4xME MV Data Buffer"));
648
649 CODECHAL_ENCODE_CHK_STATUS_RETURN(
650 AllocateBuffer2D(&m_s4XMeDistortionBuffer,
651 m_downscaledWidthInMb4x * 8,
652 m_downscaledHeightInMb4x * 4 * 4,
653 "4xME Distortion Buffer"));
654 }
655
656 if (m_16xMeSupported)
657 {
658 CODECHAL_ENCODE_CHK_STATUS_RETURN(
659 AllocateBuffer2D(&m_s16XMemvDataBuffer,
660 MOS_ALIGN_CEIL(m_downscaledWidthInMb16x * 32, 64),
661 m_downscaledHeightInMb16x * 4 * CODECHAL_VP8_ME_ME_DATA_SIZE_MULTIPLIER,
662 "16xME MV Data Buffer"));
663 }
664
665 CODECHAL_ENCODE_CHK_STATUS_RETURN(
666 AllocateBuffer(&m_resHistogram,
667 HISTOGRAM_SIZE,
668 "Histogram"));
669 }
670
671 if (m_pakEnabled)
672 {
673 // Intra Row Store Scratch buffer
674 // 1 cacheline per MB
675 CODECHAL_ENCODE_CHK_STATUS_RETURN(
676 AllocateBuffer(&m_resIntraRowStoreScratchBuffer,
677 m_picWidthInMb * CODECHAL_CACHELINE_SIZE,
678 "Intra Row Store Scratch Buffer"));
679
680 CODECHAL_ENCODE_CHK_STATUS_RETURN(
681 AllocateBuffer(&m_resFrameHeader,
682 CODECHAL_VP8_FRAME_HEADER_SIZE,
683 "Frame Header buffer"));
684
685 CODECHAL_ENCODE_CHK_STATUS_RETURN(
686 AllocateBuffer(&m_mpuTpuBuffers.resModeProbs,
687 MODE_PROPABILITIES_SIZE,
688 "Mode Probs buffer"));
689
690 CODECHAL_ENCODE_CHK_STATUS_RETURN(
691 AllocateBuffer(&m_mpuTpuBuffers.resRefModeProbs,
692 MODE_PROPABILITIES_SIZE,
693 "Ref Mode Probs buffer"));
694
695 CODECHAL_ENCODE_CHK_STATUS_RETURN(
696 AllocateBuffer(&m_mpuTpuBuffers.resCoeffProbs,
697 COEFFS_PROPABILITIES_SIZE,
698 "Coeff Probs buffer"));
699
700 CODECHAL_ENCODE_CHK_STATUS_RETURN(
701 AllocateBuffer(&m_mpuTpuBuffers.resRefCoeffProbs,
702 COEFFS_PROPABILITIES_SIZE,
703 "Ref Coeff Probs buffer"));
704
705 CODECHAL_ENCODE_CHK_STATUS_RETURN(
706 AllocateBuffer(&m_mpuTpuBuffers.resTokenBitsData,
707 TOKEN_BITS_DATA_SIZE,
708 "Token bits data"));
709
710 CODECHAL_ENCODE_CHK_STATUS_RETURN(
711 AllocateBuffer(&m_mpuTpuBuffers.resPictureState,
712 PICTURE_STATE_SIZE,
713 "Picture state buffer"));
714
715 CODECHAL_ENCODE_CHK_STATUS_RETURN(
716 AllocateBuffer(&m_mpuTpuBuffers.resMpuBitstream,
717 MPU_BITSTREAM_SIZE,
718 "Mpu bitstream buffer"));
719
720 CODECHAL_ENCODE_CHK_STATUS_RETURN(
721 AllocateBuffer(&m_mpuTpuBuffers.resTpuBitstream,
722 TPU_BITSTREAM_SIZE,
723 "Tpu bitstream buffer"));
724
725 CODECHAL_ENCODE_CHK_STATUS_RETURN(
726 AllocateBuffer(&m_mpuTpuBuffers.resEntropyCostTable,
727 ENTROPY_COST_TABLE_SIZE,
728 "Entropy cost table"));
729
730 CODECHAL_ENCODE_CHK_STATUS_RETURN(
731 AllocateBuffer(&m_mpuTpuBuffers.resPakTokenStatistics,
732 TOKEN_STATISTICS_SIZE,
733 "Pak Token statistics"));
734
735 CODECHAL_ENCODE_CHK_STATUS_RETURN(
736 AllocateBuffer(&m_mpuTpuBuffers.resPakTokenUpdateFlags,
737 COEFFS_PROPABILITIES_SIZE,
738 "Pak Token update flags"));
739
740 CODECHAL_ENCODE_CHK_STATUS_RETURN(
741 AllocateBuffer(&m_mpuTpuBuffers.resDefaultTokenProbability,
742 COEFFS_PROPABILITIES_SIZE,
743 "Default Token Probability"));
744
745 CODECHAL_ENCODE_CHK_STATUS_RETURN(
746 AllocateBuffer(&m_mpuTpuBuffers.resKeyFrameTokenProbability,
747 COEFFS_PROPABILITIES_SIZE,
748 "Key frame token probability"));
749
750 CODECHAL_ENCODE_CHK_STATUS_RETURN(
751 AllocateBuffer(&m_mpuTpuBuffers.resUpdatedTokenProbability,
752 COEFFS_PROPABILITIES_SIZE,
753 "Updated token probability"));
754
755 CODECHAL_ENCODE_CHK_STATUS_RETURN(
756 AllocateBuffer(&m_mpuTpuBuffers.resHwTokenProbabilityPass2,
757 COEFFS_PROPABILITIES_SIZE,
758 "Hw token probability pak Pass 2"));
759
760 CODECHAL_ENCODE_CHK_STATUS_RETURN(
761 AllocateBuffer(&m_resPakIntermediateBuffer,
762 (m_frameWidth * m_frameHeight * 2) + ((m_frameWidth * m_frameHeight) / 4) + INTERMEDIATE_PARTITION0_SIZE,
763 "Intermediate buffer"));
764
765 CODECHAL_ENCODE_CHK_STATUS_RETURN(
766 AllocateBuffer(&m_mpuTpuBuffers.resRepakDecisionSurface,
767 REPAK_DECISION_BUF_SIZE,
768 "Tpu Repak Decision buffer"));
769
770 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMpuTpuBuffer());
771 }
772
773 return status;
774 }
775
AllocateBrcResources(struct CodechalResourcesBrcParams * params)776 MOS_STATUS CodechalEncodeVp8::AllocateBrcResources(struct CodechalResourcesBrcParams* params)
777 {
778 uint32_t size, width, height, i;
779 MOS_ALLOC_GFXRES_PARAMS allocParamsForBufferLinear;
780 MOS_ALLOC_GFXRES_PARAMS allocParamsForBuffer2D;
781 MOS_LOCK_PARAMS lockFlagsWriteOnly;
782 MOS_STATUS status = MOS_STATUS_SUCCESS;
783
784 CODECHAL_ENCODE_FUNCTION_ENTER;
785
786 // initiate allocation paramters and lock flags
787 MOS_ZeroMemory(&allocParamsForBufferLinear, sizeof(MOS_ALLOC_GFXRES_PARAMS));
788 allocParamsForBufferLinear.Type = MOS_GFXRES_BUFFER;
789 allocParamsForBufferLinear.TileType = MOS_TILE_LINEAR;
790 allocParamsForBufferLinear.Format = Format_Buffer;
791
792 MOS_ZeroMemory(&allocParamsForBuffer2D, sizeof(MOS_ALLOC_GFXRES_PARAMS));
793 allocParamsForBuffer2D.Type = MOS_GFXRES_2D;
794 allocParamsForBuffer2D.TileType = MOS_TILE_LINEAR;
795 allocParamsForBuffer2D.Format = Format_Buffer_2D;
796
797 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
798 lockFlagsWriteOnly.WriteOnly = 1;
799
800 // BRC history buffer
801 CODECHAL_ENCODE_CHK_STATUS_RETURN(
802 AllocateBuffer(&m_brcBuffers.resBrcHistoryBuffer,
803 ENCODE_VP8_BRC_HISTORY_BUFFER_SIZE,
804 "BRC History Buffer"));
805
806 // internal segment map is provided from BRC update kernel
807 CODECHAL_ENCODE_CHK_STATUS_RETURN(
808 AllocateBuffer2D(&m_inSegmentMapSurface,
809 MOS_ALIGN_CEIL(m_picWidthInMb, 4),
810 m_picHeightInMb,
811 "BRC Segment Map Surface"));
812
813 if (m_brcDistortionBufferSupported)
814 {
815 // BRC Distortion Surface
816 CODECHAL_ENCODE_CHK_STATUS_RETURN(
817 AllocateBuffer2D(&m_brcBuffers.sMeBrcDistortionBuffer,
818 MOS_ALIGN_CEIL((params->dwDownscaledWidthInMB4x * 8), 64),
819 2 * MOS_ALIGN_CEIL((params->dwDownscaledHeightInMB4x * 4), 8),
820 "BRC Distortion Surface Buffer"));
821 }
822
823 // PAK Statistics buffer
824 CODECHAL_ENCODE_CHK_STATUS_RETURN(
825 AllocateBuffer(&m_brcBuffers.resBrcPakStatisticBuffer[0],
826 m_brcPakStatisticsSize,
827 "BRC PAK Statistics Buffer"));
828
829 // Encoder CFG State Cmd
830 // Use BRC_MAXIMUM_NUM_PASSES here since actual number of passes is
831 // determined later using PicParams.BRCPrecision
832 CODECHAL_ENCODE_CHK_STATUS_RETURN(
833 AllocateBuffer(&m_brcBuffers.resEncoderCfgCommandReadBuffer,
834 BRC_IMG_STATE_SIZE_PER_PASS * CODECHAL_ENCODE_BRC_MAXIMUM_NUM_PASSES,
835 "Encoder CFG State Read Buffer"));
836
837 CODECHAL_ENCODE_CHK_STATUS_RETURN(
838 AllocateBuffer(&m_brcBuffers.resEncoderCfgCommandWriteBuffer,
839 BRC_IMG_STATE_SIZE_PER_PASS * CODECHAL_ENCODE_BRC_MAXIMUM_NUM_PASSES,
840 "Encoder CFG State Write Buffer"));
841
842 // Check if the constant data surface is present
843 if (m_brcConstantBufferSupported)
844 {
845 CODECHAL_ENCODE_CHK_STATUS_RETURN(
846 AllocateBuffer(&m_brcBuffers.resBrcConstantDataBuffer,
847 BRC_CONSTANTSURFACE_VP8,
848 "BRC Constant Data Buffer"));
849
850 for (i = 0; i < CODECHAL_ENCODE_RECYCLED_BUFFER_NUM; i++)
851 {
852 //BRC Constant Data Surfaces
853 CODECHAL_ENCODE_CHK_STATUS_RETURN(
854 AllocateBuffer2D(&m_brcBuffers.sBrcConstantDataBuffer[i],
855 MOS_ALIGN_CEIL(m_brcConstantSurfaceWidth, 64),
856 m_brcConstantSurfaceHeight,
857 "BRC Constant Data Buffer"));
858 }
859 }
860
861 // PAK Statistics Dump buffer that stores stats per pak pass. useful for debugging
862 // 12: 10 data buffers + 2 extra buffers for empty spaces (easier to read dumps)
863 CODECHAL_ENCODE_CHK_STATUS_RETURN(
864 AllocateBuffer(&m_brcBuffers.resBrcPakStatsBeforeDumpBuffer,
865 m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses() * sizeof(uint32_t) * 12,
866 "BRC PAK Statistics Dump Buffer"));
867
868 // PAK Statistics Dump buffer that stores stats per pak pass. useful for debugging
869 CODECHAL_ENCODE_CHK_STATUS_RETURN(
870 AllocateBuffer(&m_brcBuffers.resBrcPakStatsAfterDumpBuffer,
871 m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses() * sizeof(uint32_t) * 12,
872 "BRC PAK Statistics Init Dump Buffer"));
873
874 return status;
875 }
876
FreeResources()877 void CodechalEncodeVp8::FreeResources()
878 {
879 CODECHAL_ENCODE_FUNCTION_ENTER;
880
881 CodechalEncoderState::FreeResources();
882
883 // Release Ref Lists
884 CodecHalFreeDataList(m_refList, CODECHAL_NUM_UNCOMPRESSED_SURFACE_VP8);
885
886 m_osInterface->pfnFreeResource(
887 m_osInterface,
888 &m_resRefMbCountSurface);
889
890 m_osInterface->pfnFreeResource(
891 m_osInterface,
892 &m_mbModeCostLumaBuffer.OsResource);
893
894 m_osInterface->pfnFreeResource(
895 m_osInterface,
896 &m_blockModeCostBuffer.OsResource);
897
898 m_osInterface->pfnFreeResource(
899 m_osInterface,
900 &m_chromaReconBuffer);
901
902 m_osInterface->pfnFreeResource(
903 m_osInterface,
904 &m_perMbQuantDataBuffer.OsResource);
905
906 m_osInterface->pfnFreeResource(
907 m_osInterface,
908 &m_resModeCostUpdateSurface);
909
910 m_osInterface->pfnFreeResource(
911 m_osInterface,
912 &m_resPredMvDataSurface);
913
914 FreeBrcResources();
915
916 if (m_encEnabled)
917 {
918 if (m_vmeKernelDump)
919 {
920 m_osInterface->pfnFreeResource(
921 m_osInterface,
922 &m_resVmeKernelDumpBuffer);
923 }
924
925 if (m_hmeSupported)
926 {
927 // 4xME ME MV data buffer
928 m_osInterface->pfnFreeResource(
929 m_osInterface,
930 &m_s4XMemvDataBuffer.OsResource);
931
932 // 4xME distortion buffer
933 m_osInterface->pfnFreeResource(
934 m_osInterface,
935 &m_s4XMeDistortionBuffer.OsResource);
936 }
937
938 // 16xME MV data buffer
939 if (m_16xMeSupported)
940 {
941 m_osInterface->pfnFreeResource(
942 m_osInterface,
943 &m_s16XMemvDataBuffer.OsResource);
944 }
945
946 m_osInterface->pfnFreeResource(
947 m_osInterface,
948 &m_resHistogram);
949 }
950
951 if (m_encEnabled)
952 {
953 m_osInterface->pfnFreeResource(
954 m_osInterface,
955 &m_inSegmentMapSurface.OsResource);
956 }
957
958 if (m_pakEnabled)
959 {
960 m_osInterface->pfnFreeResource(
961 m_osInterface,
962 &m_resFrameHeader);
963
964 m_osInterface->pfnFreeResource(
965 m_osInterface,
966 &m_mpuTpuBuffers.resModeProbs);
967
968 m_osInterface->pfnFreeResource(
969 m_osInterface,
970 &m_mpuTpuBuffers.resRefModeProbs);
971
972 m_osInterface->pfnFreeResource(
973 m_osInterface,
974 &m_mpuTpuBuffers.resCoeffProbs);
975
976 m_osInterface->pfnFreeResource(
977 m_osInterface,
978 &m_mpuTpuBuffers.resRefCoeffProbs);
979
980 m_osInterface->pfnFreeResource(
981 m_osInterface,
982 &m_mpuTpuBuffers.resTokenBitsData);
983
984 m_osInterface->pfnFreeResource(
985 m_osInterface,
986 &m_mpuTpuBuffers.resPictureState);
987
988 m_osInterface->pfnFreeResource(
989 m_osInterface,
990 &m_mpuTpuBuffers.resMpuBitstream);
991
992 m_osInterface->pfnFreeResource(
993 m_osInterface,
994 &m_mpuTpuBuffers.resTpuBitstream);
995
996 m_osInterface->pfnFreeResource(
997 m_osInterface,
998 &m_mpuTpuBuffers.resEntropyCostTable);
999
1000 m_osInterface->pfnFreeResource(
1001 m_osInterface,
1002 &m_mpuTpuBuffers.resPakTokenStatistics);
1003
1004 m_osInterface->pfnFreeResource(
1005 m_osInterface,
1006 &m_mpuTpuBuffers.resPakTokenUpdateFlags);
1007
1008 m_osInterface->pfnFreeResource(
1009 m_osInterface,
1010 &m_mpuTpuBuffers.resDefaultTokenProbability);
1011
1012 m_osInterface->pfnFreeResource(
1013 m_osInterface,
1014 &m_mpuTpuBuffers.resKeyFrameTokenProbability);
1015
1016 m_osInterface->pfnFreeResource(
1017 m_osInterface,
1018 &m_mpuTpuBuffers.resUpdatedTokenProbability);
1019
1020 m_osInterface->pfnFreeResource(
1021 m_osInterface,
1022 &m_mpuTpuBuffers.resHwTokenProbabilityPass2);
1023
1024 m_osInterface->pfnFreeResource(
1025 m_osInterface,
1026 &m_resPakIntermediateBuffer);
1027
1028 m_osInterface->pfnFreeResource(
1029 m_osInterface,
1030 &m_resIntraRowStoreScratchBuffer);
1031
1032 m_osInterface->pfnFreeResource(
1033 m_osInterface,
1034 &m_mpuTpuBuffers.resRepakDecisionSurface);
1035 }
1036
1037 return;
1038 }
1039
FreeBrcResources()1040 void CodechalEncodeVp8::FreeBrcResources()
1041 {
1042 CODECHAL_ENCODE_FUNCTION_ENTER;
1043
1044 for (uint32_t i = 0; i < CODECHAL_ENCODE_RECYCLED_BUFFER_NUM; i++)
1045 {
1046 m_osInterface->pfnFreeResource(
1047 m_osInterface,
1048 &m_brcBuffers.sBrcConstantDataBuffer[i].OsResource);
1049 }
1050
1051 m_osInterface->pfnFreeResource(
1052 m_osInterface,
1053 &m_brcBuffers.resBrcPakStatisticBuffer[0]);
1054
1055 m_osInterface->pfnFreeResource(
1056 m_osInterface,
1057 &m_brcBuffers.sMeBrcDistortionBuffer.OsResource);
1058
1059 m_osInterface->pfnFreeResource(
1060 m_osInterface,
1061 &m_brcBuffers.resBrcHistoryBuffer);
1062
1063 m_osInterface->pfnFreeResource(
1064 m_osInterface,
1065 &m_brcBuffers.resBrcConstantDataBuffer);
1066
1067 m_osInterface->pfnFreeResource(
1068 m_osInterface,
1069 &m_brcBuffers.resBrcPakStatsBeforeDumpBuffer);
1070
1071 m_osInterface->pfnFreeResource(
1072 m_osInterface,
1073 &m_brcBuffers.resBrcPakStatsAfterDumpBuffer);
1074
1075 m_osInterface->pfnFreeResource(
1076 m_osInterface,
1077 &m_brcBuffers.resEncoderCfgCommandReadBuffer);
1078
1079 m_osInterface->pfnFreeResource(
1080 m_osInterface,
1081 &m_brcBuffers.resEncoderCfgCommandWriteBuffer);
1082
1083 m_osInterface->pfnFreeResource(
1084 m_osInterface,
1085 &m_brcBuffers.resPakQPInputTable);
1086
1087 return;
1088 }
1089
ResizeBuffer()1090 void CodechalEncodeVp8::ResizeBuffer()
1091 {
1092 CODECHAL_ENCODE_FUNCTION_ENTER;
1093
1094 // if resolution changed, free existing DS/CSC/MbCode/MvData resources
1095 m_trackedBuf->Resize();
1096 }
1097
1098 //MOS_STATUS CodechalEncodeVp8::EncodeInitialize()
InitializePicture(const EncoderParams & params)1099 MOS_STATUS CodechalEncodeVp8::InitializePicture(const EncoderParams& params)
1100 {
1101 MOS_STATUS status = MOS_STATUS_SUCCESS;
1102
1103 CODECHAL_ENCODE_FUNCTION_ENTER;
1104
1105 m_bitstreamUpperBound = params.dwBitstreamSize;
1106 m_mbSegmentMapSurface = *(params.psMbSegmentMapSurface);
1107
1108 m_vp8SeqParams = (PCODEC_VP8_ENCODE_SEQUENCE_PARAMS)(params.pSeqParams);
1109 m_vp8PicParams = (PCODEC_VP8_ENCODE_PIC_PARAMS)(params.pPicParams);
1110 m_vp8QuantData = (PCODEC_VP8_ENCODE_QUANT_DATA)(params.pQuantData);
1111
1112 CODECHAL_ENCODE_CHK_NULL_RETURN(m_vp8SeqParams);
1113 CODECHAL_ENCODE_CHK_NULL_RETURN(m_vp8PicParams);
1114 CODECHAL_ENCODE_CHK_NULL_RETURN(m_vp8QuantData);
1115
1116 // reset for next frame
1117 if (m_b16XMeEnabled)
1118 {
1119 m_b16XMeDone = false;
1120 }
1121 if (m_hmeEnabled)
1122 {
1123 m_hmeDone = false;
1124 }
1125
1126 if (m_newSeq)
1127 {
1128 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetSequenceStructs());
1129 }
1130 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetPictureStructs());
1131
1132 // Scaling occurs when HME is enabled
1133 m_scalingEnabled = m_hmeSupported;
1134 m_useRawForRef = m_vp8SeqParams->UseRawReconRef;
1135
1136 CODECHAL_ENCODE_CHK_STATUS_RETURN(
1137 SetStatusReportParams(m_refList[m_currReconstructedPic.FrameIdx]));
1138
1139 CODECHAL_DEBUG_TOOL(
1140 m_debugInterface->m_currPic = m_vp8PicParams->CurrOriginalPic;
1141 m_debugInterface->m_bufferDumpFrameNum = m_storeData;
1142 m_debugInterface->m_frameType = m_pictureCodingType;
1143
1144 if (m_newSeq) {
1145 CODECHAL_ENCODE_CHK_STATUS_RETURN(
1146 DumpVp8EncodeSeqParams(m_vp8SeqParams));
1147 }
1148
1149 CODECHAL_ENCODE_CHK_STATUS_RETURN(
1150 DumpVp8EncodePicParams(m_vp8PicParams));)
1151
1152 return status;
1153 }
1154
SetSequenceStructs()1155 MOS_STATUS CodechalEncodeVp8::SetSequenceStructs()
1156 {
1157 MOS_STATUS status = MOS_STATUS_SUCCESS;
1158
1159 CODECHAL_ENCODE_FUNCTION_ENTER;
1160
1161 // setup internal parameters
1162 m_oriFrameWidth = m_vp8SeqParams->FrameWidth;
1163 m_oriFrameHeight = m_vp8SeqParams->FrameHeight;
1164 m_picWidthInMb = (uint16_t)CODECHAL_GET_WIDTH_IN_MACROBLOCKS(m_oriFrameWidth);
1165 m_picHeightInMb = (uint16_t)CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_oriFrameHeight);
1166 m_frameWidth = m_picWidthInMb * CODECHAL_MACROBLOCK_WIDTH;
1167 m_frameHeight = m_picHeightInMb * CODECHAL_MACROBLOCK_HEIGHT;
1168
1169 // HME Scaling WxH
1170 m_downscaledWidthInMb4x =
1171 CODECHAL_GET_WIDTH_IN_MACROBLOCKS(m_frameWidth / SCALE_FACTOR_4x);
1172 m_downscaledHeightInMb4x =
1173 CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameHeight / SCALE_FACTOR_4x);
1174 m_downscaledWidth4x =
1175 m_downscaledWidthInMb4x * CODECHAL_MACROBLOCK_WIDTH;
1176 m_downscaledHeight4x =
1177 m_downscaledHeightInMb4x * CODECHAL_MACROBLOCK_HEIGHT;
1178
1179 // SuperHME Scaling WxH
1180 m_downscaledWidthInMb16x =
1181 CODECHAL_GET_WIDTH_IN_MACROBLOCKS(m_frameWidth / SCALE_FACTOR_16x);
1182 m_downscaledHeightInMb16x =
1183 CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(m_frameHeight / SCALE_FACTOR_16x);
1184 m_downscaledWidth16x =
1185 m_downscaledWidthInMb16x * CODECHAL_MACROBLOCK_WIDTH;
1186 m_downscaledHeight16x =
1187 m_downscaledHeightInMb16x * CODECHAL_MACROBLOCK_HEIGHT;
1188
1189 MotionEstimationDisableCheck();
1190
1191 m_kernelMode = CodecHal_TargetUsageToMode_VP8[m_vp8SeqParams->TargetUsage & 0x7];
1192
1193 // Disable 16xMe in performance mode
1194 if (m_16xMeSupported && (m_kernelMode == encodePerformanceMode))
1195 {
1196 m_16xMeSupported = false;
1197 }
1198
1199 // All Rate control parameters currently not required for BDW and hence
1200 // not being read from Sequence params
1201 m_numPasses = 0;
1202 m_usMinPakPasses = 1;
1203
1204 m_refCtrlOptimizationDone = false;
1205
1206 if (m_firstFrame)
1207 {
1208 m_oriFrameHeight = m_vp8SeqParams->FrameHeight;
1209 m_oriFrameWidth = m_vp8SeqParams->FrameWidth;
1210 }
1211
1212 // check if there is a dynamic resolution change
1213 if ((m_oriFrameHeight && (m_oriFrameHeight != m_vp8SeqParams->FrameHeight)) ||
1214 (m_oriFrameWidth && (m_oriFrameWidth != m_vp8SeqParams->FrameWidth)))
1215 {
1216 m_resolutionChanged = true;
1217 m_oriFrameHeight = m_vp8SeqParams->FrameHeight;
1218 m_oriFrameWidth = m_vp8SeqParams->FrameWidth;
1219 }
1220 else
1221 {
1222 m_resolutionChanged = false;
1223 }
1224
1225 // if GOP structure is I-frame only, we use 3 non-ref slots for tracked buffer
1226 m_gopIsIdrFrameOnly = (m_vp8SeqParams->GopPicSize == 1);
1227
1228 return status;
1229 }
1230
SetPictureStructs()1231 MOS_STATUS CodechalEncodeVp8::SetPictureStructs()
1232 {
1233 uint8_t currRefIdx, numRef;
1234 uint16_t brcPrecision;
1235 uint32_t averageQp = 0;
1236 MOS_STATUS status = MOS_STATUS_SUCCESS;
1237
1238 CODECHAL_ENCODE_FUNCTION_ENTER;
1239
1240 if (Mos_ResourceIsNull(&m_reconSurface.OsResource) && (m_codecFunction != CODECHAL_FUNCTION_ENC))
1241 {
1242 return MOS_STATUS_INVALID_PARAMETER;
1243 }
1244
1245 // Sync initialize
1246 if ((m_firstFrame) ||
1247 (m_codecFunction == CODECHAL_FUNCTION_ENC))
1248 {
1249 m_waitForPak = false;
1250 }
1251 else
1252 {
1253 m_waitForPak= true;
1254 }
1255
1256 if (m_codecFunction != CODECHAL_FUNCTION_ENC)
1257 {
1258 m_signalEnc = true;
1259 }
1260 else
1261 {
1262 m_signalEnc = false;
1263 }
1264
1265 currRefIdx = m_vp8PicParams->CurrReconstructedPic.FrameIdx;
1266
1267 if (m_vp8PicParams->segmentation_enabled)
1268 {
1269 for (uint8_t i = 0; i < CODECHAL_VP8_MAX_SEGMENTS; i++)
1270 {
1271 averageQp += CodecHal_Clip3(0, CODECHAL_VP8_QP_MAX, m_vp8QuantData->QIndex[i] + m_vp8QuantData->QIndexDelta[0]);
1272 }
1273 averageQp = averageQp / 4;
1274 }
1275 else
1276 {
1277 averageQp = CodecHal_Clip3(0, CODECHAL_VP8_QP_MAX, m_vp8QuantData->QIndex[0] + m_vp8QuantData->QIndexDelta[0]);
1278 }
1279
1280 m_pictureCodingType = m_vp8PicParams->frame_type ? P_TYPE : I_TYPE;
1281
1282 if (m_pictureCodingType == I_TYPE)
1283 {
1284 m_averageKeyFrameQp = averageQp;
1285 m_pFramePositionInGop = 0;
1286 }
1287 else
1288 {
1289 m_averagePFrameQp = averageQp;
1290 if (m_vp8SeqParams->RateControlMethod == RATECONTROL_CQP)
1291 {
1292 m_pFramePositionInGop = 0;
1293 }
1294 else
1295 {
1296 if (m_vp8SeqParams->GopPicSize == 0)
1297 {
1298 return MOS_STATUS_INVALID_PARAMETER;
1299 }
1300 m_pFramePositionInGop = (m_storeData - 1) % m_vp8SeqParams->GopPicSize;
1301 }
1302 }
1303
1304 numRef = 0;
1305 if (!CodecHal_PictureIsInvalid(m_currOriginalPic))
1306 {
1307 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->LastRefPic))
1308 {
1309 m_refList[currRefIdx]->RefList[numRef++] = m_vp8PicParams->LastRefPic;
1310 }
1311
1312 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->GoldenRefPic))
1313 {
1314 m_refList[currRefIdx]->RefList[numRef++] = m_vp8PicParams->GoldenRefPic;
1315 }
1316
1317 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->AltRefPic))
1318 {
1319 m_refList[currRefIdx]->RefList[numRef++] = m_vp8PicParams->AltRefPic;
1320 }
1321 }
1322 m_refList[currRefIdx]->ucNumRef = numRef;
1323 m_refList[currRefIdx]->bUsedAsRef = true; /* VP8 has no non reference pictures */
1324 m_currRefList = m_refList[currRefIdx];
1325
1326 if (m_codecFunction == CODECHAL_FUNCTION_ENC_PAK)
1327 {
1328 // the actual MbCode/MvData surface to be allocated later
1329 m_trackedBuf->SetAllocationFlag(true);
1330 }
1331 else
1332 {
1333 CODECHAL_ENCODE_CHK_NULL_RETURN(m_encodeParams.presMbCodeSurface);
1334 m_resMbCodeSurface = *m_encodeParams.presMbCodeSurface;
1335 m_refList[currRefIdx]->resRefMbCodeBuffer = m_resMbCodeSurface;
1336 }
1337
1338 m_refList[currRefIdx]->sRefReconBuffer = m_reconSurface;
1339 m_refList[currRefIdx]->sRefRawBuffer = m_rawSurface;
1340 m_refList[currRefIdx]->RefPic = m_vp8PicParams->CurrOriginalPic;
1341 m_refList[currRefIdx]->resBitstreamBuffer = m_resBitstreamBuffer;
1342
1343 m_currOriginalPic = m_vp8PicParams->CurrOriginalPic;
1344 m_currReconstructedPic = m_vp8PicParams->CurrReconstructedPic;
1345 m_frameFieldHeight = m_frameHeight;
1346 m_frameFieldHeightInMb = m_picHeightInMb;
1347 m_downscaledFrameFieldHeightInMb4x = m_downscaledHeightInMb4x;
1348 m_downscaledFrameFieldHeightInMb16x = m_downscaledHeightInMb16x;
1349 m_currEncBbSet = MB_ENC_Frame_BB;
1350 m_waitForPak = false;
1351
1352 m_statusReportFeedbackNumber = m_vp8PicParams->StatusReportFeedbackNumber;
1353
1354 m_hmeEnabled = m_hmeSupported && m_pictureCodingType != I_TYPE && (m_vp8PicParams->ref_frame_ctrl != 0);
1355 m_b16XMeEnabled = m_16xMeSupported && m_pictureCodingType != I_TYPE;
1356 m_mbEncIFrameDistEnabled =
1357 m_brcDistortionBufferSupported &&
1358 (m_pictureCodingType == I_TYPE);
1359
1360 m_brcEnabled = (m_vp8SeqParams->RateControlMethod == RATECONTROL_CBR || m_vp8SeqParams->RateControlMethod == RATECONTROL_VBR);
1361
1362 // Multi-Pass BRC
1363 // brcPrecision = 2, GetNumBrcPakPasses(2) = BRC_DEFAULT_NUM_PASSES = 4
1364 // brcPrecision = 1, GetNumBrcPakPasses(1) = BRC_MINIMUM_NUM_PASSES = 2
1365 // CQP: dwBrcNumPakPasses = 1
1366 // should be based on BRC precision but currenlty VP8 Encode DDI does not have anything for precision.
1367 brcPrecision = 1;
1368 m_hwInterface->GetMfxInterface()->SetBrcNumPakPasses(
1369 (m_brcEnabled && m_multipassBrcSupported) ? GetNumBrcPakPasses(brcPrecision) : 1);
1370
1371 // Init Distortion buffer flag
1372 m_initBrcDistortionBuffer = false;
1373
1374 if (m_brcEnabled)
1375 {
1376 if (m_pictureCodingType == I_TYPE)
1377 {
1378 m_initBrcDistortionBuffer = true;
1379 }
1380 else
1381 {
1382 //For P frame following I frame
1383 if (m_pFramePositionInGop == 1)
1384 {
1385 m_initBrcDistortionBuffer = true;
1386 }
1387 }
1388 }
1389
1390 //decide number of pak passes
1391 m_numPasses = 0;
1392 m_usMinPakPasses = 1;
1393 m_waitForPak = false;
1394 m_usRepakPassIterVal = 0;
1395
1396 // RePak = 0: m_numPasses = 0, usMinPakPasses = 1
1397 // RePak = 1: m_numPasses = 1, usMinPakPasses = 2
1398 switch (m_kernelMode)
1399 {
1400 case encodeQualityMode:
1401 m_numPasses = 1;
1402 m_usMinPakPasses = 2;
1403
1404 if (m_pFramePositionInGop >= 1 && m_repakSupported)
1405 {
1406 m_waitForPak = true;
1407 }
1408 break;
1409 case encodeNormalMode:
1410 // with adaptive RePAK, RePAK is enabled by default both with I & P frames
1411 m_numPasses = 1;
1412 m_usMinPakPasses = 2;
1413
1414 // needs to wait for PAK execution except 1st frame
1415 if (m_repakSupported && m_storeData > 1)
1416 {
1417 m_waitForPak = true;
1418 }
1419 break;
1420 case encodePerformanceMode:
1421 m_numPasses = 0;
1422 m_usMinPakPasses = 1;
1423 break;
1424 default:
1425 m_numPasses = 0;
1426 m_usMinPakPasses = 1;
1427 }
1428
1429 //this will always override above decision on numpasses and minpakpasse, bRepakSupported is controlled through reg key
1430 if (!m_repakSupported)
1431 {
1432 m_numPasses = 0;
1433 m_usMinPakPasses = 1;
1434 }
1435
1436 // Keep the code below for MultiPass BRC to be enabled in future
1437 if (m_brcEnabled)
1438 {
1439 if (m_multipassBrcSupported) // Multi-Pass BRC
1440 {
1441 m_numPasses += GetNumBrcPakPasses(brcPrecision) - 1;
1442 }
1443 }
1444
1445 if (m_repakSupported && m_usMinPakPasses > 1) // Repak enabled by default for VP8
1446 {
1447 // Single-Pass BRC: ucNumPasses = 0 or 1
1448
1449 // Multi-Pass BRC: ucNumPasses = 3, Repak will always be 5th pass no matter how many PAK passes are executed
1450 // example) even if 2 passes are executed, there are PAK commands for 4 passes and cmds for remaining 2 passes are skipped
1451 m_usRepakPassIterVal = m_numPasses;
1452 }
1453
1454 return status;
1455 }
1456
ExecuteKernelFunctions()1457 MOS_STATUS CodechalEncodeVp8::ExecuteKernelFunctions()
1458 {
1459 MOS_SYNC_PARAMS syncParams;
1460 CodechalEncodeCscDs::KernelParams cscScalingKernelParams;
1461 bool isEncPhase1NotRun;
1462 MOS_STATUS status = MOS_STATUS_SUCCESS;
1463
1464 CODECHAL_ENCODE_FUNCTION_ENTER;
1465
1466 CODECHAL_DEBUG_TOOL(
1467 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
1468 m_rawSurfaceToEnc,
1469 CodechalDbgAttr::attrEncodeRawInputSurface,
1470 "SrcSurf"))
1471 );
1472
1473 MOS_ZeroMemory(&syncParams, sizeof(MOS_SYNC_PARAMS));
1474 // Wait on PAK, if its the P frame after I frame only
1475 if ((m_waitForPak) && !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
1476 {
1477 syncParams = g_cInitSyncParams;
1478 syncParams.GpuContext = m_renderContext;
1479 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
1480
1481 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
1482 }
1483
1484 // BRC init/reset needs to be called before HME since it will reset the Brc Distortion surface
1485 if (m_brcEnabled)
1486 {
1487 m_brcReset = m_vp8SeqParams->ResetBRC;
1488 if (m_brcInit || m_brcReset)
1489 {
1490 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcInitResetKernel());
1491 }
1492 }
1493
1494 // Csc, Downscaling, and/or 10-bit to 8-bit conversion
1495 MOS_ZeroMemory(&cscScalingKernelParams, sizeof(cscScalingKernelParams));
1496
1497 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_cscDsState->KernelFunctions(&cscScalingKernelParams));
1498
1499 if (m_hmeEnabled)
1500 {
1501 if (m_b16XMeEnabled)
1502 {
1503 CODECHAL_ENCODE_CHK_STATUS_RETURN(MeKernel());
1504 }
1505
1506 CODECHAL_ENCODE_CHK_STATUS_RETURN(MeKernel());
1507
1508 CODECHAL_DEBUG_TOOL(
1509 if (m_hmeEnabled) {
1510 CODECHAL_ME_OUTPUT_PARAMS meOutputParams;
1511 MOS_ZeroMemory(&meOutputParams, sizeof(CODECHAL_ME_OUTPUT_PARAMS));
1512 meOutputParams.psMeMvBuffer = &m_s4XMemvDataBuffer;
1513 meOutputParams.psMeBrcDistortionBuffer = m_brcEnabled ? &m_brcBuffers.sMeBrcDistortionBuffer : nullptr;
1514 meOutputParams.psMeDistortionBuffer = &m_s4XMeDistortionBuffer;
1515 meOutputParams.b16xMeInUse = false;
1516
1517 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
1518 &meOutputParams.psMeMvBuffer->OsResource,
1519 CodechalDbgAttr::attrOutput,
1520 "MvData",
1521 meOutputParams.psMeMvBuffer->dwHeight * meOutputParams.psMeMvBuffer->dwPitch,
1522 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 32), 64) * (m_downscaledFrameFieldHeightInMb4x * 4) : 0,
1523 CODECHAL_MEDIA_STATE_4X_ME));
1524
1525 if (m_brcEnabled)
1526 {
1527 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
1528 &meOutputParams.psMeBrcDistortionBuffer->OsResource,
1529 CodechalDbgAttr::attrOutput,
1530 "BrcDist",
1531 meOutputParams.psMeBrcDistortionBuffer->dwHeight * meOutputParams.psMeBrcDistortionBuffer->dwPitch,
1532 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4), 8) : 0,
1533 CODECHAL_MEDIA_STATE_4X_ME));
1534 }
1535
1536 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
1537 &meOutputParams.psMeDistortionBuffer->OsResource,
1538 CodechalDbgAttr::attrOutput,
1539 "MeDist",
1540 meOutputParams.psMeDistortionBuffer->dwHeight * meOutputParams.psMeDistortionBuffer->dwPitch,
1541 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb4x * 8), 64) * MOS_ALIGN_CEIL((m_downscaledFrameFieldHeightInMb4x * 4 * 10), 8) : 0,
1542 CODECHAL_MEDIA_STATE_4X_ME));
1543
1544 if (m_b16XMeEnabled)
1545 {
1546 meOutputParams.psMeMvBuffer = &m_s16XMemvDataBuffer;
1547 meOutputParams.psMeBrcDistortionBuffer = nullptr;
1548 meOutputParams.psMeDistortionBuffer = nullptr;
1549 meOutputParams.b16xMeInUse = true;
1550
1551 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
1552 &meOutputParams.psMeMvBuffer->OsResource,
1553 CodechalDbgAttr::attrOutput,
1554 "MvData",
1555 meOutputParams.psMeMvBuffer->dwHeight * meOutputParams.psMeMvBuffer->dwPitch,
1556 CodecHal_PictureIsBottomField(m_currOriginalPic) ? MOS_ALIGN_CEIL((m_downscaledWidthInMb16x * 32), 64) * (m_downscaledFrameFieldHeightInMb16x * 4) : 0,
1557 CODECHAL_MEDIA_STATE_16X_ME));
1558 }
1559 })
1560 }
1561
1562 // Call Idistortion and BRCUpdate kernels
1563 if (m_brcEnabled)
1564 {
1565 // Intra Distortion kernel
1566 if (m_mbEncIFrameDistEnabled)
1567 {
1568 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(false, false, true));
1569 }
1570
1571 CODECHAL_ENCODE_CHK_STATUS_RETURN(BrcUpdateKernel());
1572 m_osInterface->pfnResetPerfBufferID(m_osInterface);
1573 }
1574
1575 // Reset after BRC Init has been processed
1576 m_brcInit = false;
1577
1578 // skip Phase 1 for I frame with performance mode
1579 if ((m_pictureCodingType == I_TYPE) && (m_kernelMode == encodePerformanceMode))
1580 {
1581 isEncPhase1NotRun = true;
1582 }
1583 else
1584 {
1585 // Phase 1 MbEnc Kernel
1586 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(false, false, false));
1587 isEncPhase1NotRun = false;
1588 }
1589
1590 /* Call Phase 2 of I frame ENC kernel to process the Chroma component */
1591 if (m_pictureCodingType == I_TYPE)
1592 {
1593 // Phase 2 MbEnc Kernel
1594 CODECHAL_ENCODE_CHK_STATUS_RETURN(MbEncKernel(isEncPhase1NotRun, true, false));
1595 }
1596
1597 /* Call MPU kernel */
1598
1599 CODECHAL_ENCODE_CHK_STATUS_RETURN(MpuKernel());
1600
1601 // send signal from render to video after MPU kernel execution
1602 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
1603 {
1604 syncParams = g_cInitSyncParams;
1605 syncParams.GpuContext = m_renderContext;
1606 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
1607
1608 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
1609 }
1610
1611 if (m_brcEnabled)
1612 {
1613 m_mbEncCurbeSetInBrcUpdate = false;
1614 m_mbPakCurbeSetInBrcUpdate = false;
1615 }
1616
1617 m_frameNum += 1;
1618
1619 return status;
1620 }
1621
BrcInitResetKernel()1622 MOS_STATUS CodechalEncodeVp8::BrcInitResetKernel()
1623 {
1624 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
1625 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
1626 PMHW_KERNEL_STATE kernelState;
1627 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
1628 struct CodechalVp8BrcInitResetCurbeParams brcInitResetCurbeParams;
1629 MOS_COMMAND_BUFFER cmdBuffer;
1630 SendKernelCmdsParams sendKernelCmdsParams;
1631 struct CodechalVp8BrcInitResetSurfaceParams brcInitResetSurfaceParams;
1632 MHW_MEDIA_OBJECT_PARAMS mediaObjectParams;
1633 PerfTagSetting perfTag;
1634 MOS_STATUS status = MOS_STATUS_SUCCESS;
1635
1636 CODECHAL_ENCODE_FUNCTION_ENTER;
1637
1638 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
1639 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
1640
1641 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
1642 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
1643
1644 perfTag.Value = 0;
1645 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
1646 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_BRC_INIT_RESET;
1647 perfTag.PictureCodingType = m_pictureCodingType;
1648 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
1649
1650 encFunctionType = CODECHAL_MEDIA_STATE_BRC_INIT_RESET;
1651
1652 kernelState = m_brcInit ? &m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_INIT] : &m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_RESET];
1653
1654 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
1655 stateHeapInterface,
1656 kernelState->KernelParams.iBTCount));
1657 m_vmeStatesSize =
1658 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
1659 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
1660
1661 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
1662 stateHeapInterface,
1663 kernelState,
1664 false,
1665 0,
1666 false,
1667 m_storeData));
1668
1669 MOS_ZeroMemory(&idParams, sizeof(idParams));
1670 idParams.pKernelState = kernelState;
1671 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
1672 stateHeapInterface,
1673 1,
1674 &idParams));
1675
1676 MOS_ZeroMemory(&brcInitResetCurbeParams, sizeof(brcInitResetCurbeParams));
1677 brcInitResetCurbeParams.CurrPic = m_currOriginalPic;
1678 brcInitResetCurbeParams.pPicParams = m_vp8PicParams;
1679 brcInitResetCurbeParams.pSeqParams = m_vp8SeqParams;
1680 brcInitResetCurbeParams.dwFrameWidth = m_frameWidth;
1681 brcInitResetCurbeParams.dwFrameHeight = m_frameHeight;
1682 brcInitResetCurbeParams.dwAVBRAccuracy = m_usAvbrAccuracy;
1683 brcInitResetCurbeParams.dwAVBRConvergence = m_usAvbrConvergence;
1684 brcInitResetCurbeParams.bInitBrc = m_brcInit;
1685 brcInitResetCurbeParams.bMbBrcEnabled = m_mbBrcEnabled;
1686 brcInitResetCurbeParams.pdBrcInitCurrentTargetBufFullInBits =
1687 &m_dBrcInitCurrentTargetBufFullInBits;
1688 brcInitResetCurbeParams.pdwBrcInitResetBufSizeInBits =
1689 &m_brcInitResetBufSizeInBits;
1690 brcInitResetCurbeParams.pdBrcInitResetInputBitsPerFrame =
1691 &m_dBrcInitResetInputBitsPerFrame;
1692 brcInitResetCurbeParams.dwFramerate = m_frameRate;
1693 brcInitResetCurbeParams.pKernelState = kernelState;
1694 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetBrcInitResetCurbe(&brcInitResetCurbeParams));
1695
1696 CODECHAL_DEBUG_TOOL(
1697 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
1698 encFunctionType,
1699 MHW_DSH_TYPE,
1700 kernelState));
1701 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
1702 encFunctionType,
1703 kernelState));
1704 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
1705 encFunctionType,
1706 MHW_ISH_TYPE,
1707 kernelState));
1708 )
1709
1710 MOS_ZeroMemory(&cmdBuffer, sizeof(cmdBuffer));
1711 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
1712
1713 sendKernelCmdsParams = SendKernelCmdsParams();
1714 sendKernelCmdsParams.EncFunctionType = encFunctionType;
1715 sendKernelCmdsParams.bBrcResetRequested = m_brcReset ? true : false;
1716 sendKernelCmdsParams.pKernelState = kernelState;
1717
1718 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
1719
1720 // Add binding table
1721 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
1722 stateHeapInterface,
1723 kernelState));
1724
1725 //Add surface states
1726 MOS_ZeroMemory(&brcInitResetSurfaceParams, sizeof(brcInitResetSurfaceParams));
1727 brcInitResetSurfaceParams.presBrcHistoryBuffer =
1728 &m_brcBuffers.resBrcHistoryBuffer;
1729 brcInitResetSurfaceParams.psMeBrcDistortionBuffer =
1730 &m_brcBuffers.sMeBrcDistortionBuffer;
1731 brcInitResetSurfaceParams.dwMeBrcDistortionBottomFieldOffset =
1732 m_brcBuffers.dwMeBrcDistortionBottomFieldOffset;
1733 brcInitResetSurfaceParams.dwDownscaledWidthInMb4x = m_downscaledWidthInMb4x;
1734 brcInitResetSurfaceParams.dwDownscaledFrameHeightInMb4x =
1735 m_downscaledHeightInMb4x;
1736 brcInitResetSurfaceParams.pKernelState = kernelState;
1737 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendBrcInitResetSurfaces(
1738 &cmdBuffer,
1739 &brcInitResetSurfaceParams));
1740
1741 CODECHAL_DEBUG_TOOL(
1742 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
1743 encFunctionType,
1744 MHW_SSH_TYPE,
1745 kernelState));
1746 )
1747
1748 MOS_ZeroMemory(&mediaObjectParams, sizeof(mediaObjectParams));
1749 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObject(
1750 &cmdBuffer,
1751 nullptr,
1752 &mediaObjectParams));
1753
1754 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
1755
1756 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
1757 stateHeapInterface,
1758 kernelState));
1759 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
1760 stateHeapInterface));
1761
1762 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
1763
1764 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
1765 &cmdBuffer,
1766 encFunctionType,
1767 nullptr)));
1768
1769 CODECHAL_ENCODE_CHK_STATUS_RETURN(
1770 m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
1771
1772 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
1773
1774 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw);
1775
1776 m_lastTaskInPhase = false;
1777
1778 return status;
1779 }
1780
BrcUpdateKernel()1781 MOS_STATUS CodechalEncodeVp8::BrcUpdateKernel()
1782 {
1783 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
1784 PMHW_KERNEL_STATE kernelState, mbEncKernelState, mbEncChromaKernelState;
1785 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
1786 struct CodechalVp8MbencCurbeParams mbEncCurbeParams;
1787 struct CodechalVp8MbpakCurbeParams mbPakCurbeParams;
1788 struct CodechalVp8MpuCurbeParams mpuCurbeParams;
1789 struct CodechalVp8TpuCurbeParams tpuCurbeParams;
1790 struct CodechalVp8BrcUpdateCurbeParams brcUpdateCurbeParams;
1791 struct CodechalVp8InitBrcConstantBufferParams initBrcConstantBufferParams;
1792 PMOS_RESOURCE resBrcImageStatesReadBuffer;
1793 struct CodechalVp8BrcUpdateSurfaceParams brcUpdateSurfaceParams;
1794 struct CodechalBindingTableVp8BrcUpdate bindingTable;
1795 CODECHAL_MEDIA_STATE_TYPE encFunctionType, mbEncFunctionType, mbPakFunctionType;
1796 SendKernelCmdsParams sendKernelCmdsParams;
1797 MHW_MEDIA_OBJECT_PARAMS mediaObjectParams;
1798 MOS_COMMAND_BUFFER cmdBuffer;
1799 PerfTagSetting perfTag;
1800 MHW_VDBOX_VP8_ENCODER_CFG_PARAMS encoderCfgParams;
1801 uint32_t refFrameFlag, finalRefFrameFlag;
1802 MOS_LOCK_PARAMS lockFlags;
1803 MOS_STATUS status = MOS_STATUS_SUCCESS;
1804
1805 CODECHAL_ENCODE_FUNCTION_ENTER;
1806
1807 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
1808 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
1809
1810 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
1811 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
1812
1813 MOS_ZeroMemory(&perfTag, sizeof(PerfTagSetting));
1814 perfTag.Value = 0;
1815 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
1816 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_BRC_UPDATE;
1817 perfTag.PictureCodingType = m_pictureCodingType;
1818 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
1819
1820 kernelState = &m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_UPDATE];
1821 mbEncKernelState = nullptr;
1822 mbEncChromaKernelState = nullptr;
1823 if (m_pictureCodingType == I_TYPE)
1824 {
1825 mbEncKernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA];
1826 mbEncChromaKernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA];
1827 }
1828 else
1829 {
1830 mbEncKernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_P];
1831 mbEncChromaKernelState = nullptr;
1832 }
1833 m_brcBuffers.pMbEncKernelStateInUse = mbEncKernelState;
1834
1835 encFunctionType = CODECHAL_MEDIA_STATE_BRC_UPDATE;
1836 mbPakFunctionType = CODECHAL_MEDIA_STATE_HYBRID_PAK_P1;
1837
1838 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
1839 stateHeapInterface,
1840 kernelState->KernelParams.iBTCount));
1841 m_vmeStatesSize =
1842 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
1843 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
1844
1845 // Request space for MbEnc DSH, no SSH space requested as single task phase not supported for VP8
1846 // I frames require extra DSH space for the chroma ID
1847 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
1848 stateHeapInterface,
1849 mbEncKernelState,
1850 false,
1851 mbEncChromaKernelState ? m_mbEncIFrameDshSize : 0,
1852 true,
1853 m_storeData));
1854
1855 MOS_ZeroMemory(&idParams, sizeof(idParams));
1856 idParams.pKernelState = mbEncKernelState;
1857 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
1858 stateHeapInterface,
1859 1,
1860 &idParams));
1861
1862 if (mbEncChromaKernelState)
1863 {
1864 mbEncChromaKernelState->m_dshRegion = mbEncKernelState->m_dshRegion;
1865 MOS_ZeroMemory(&idParams, sizeof(idParams));
1866 idParams.pKernelState = mbEncChromaKernelState;
1867 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
1868 stateHeapInterface,
1869 1,
1870 &idParams));
1871 }
1872
1873 MOS_ZeroMemory(&mbEncCurbeParams, sizeof(struct CodechalVp8MbencCurbeParams));
1874 mbEncCurbeParams.pPicParams = m_vp8PicParams;
1875 mbEncCurbeParams.pSeqParams = m_vp8SeqParams;
1876 mbEncCurbeParams.pVp8QuantData = m_vp8QuantData;
1877 mbEncCurbeParams.pVp8SliceParams = m_vp8SliceParams;
1878 mbEncCurbeParams.ppRefList = &(m_refList[0]);
1879 mbEncCurbeParams.wPicWidthInMb = m_picWidthInMb;
1880 mbEncCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
1881 mbEncCurbeParams.ucKernelMode = m_kernelMode;
1882 mbEncCurbeParams.bHmeEnabled = m_hmeEnabled;
1883 mbEncCurbeParams.bVmeKernelDump = m_vmeKernelDump;
1884 mbEncCurbeParams.wPictureCodingType = m_pictureCodingType;
1885 mbEncCurbeParams.bMbEncIFrameDistInUse = false;
1886 mbEncCurbeParams.bBrcEnabled = m_brcEnabled;
1887 mbEncCurbeParams.pCurrOriginalPic = &m_currOriginalPic;
1888 mbEncCurbeParams.pLastRefPic = &m_vp8PicParams->LastRefPic;
1889 mbEncCurbeParams.pGoldenRefPic = &m_vp8PicParams->GoldenRefPic;
1890 mbEncCurbeParams.pAlternateRefPic = &m_vp8PicParams->AltRefPic;
1891 mbEncCurbeParams.bBrcEnabled = true;
1892 mbEncCurbeParams.pKernelState = mbEncKernelState;
1893
1894 //driver and kernel optimization when multiref is supported
1895 refFrameFlag = 0;
1896 if (m_pictureCodingType == P_TYPE)
1897 {
1898 refFrameFlag = 0x07;
1899 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->GoldenRefPic.FrameIdx)
1900 {
1901 refFrameFlag &= ~VP8_GOLDEN_REF_FLAG;
1902 }
1903 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
1904 {
1905 refFrameFlag &= ~VP8_ALT_REF_FLAG;
1906 }
1907 if (m_vp8PicParams->GoldenRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
1908 {
1909 refFrameFlag &= ~VP8_ALT_REF_FLAG;
1910 }
1911 }
1912 else
1913 {
1914 refFrameFlag = 1;
1915 }
1916
1917 finalRefFrameFlag = 0;
1918 switch (m_vp8PicParams->ref_frame_ctrl)
1919 {
1920 case 0:
1921 finalRefFrameFlag = 0;
1922 break;
1923 case 1:
1924 finalRefFrameFlag = 1; //Last Ref only
1925 break;
1926 case 2:
1927 finalRefFrameFlag = 2; //Gold Ref only
1928 break;
1929 case 4:
1930 finalRefFrameFlag = 4; //Alt Ref only
1931 break;
1932 default:
1933 finalRefFrameFlag = refFrameFlag;
1934 }
1935
1936 m_vp8PicParams->ref_frame_ctrl = finalRefFrameFlag;
1937
1938 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetMbEncCurbe(&mbEncCurbeParams));
1939
1940 m_mbEncCurbeSetInBrcUpdate = true;
1941
1942 // Request space for MPU DSH, no SSH space requested as single task phase not supported for VP8
1943 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
1944 stateHeapInterface,
1945 &m_mpuKernelState,
1946 false,
1947 0,
1948 true,
1949 m_storeData));
1950
1951 MOS_ZeroMemory(&idParams, sizeof(idParams));
1952 idParams.pKernelState = &m_mpuKernelState;
1953 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
1954 stateHeapInterface,
1955 1,
1956 &idParams));
1957
1958 // Setup MPU Curbe
1959 MOS_ZeroMemory(&mpuCurbeParams, sizeof(struct CodechalVp8MpuCurbeParams));
1960 mpuCurbeParams.pPicParams = m_vp8PicParams;
1961 mpuCurbeParams.pSeqParams = m_vp8SeqParams;
1962 mpuCurbeParams.pVp8QuantData = m_vp8QuantData;
1963 mpuCurbeParams.ucKernelMode = m_kernelMode;
1964 mpuCurbeParams.bVmeKernelDump = m_vmeKernelDump;
1965 mpuCurbeParams.wPictureCodingType = m_pictureCodingType;
1966 mpuCurbeParams.EncFunctionType = encFunctionType;
1967
1968 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetMpuCurbe(&mpuCurbeParams));
1969
1970 m_mpuCurbeSetInBrcUpdate = true;
1971
1972 // Request space for TPU DSH, no SSH space requested as single task phase not supported for VP8
1973 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
1974 stateHeapInterface,
1975 &m_tpuKernelState,
1976 false,
1977 0,
1978 true,
1979 m_storeData));
1980
1981 MOS_ZeroMemory(&idParams, sizeof(idParams));
1982 idParams.pKernelState = &m_tpuKernelState;
1983 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
1984 stateHeapInterface,
1985 1,
1986 &idParams));
1987
1988 // Setup TPU Curbe for BRC
1989 MOS_ZeroMemory(&tpuCurbeParams, sizeof(struct CodechalVp8TpuCurbeParams));
1990 tpuCurbeParams.pPicParams = m_vp8PicParams;
1991 tpuCurbeParams.pSeqParams = m_vp8SeqParams;
1992 tpuCurbeParams.pVp8QuantData = m_vp8QuantData;
1993 tpuCurbeParams.ucKernelMode = m_kernelMode;
1994 tpuCurbeParams.bVmeKernelDump = m_vmeKernelDump;
1995 tpuCurbeParams.wPictureCodingType = m_pictureCodingType;
1996 tpuCurbeParams.EncFunctionType = encFunctionType;
1997 tpuCurbeParams.wPicWidthInMb = m_picWidthInMb;
1998 tpuCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
1999 tpuCurbeParams.bRebinarizationFrameHdr = m_usRepakPassIterVal > 0 ? true : false;
2000 // Adaptive RePak can be enabled only when RePak is enabled
2001 tpuCurbeParams.bAdaptiveRePak = m_usRepakPassIterVal > 0 ? m_adaptiveRepakSupported : 0;
2002
2003 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetTpuCurbe(&tpuCurbeParams));
2004
2005 m_tpuCurbeSetInBrcUpdate = true;
2006
2007 // Request space for BRC DSH and SSH
2008 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2009 stateHeapInterface,
2010 kernelState,
2011 false,
2012 0,
2013 false,
2014 m_storeData));
2015
2016 MOS_ZeroMemory(&idParams, sizeof(idParams));
2017 idParams.pKernelState = kernelState;
2018 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
2019 stateHeapInterface,
2020 1,
2021 &idParams));
2022
2023 // Setup BRC Update Curbe
2024 MOS_ZeroMemory(&brcUpdateCurbeParams, sizeof(struct CodechalVp8BrcUpdateCurbeParams));
2025 brcUpdateCurbeParams.CurrPic = m_currOriginalPic;
2026 brcUpdateCurbeParams.pPicParams = m_vp8PicParams;
2027 brcUpdateCurbeParams.pSeqParams = m_vp8SeqParams;
2028 brcUpdateCurbeParams.pSliceParams = m_vp8SliceParams;
2029 brcUpdateCurbeParams.pVp8QuantData = m_vp8QuantData;
2030 brcUpdateCurbeParams.dwAVBRAccuracy = m_usAvbrAccuracy;
2031 brcUpdateCurbeParams.dwAVBRConvergence = m_usAvbrConvergence;
2032 brcUpdateCurbeParams.wPictureCodingType = m_pictureCodingType;
2033 brcUpdateCurbeParams.dwFrameWidthInMB = m_picWidthInMb;
2034 brcUpdateCurbeParams.dwFrameHeightInMB = m_picHeightInMb;
2035 brcUpdateCurbeParams.bHmeEnabled = m_hmeEnabled;
2036 brcUpdateCurbeParams.bInitBrc = m_brcInit;
2037 brcUpdateCurbeParams.bUsedAsRef = m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef;
2038 brcUpdateCurbeParams.ucKernelMode = m_kernelMode;
2039 brcUpdateCurbeParams.dwVp8BrcNumPakPasses = m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses();
2040 brcUpdateCurbeParams.dwHeaderBytesInserted = m_headerBytesInserted;
2041 brcUpdateCurbeParams.wFrameNumber = m_frameNum;
2042 brcUpdateCurbeParams.dwBrcInitResetBufSizeInBits = m_brcInitResetBufSizeInBits;
2043 brcUpdateCurbeParams.dBrcInitResetInputBitsPerFrame = m_dBrcInitResetInputBitsPerFrame;
2044 brcUpdateCurbeParams.pdBrcInitCurrentTargetBufFullInBits = &m_dBrcInitCurrentTargetBufFullInBits;
2045 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetBrcUpdateCurbe(
2046 &brcUpdateCurbeParams));
2047
2048 CODECHAL_DEBUG_TOOL(
2049 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2050 encFunctionType,
2051 MHW_DSH_TYPE,
2052 kernelState));
2053 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
2054 encFunctionType,
2055 kernelState));
2056 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2057 encFunctionType,
2058 MHW_ISH_TYPE,
2059 kernelState));
2060 )
2061
2062 MOS_ZeroMemory(&cmdBuffer, sizeof(MOS_COMMAND_BUFFER));
2063 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
2064
2065 sendKernelCmdsParams = SendKernelCmdsParams();
2066 sendKernelCmdsParams.EncFunctionType = encFunctionType;
2067 sendKernelCmdsParams.pKernelState = kernelState;
2068
2069 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
2070
2071 // Check if the constant data surface is present
2072 if (m_brcConstantBufferSupported)
2073 {
2074 MOS_ZeroMemory(&initBrcConstantBufferParams, sizeof(initBrcConstantBufferParams));
2075 initBrcConstantBufferParams.pOsInterface = m_osInterface;
2076 initBrcConstantBufferParams.pVp8PicIdx = &m_picIdx[0];
2077 initBrcConstantBufferParams.resBrcConstantDataBuffer =
2078 m_brcBuffers.resBrcConstantDataBuffer;
2079 initBrcConstantBufferParams.pPicParams = m_vp8PicParams;
2080 initBrcConstantBufferParams.wPictureCodingType = m_pictureCodingType;
2081 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitBrcConstantBuffer(&initBrcConstantBufferParams));
2082 }
2083
2084 //Set MFX_VP8_ENCODER_CFG command
2085 MOS_ZeroMemory(&encoderCfgParams, sizeof(encoderCfgParams));
2086 encoderCfgParams.bFirstPass = !(m_currPass);
2087 encoderCfgParams.bBRCEnabled = m_brcEnabled ? true : false;
2088 encoderCfgParams.dwCfgBufferSize = HEADER_METADATA_SIZE;
2089 encoderCfgParams.pEncodeVP8SeqParams = m_vp8SeqParams;
2090 encoderCfgParams.pEncodeVP8PicParams = m_vp8PicParams;
2091 encoderCfgParams.pEncodeVP8QuantData = m_vp8QuantData;
2092
2093 for (int i = 0; i < CODECHAL_ENCODE_BRC_MAXIMUM_NUM_PASSES; i++)
2094 {
2095 encoderCfgParams.dwCfgCmdOffset = i * HEADER_METADATA_SIZE;
2096 encoderCfgParams.bFirstPass = !i;
2097 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->InitMfxVp8EncoderCfgCmd(&m_brcBuffers.resEncoderCfgCommandWriteBuffer, &encoderCfgParams));
2098 }
2099
2100 m_mfxEncoderConfigCommandInitialized = true;
2101
2102 // Add binding table
2103 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
2104 stateHeapInterface,
2105 kernelState));
2106
2107 if (m_vp8PicParams->segmentation_enabled)
2108 {
2109 CodecHalGetResourceInfo(m_osInterface, &m_mbSegmentMapSurface);
2110 }
2111
2112 //Add surface states
2113 MOS_ZeroMemory(&brcUpdateSurfaceParams, sizeof(struct CodechalVp8BrcUpdateSurfaceParams));
2114 brcUpdateSurfaceParams.pMbEncKernelState = mbEncKernelState;
2115 brcUpdateSurfaceParams.presBrcHistoryBuffer = &m_brcBuffers.resBrcHistoryBuffer;
2116 brcUpdateSurfaceParams.presBrcPakStatisticBuffer = &m_brcBuffers.resBrcPakStatisticBuffer[0];
2117 brcUpdateSurfaceParams.presVp8PakQPInputTable = &m_brcBuffers.resPakQPInputTable;
2118 brcUpdateSurfaceParams.presVp8EncoderCfgCommandReadBuffer = &m_brcBuffers.resEncoderCfgCommandReadBuffer;
2119 brcUpdateSurfaceParams.presVp8EncoderCfgCommandWriteBuffer = &m_brcBuffers.resEncoderCfgCommandWriteBuffer;
2120 brcUpdateSurfaceParams.wPictureCodingType = m_pictureCodingType;
2121 brcUpdateSurfaceParams.ps4xMeDistortionBuffer = &m_s4XMeDistortionBuffer;
2122 brcUpdateSurfaceParams.psMeBrcDistortionBuffer = &m_brcBuffers.sMeBrcDistortionBuffer;
2123 brcUpdateSurfaceParams.presVp8BrcConstantDataBuffer = &m_brcBuffers.resBrcConstantDataBuffer;
2124 brcUpdateSurfaceParams.dwDownscaledWidthInMb4x = m_downscaledWidthInMb4x;
2125 brcUpdateSurfaceParams.dwDownscaledFrameFieldHeightInMb4x = m_downscaledFrameFieldHeightInMb4x;
2126 brcUpdateSurfaceParams.bMbBrcEnabled = m_mbBrcEnabled;
2127 brcUpdateSurfaceParams.dwBrcPakStatisticsSize = m_brcPakStatisticsSize;
2128 // Brc update kernel will always update internal segment map (sInSegmentMapSurface) regardless of MBRC = 0 or 1
2129 // However, MbEnc kernel will ignore internal segment map when MBRC = 0
2130 brcUpdateSurfaceParams.psSegmentationMap = &m_inSegmentMapSurface;
2131 brcUpdateSurfaceParams.presMbCodeBuffer = &m_resMbCodeSurface;
2132 brcUpdateSurfaceParams.pKernelState = kernelState;
2133 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendBrcUpdateSurfaces(
2134 &cmdBuffer,
2135 &brcUpdateSurfaceParams));
2136
2137 CODECHAL_DEBUG_TOOL(
2138 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2139 encFunctionType,
2140 MHW_SSH_TYPE,
2141 kernelState));
2142 )
2143
2144 MOS_ZeroMemory(&mediaObjectParams, sizeof(mediaObjectParams));
2145 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObject(
2146 &cmdBuffer,
2147 nullptr,
2148 &mediaObjectParams));
2149
2150 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
2151
2152 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
2153 stateHeapInterface,
2154 kernelState));
2155 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
2156 stateHeapInterface));
2157
2158 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
2159
2160 CODECHAL_DEBUG_TOOL(
2161 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
2162 &cmdBuffer,
2163 encFunctionType,
2164 nullptr));
2165 )
2166
2167 CODECHAL_ENCODE_CHK_STATUS_RETURN(
2168 m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
2169
2170 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
2171
2172 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw);
2173
2174 m_lastTaskInPhase = false;
2175
2176 return status;
2177 }
2178
MbEncKernel(bool isEncPhase1NotRun,bool isEncPhase2,bool mbEncIFrameDistInUse)2179 MOS_STATUS CodechalEncodeVp8::MbEncKernel(bool isEncPhase1NotRun, bool isEncPhase2, bool mbEncIFrameDistInUse)
2180 {
2181 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
2182 PMHW_KERNEL_STATE kernelState, chromaKernelState;
2183 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
2184 struct CodechalVp8MbencCurbeParams mbEncCurbeParams;
2185 struct CodechalVp8MbencSurfaceParams mbEncSurfaceParams;
2186 struct CodechalBindingTableVp8Mbenc bindingTable;
2187 struct CodechalVp8InitMbencConstantBufferParams initMBEncConstantBufferParams;
2188 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
2189 SendKernelCmdsParams sendKernelCmdsParams;
2190 MHW_WALKER_PARAMS walkerParams;
2191 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
2192 MOS_COMMAND_BUFFER cmdBuffer;
2193 uint8_t* data;
2194 PerfTagSetting perfTag;
2195 bool use45DegreePattern;
2196 uint8_t index;
2197 MOS_LOCK_PARAMS lockFlags;
2198 uint32_t resolutionX, resolutionY;
2199 uint32_t refFrameFlag, finalRefFrameFlag;
2200 MOS_STATUS status = MOS_STATUS_SUCCESS;
2201
2202 CODECHAL_ENCODE_FUNCTION_ENTER;
2203
2204 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
2205 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
2206 CODECHAL_ENCODE_CHK_NULL_RETURN(m_refList);
2207 CODECHAL_ENCODE_CHK_NULL_RETURN(m_vp8PicParams);
2208
2209 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
2210 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
2211 use45DegreePattern = false;
2212 chromaKernelState = nullptr;
2213
2214 perfTag.Value = 0;
2215 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
2216 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_MBENC_PHASE1_KERNEL;
2217
2218 if (isEncPhase2 == true)
2219 {
2220 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_MBENC_PHASE2_KERNEL;
2221 }
2222
2223 if (mbEncIFrameDistInUse == true)
2224 {
2225 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_INTRA_DIST;
2226 }
2227
2228 perfTag.PictureCodingType = m_pictureCodingType;
2229 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
2230
2231 if (m_pictureCodingType == I_TYPE)
2232 {
2233 kernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_LUMA];
2234 chromaKernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA];
2235 }
2236 else
2237 {
2238 kernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_P];
2239 }
2240
2241 if (mbEncIFrameDistInUse)
2242 {
2243 encFunctionType = CODECHAL_MEDIA_STATE_ENC_I_FRAME_DIST;
2244 kernelState = &m_brcKernelStates[CODECHAL_ENCODE_VP8_BRC_IDX_IFRAMEDIST];
2245 chromaKernelState = nullptr;
2246 }
2247 else if (m_kernelMode == encodeNormalMode)
2248 {
2249 encFunctionType = CODECHAL_MEDIA_STATE_ENC_NORMAL;
2250 }
2251 else if (m_kernelMode == encodePerformanceMode)
2252 {
2253 encFunctionType = CODECHAL_MEDIA_STATE_ENC_PERFORMANCE;
2254 }
2255 else
2256 {
2257 encFunctionType = CODECHAL_MEDIA_STATE_ENC_QUALITY;
2258 }
2259
2260 if (isEncPhase2 &&
2261 !mbEncIFrameDistInUse) // MB ENC I Chroma
2262 {
2263 encFunctionType = CODECHAL_MEDIA_STATE_ENC_I_FRAME_CHROMA;
2264 kernelState = &m_mbEncKernelStates[CODECHAL_ENCODE_VP8_MBENC_IDX_I_CHROMA];
2265 }
2266
2267 bindingTable = m_mbEncBindingTable;
2268
2269 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
2270 stateHeapInterface,
2271 kernelState->KernelParams.iBTCount));
2272 m_vmeStatesSize =
2273 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
2274 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
2275
2276 /* Both Phase 1 & 2 can use the same memory area for Curbe data, as they accept identical Curbe data.
2277 Same could have been done for the Surface states also but the SSH is part of the command buffer and right now we are using the different command buffer
2278 for Phase 1 & 2, so the setup of surface states in each command buffer is necessary */
2279 if ((isEncPhase2 == false) || (isEncPhase2 == true && isEncPhase1NotRun == true)) // Phase 1 OR Phase 2 (when Phase 1 not executed) // MB ENC I2
2280 {
2281 if (m_mbEncCurbeSetInBrcUpdate && !mbEncIFrameDistInUse)
2282 {
2283 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2284 stateHeapInterface,
2285 kernelState,
2286 true,
2287 0,
2288 false,
2289 m_storeData));
2290 }
2291 else
2292 {
2293 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2294 stateHeapInterface,
2295 kernelState,
2296 false,
2297 chromaKernelState ? m_mbEncIFrameDshSize : 0,
2298 false,
2299 m_storeData));
2300
2301 MOS_ZeroMemory(&idParams, sizeof(idParams));
2302 idParams.pKernelState = kernelState;
2303 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
2304 stateHeapInterface,
2305 1,
2306 &idParams));
2307
2308 if (chromaKernelState)
2309 {
2310 chromaKernelState->m_dshRegion = kernelState->m_dshRegion;
2311 MOS_ZeroMemory(&idParams, sizeof(idParams));
2312 idParams.pKernelState = chromaKernelState;
2313 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
2314 stateHeapInterface,
2315 1,
2316 &idParams));
2317 }
2318
2319 // Setup VP8 Curbe
2320 MOS_ZeroMemory(&mbEncCurbeParams, sizeof(struct CodechalVp8MbencCurbeParams));
2321 mbEncCurbeParams.pPicParams = m_vp8PicParams;
2322 mbEncCurbeParams.pSeqParams = m_vp8SeqParams;
2323 mbEncCurbeParams.pVp8SliceParams = m_vp8SliceParams;
2324 mbEncCurbeParams.pVp8QuantData = m_vp8QuantData;
2325 mbEncCurbeParams.ppRefList = &(m_refList[0]);
2326 mbEncCurbeParams.wPicWidthInMb = m_picWidthInMb;
2327 mbEncCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
2328 mbEncCurbeParams.ucKernelMode = m_kernelMode;
2329 mbEncCurbeParams.bHmeEnabled = m_hmeEnabled;
2330 mbEncCurbeParams.bVmeKernelDump = m_vmeKernelDump;
2331 mbEncCurbeParams.wPictureCodingType = m_pictureCodingType;
2332 mbEncCurbeParams.bMbEncIFrameDistInUse = mbEncIFrameDistInUse;
2333 mbEncCurbeParams.pCurrOriginalPic = &m_currOriginalPic;
2334 mbEncCurbeParams.pLastRefPic = &m_vp8PicParams->LastRefPic;
2335 mbEncCurbeParams.pGoldenRefPic = &m_vp8PicParams->GoldenRefPic;
2336 mbEncCurbeParams.pAlternateRefPic = &m_vp8PicParams->AltRefPic;
2337 mbEncCurbeParams.pKernelState = kernelState;
2338
2339 if (!m_refCtrlOptimizationDone)
2340 {
2341 // Driver and kernel optimization when multiref is supported.
2342 // With this optimization ref_frame_ctrl value is modified to 1 for first P frame in the GOP
2343 // and to 3 for the second P frame in the GOP when ref_frame_ctrl value sent by app is
2344 // 3, 5, 6 or 7.
2345 if (m_pictureCodingType == P_TYPE)
2346 {
2347 refFrameFlag = 0x07;
2348 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->GoldenRefPic.FrameIdx)
2349 {
2350 refFrameFlag &= ~VP8_GOLDEN_REF_FLAG;
2351 }
2352 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
2353 {
2354 refFrameFlag &= ~VP8_ALT_REF_FLAG;
2355 }
2356 if (m_vp8PicParams->GoldenRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
2357 {
2358 refFrameFlag &= ~VP8_ALT_REF_FLAG;
2359 }
2360 }
2361 else
2362 {
2363 refFrameFlag = 1;
2364 }
2365
2366 switch (m_vp8PicParams->ref_frame_ctrl)
2367 {
2368 case 0:
2369 finalRefFrameFlag = 0;
2370 break;
2371 case 1:
2372 finalRefFrameFlag = 1; //Last Ref only
2373 break;
2374 case 2:
2375 finalRefFrameFlag = 2; //Gold Ref only
2376 break;
2377 case 4:
2378 finalRefFrameFlag = 4; //Alt Ref only
2379 break;
2380 default:
2381 finalRefFrameFlag = refFrameFlag;
2382 }
2383
2384 m_vp8PicParams->ref_frame_ctrl = finalRefFrameFlag;
2385 }
2386
2387 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetMbEncCurbe(&mbEncCurbeParams));
2388
2389 CODECHAL_DEBUG_TOOL(
2390 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2391 encFunctionType,
2392 MHW_DSH_TYPE,
2393 kernelState));
2394 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
2395 encFunctionType,
2396 kernelState));
2397 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2398 encFunctionType,
2399 MHW_ISH_TYPE,
2400 kernelState));
2401 )
2402 }
2403
2404 if (m_pictureCodingType == P_TYPE)
2405 {
2406 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->LastRefPic))
2407 {
2408 index = m_vp8PicParams->LastRefPic.FrameIdx;
2409 m_refList[index]->sRefBuffer = m_vp8SeqParams->UseRawReconRef ? m_refList[index]->sRefRawBuffer : m_refList[index]->sRefReconBuffer;
2410 CodecHalGetResourceInfo(m_osInterface, &m_refList[index]->sRefBuffer);
2411 }
2412
2413 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->GoldenRefPic))
2414 {
2415 index = m_vp8PicParams->GoldenRefPic.FrameIdx;
2416 m_refList[index]->sRefBuffer = m_refList[index]->sRefReconBuffer; /* Always Recon buffer for Golden ref pic */
2417 CodecHalGetResourceInfo(m_osInterface, &m_refList[index]->sRefBuffer);
2418 }
2419
2420 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->AltRefPic))
2421 {
2422 index = m_vp8PicParams->AltRefPic.FrameIdx;
2423 m_refList[index]->sRefBuffer = m_refList[index]->sRefReconBuffer; /* Always Recon buffer for Alternate ref pic */
2424 CodecHalGetResourceInfo(m_osInterface, &m_refList[index]->sRefBuffer);
2425 }
2426 }
2427 else if (m_pictureCodingType == I_TYPE)
2428 {
2429 initMBEncConstantBufferParams.pOsInterface = m_osInterface;
2430 initMBEncConstantBufferParams.sMBModeCostLumaBuffer = m_mbModeCostLumaBuffer;
2431 initMBEncConstantBufferParams.sBlockModeCostBuffer = m_blockModeCostBuffer;
2432 initMBEncConstantBufferParams.presHistogram = &m_resHistogram;
2433 CODECHAL_ENCODE_CHK_STATUS_RETURN(InitMBEncConstantBuffer(&initMBEncConstantBufferParams));
2434 }
2435 if (m_initBrcDistortionBuffer && mbEncIFrameDistInUse)
2436 {
2437 InitBrcDistortionBuffer();
2438 }
2439 }
2440
2441 if (m_vp8PicParams->segmentation_enabled)
2442 {
2443 CodecHalGetResourceInfo(m_osInterface, &m_mbSegmentMapSurface);
2444 }
2445
2446 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
2447
2448 sendKernelCmdsParams = SendKernelCmdsParams();
2449 sendKernelCmdsParams.EncFunctionType = encFunctionType;
2450 sendKernelCmdsParams.pKernelState = kernelState;
2451 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
2452
2453 // Add binding table
2454 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
2455 stateHeapInterface,
2456 kernelState));
2457
2458 if (CodecHalUsesVideoEngine(m_codecFunction) &&
2459 ((isEncPhase2 == false) || (isEncPhase2 == true && isEncPhase1NotRun == true))) // Phase 1 OR Phase 2 (when Phase 1 not executed)
2460 {
2461 /* zero histogram surface only once */
2462 MOS_ZeroMemory(&lockFlags, sizeof(MOS_LOCK_PARAMS));
2463 lockFlags.WriteOnly = 1;
2464 data = (uint8_t *)m_osInterface->pfnLockResource(
2465 m_osInterface,
2466 &m_resHistogram,
2467 &lockFlags);
2468 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
2469
2470 MOS_ZeroMemory(data, HISTOGRAM_SIZE);
2471
2472 m_osInterface->pfnUnlockResource(
2473 m_osInterface,
2474 &m_resHistogram);
2475 }
2476
2477 //Add surface states
2478 MOS_ZeroMemory(&mbEncSurfaceParams, sizeof(struct CodechalVp8MbencSurfaceParams));
2479 mbEncSurfaceParams.MediaStateType = encFunctionType;
2480 mbEncSurfaceParams.ppRefList = &m_refList[0];
2481 mbEncSurfaceParams.wPictureCodingType = m_pictureCodingType;
2482 mbEncSurfaceParams.pCurrReconstructedPic = &m_currReconstructedPic;
2483 mbEncSurfaceParams.psCurrPicSurface = m_rawSurfaceToEnc;
2484
2485 if (m_pictureCodingType == P_TYPE)
2486 {
2487 mbEncSurfaceParams.pLastRefPic = &m_vp8PicParams->LastRefPic;
2488 mbEncSurfaceParams.pGoldenRefPic = &m_vp8PicParams->GoldenRefPic;
2489 mbEncSurfaceParams.pAlternateRefPic = &m_vp8PicParams->AltRefPic;
2490 mbEncSurfaceParams.ps4xMeMvDataBuffer = &m_s4XMemvDataBuffer;
2491 mbEncSurfaceParams.ps4xMeDistortionBuffer = &m_s4XMeDistortionBuffer;
2492 mbEncSurfaceParams.presRefMbCountSurface = &m_resRefMbCountSurface;
2493 mbEncSurfaceParams.dwMvOffset = (uint32_t)m_mvOffset;
2494 mbEncSurfaceParams.presModeCostUpdateSurface = &m_resModeCostUpdateSurface;
2495 }
2496 else
2497 {
2498 mbEncSurfaceParams.psMBModeCostLumaBuffer = &m_mbModeCostLumaBuffer;
2499 mbEncSurfaceParams.psBlockModeCostBuffer = &m_blockModeCostBuffer;
2500 }
2501
2502 mbEncSurfaceParams.dwFrameWidthInMb = (uint32_t)m_picWidthInMb;
2503 mbEncSurfaceParams.dwFrameFieldHeightInMb = (uint32_t)m_frameFieldHeightInMb;
2504 mbEncSurfaceParams.dwOriFrameWidth = m_oriFrameWidth;
2505 mbEncSurfaceParams.dwOriFrameHeight = m_oriFrameHeight;
2506 mbEncSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
2507 mbEncSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
2508 mbEncSurfaceParams.dwHistogramSize = HISTOGRAM_SIZE;
2509 mbEncSurfaceParams.bHmeEnabled = m_hmeEnabled;
2510 mbEncSurfaceParams.bVMEKernelDump = m_vmeKernelDump;
2511 mbEncSurfaceParams.bSegmentationEnabled = m_vp8PicParams->segmentation_enabled;
2512 mbEncSurfaceParams.presPerMB_MBCodeOpData = &m_resMbCodeSurface;
2513 mbEncSurfaceParams.psPerMBQuantDataBuffer = &m_perMbQuantDataBuffer;
2514 mbEncSurfaceParams.presVmeKernelDumpBuffer = &m_resVmeKernelDumpBuffer;
2515 // 0: Default, decided internally based on target usage.
2516 // 1: MB BRC enabled.
2517 // 2: MB BRC disabled.
2518 // MBRC = 1: internal segment map (sInSegmentMapSurface) is provided from BRC update kernel
2519 // MBRC = 0, 2: external segment map (sMbSegmentMapSurface) is provided from the app, ignore internal segment map
2520 mbEncSurfaceParams.psSegmentationMap = (m_vp8SeqParams->MBBRC == 1) ? &m_inSegmentMapSurface : &m_mbSegmentMapSurface;
2521 mbEncSurfaceParams.presHistogram = &m_resHistogram;
2522 mbEncSurfaceParams.psInterPredictionDistortionSurface = &m_s4XMeDistortionBuffer;
2523 mbEncSurfaceParams.presPerMVDataSurface = &m_resPredMvDataSurface;
2524 mbEncSurfaceParams.bMbEncIFrameDistInUse = mbEncIFrameDistInUse;
2525 mbEncSurfaceParams.pVp8SliceParams = m_vp8SliceParams;
2526 mbEncSurfaceParams.psMeBrcDistortionBuffer = mbEncIFrameDistInUse ? &m_brcBuffers.sMeBrcDistortionBuffer : &m_s4XMeDistortionBuffer;
2527 mbEncSurfaceParams.uiRefCtrl = m_vp8PicParams->ref_frame_ctrl;
2528 mbEncSurfaceParams.pMbEncBindingTable = &bindingTable;
2529 mbEncSurfaceParams.pKernelState = kernelState;
2530
2531 mbEncSurfaceParams.psChromaReconBuffer = &m_chromaReconBuffer;
2532
2533 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendMbEncSurfaces(&cmdBuffer, &mbEncSurfaceParams));
2534
2535 CODECHAL_DEBUG_TOOL(
2536 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2537 encFunctionType,
2538 MHW_SSH_TYPE,
2539 kernelState));
2540
2541 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
2542 &m_resModeCostUpdateSurface,
2543 CodechalDbgAttr::attrInput,
2544 "ModeCostUpdate",
2545 16 * sizeof(uint32_t),
2546 0,
2547 CODECHAL_NUM_MEDIA_STATES));
2548
2549 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
2550 &m_s4XMeDistortionBuffer,
2551 "MBEncInterPredDistSurf",
2552 "InterDistSurf"));
2553 )
2554
2555 resolutionX = mbEncIFrameDistInUse ?
2556 m_downscaledWidthInMb4x : (uint32_t)m_picWidthInMb;
2557 resolutionY = mbEncIFrameDistInUse ?
2558 m_downscaledHeightInMb4x : (uint32_t)m_frameFieldHeightInMb;
2559
2560 MOS_ZeroMemory(&walkerCodecParams, sizeof(walkerCodecParams));
2561 walkerCodecParams.WalkerMode = m_walkerMode;
2562 walkerCodecParams.bUseScoreboard = m_useHwScoreboard;
2563 walkerCodecParams.dwResolutionX = resolutionX;
2564 walkerCodecParams.dwResolutionY = resolutionY;
2565 walkerCodecParams.wPictureCodingType = m_pictureCodingType;
2566
2567 if ((m_pictureCodingType == I_TYPE) && (isEncPhase2 == false))
2568 {
2569 walkerCodecParams.bNoDependency = true;
2570 }
2571 else
2572 {
2573 walkerCodecParams.WalkerDegree = CODECHAL_45_DEGREE;
2574 }
2575
2576 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalInitMediaObjectWalkerParams(
2577 m_hwInterface,
2578 &walkerParams,
2579 &walkerCodecParams));
2580
2581 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObjectWalkerCmd(
2582 &cmdBuffer,
2583 &walkerParams));
2584
2585 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
2586
2587 if( mbEncIFrameDistInUse ||
2588 !isEncPhase2 ||
2589 (isEncPhase2 && isEncPhase1NotRun))
2590 {
2591 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
2592 stateHeapInterface,
2593 kernelState));
2594 }
2595
2596 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
2597 stateHeapInterface));
2598
2599 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
2600
2601 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
2602 &cmdBuffer,
2603 encFunctionType,
2604 nullptr)));
2605
2606 CODECHAL_ENCODE_CHK_STATUS_RETURN(
2607 m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
2608
2609 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
2610
2611 CODECHAL_ENCODE_CHK_STATUS_RETURN(
2612 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw));
2613
2614 return status;
2615 }
2616
MeKernel()2617 MOS_STATUS CodechalEncodeVp8::MeKernel()
2618 {
2619 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
2620 PMHW_KERNEL_STATE kernelState;
2621 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
2622 PerfTagSetting perfTag;
2623 struct CodechalVp8MeCurbeParams meParams;
2624 struct CodechalVp8MeSurfaceParams meSurfaceParams;
2625 struct CodechalBindingTableVp8Me bindingTable;
2626 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
2627 SendKernelCmdsParams sendKernelCmdsParams;
2628 MHW_WALKER_PARAMS walkerParams;
2629 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
2630 MOS_COMMAND_BUFFER cmdBuffer;
2631 bool use16xMe;
2632 uint32_t resolutionX, resolutionY;
2633 uint8_t refScaledIdx, goldScaledIdx, altrefScaledIdx;
2634 uint32_t refFrameFlag, finalRefFrameFlag;
2635 MOS_STATUS status = MOS_STATUS_SUCCESS;
2636
2637 CODECHAL_ENCODE_FUNCTION_ENTER;
2638
2639 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
2640 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
2641
2642 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
2643 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
2644 use16xMe = m_b16XMeEnabled && !m_b16XMeDone;
2645
2646 perfTag.Value = 0;
2647 perfTag.Mode = (uint16_t)m_mode >> CODECHAL_ENCODE_MODE_BIT_OFFSET;
2648 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_ME_KERNEL;
2649 perfTag.PictureCodingType = m_pictureCodingType;
2650 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
2651
2652 encFunctionType = (use16xMe) ? CODECHAL_MEDIA_STATE_16X_ME : CODECHAL_MEDIA_STATE_4X_ME;
2653 kernelState = &m_meKernelState;
2654 bindingTable = m_meBindingTable;
2655
2656 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
2657 stateHeapInterface,
2658 kernelState->KernelParams.iBTCount));
2659 m_vmeStatesSize =
2660 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
2661 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
2662
2663 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2664 stateHeapInterface,
2665 kernelState,
2666 false,
2667 0,
2668 false,
2669 m_storeData));
2670
2671 MOS_ZeroMemory(&idParams, sizeof(idParams));
2672 idParams.pKernelState = kernelState;
2673 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
2674 stateHeapInterface,
2675 1,
2676 &idParams));
2677
2678 // Driver and kernel optimization when multiref is supported.
2679 // With this optimization ref_frame_ctrl value is modified to 1 for first P frame in the GOP
2680 // and to 3 for the second P frame in the GOP when ref_frame_ctrl value sent by app is either
2681 // 3, 5, 6 or 7.
2682 if (m_pictureCodingType == P_TYPE)
2683 {
2684 refFrameFlag = 0x07;
2685 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->GoldenRefPic.FrameIdx)
2686 {
2687 refFrameFlag &= ~VP8_GOLDEN_REF_FLAG;
2688 }
2689 if (m_vp8PicParams->LastRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
2690 {
2691 refFrameFlag &= ~VP8_ALT_REF_FLAG;
2692 }
2693 if (m_vp8PicParams->GoldenRefPic.FrameIdx == m_vp8PicParams->AltRefPic.FrameIdx)
2694 {
2695 refFrameFlag &= ~VP8_ALT_REF_FLAG;
2696 }
2697 }
2698 else
2699 {
2700 refFrameFlag = 1;
2701 }
2702
2703 switch (m_vp8PicParams->ref_frame_ctrl)
2704 {
2705 case 0:
2706 finalRefFrameFlag = 0;
2707 break;
2708 case 1:
2709 finalRefFrameFlag = 1; //Last Ref only
2710 break;
2711 case 2:
2712 finalRefFrameFlag = 2; //Gold Ref only
2713 break;
2714 case 4:
2715 finalRefFrameFlag = 4; //Alt Ref only
2716 break;
2717 default:
2718 finalRefFrameFlag = refFrameFlag;
2719 }
2720
2721 m_vp8PicParams->ref_frame_ctrl = finalRefFrameFlag;
2722 m_refCtrlOptimizationDone = true;
2723
2724 // Setup VP8 Curbe
2725 meParams.pPicParams = m_vp8PicParams;
2726 meParams.pSeqParams = m_vp8SeqParams;
2727 meParams.dwFrameWidth = m_frameWidth;
2728 meParams.dwFrameFieldHeight = m_frameFieldHeight;
2729 meParams.wPictureCodingType = m_pictureCodingType;
2730 meParams.b16xME = use16xMe;
2731 meParams.b16xMeEnabled = m_b16XMeEnabled;
2732 meParams.ucKernelMode = m_kernelMode;
2733 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetMeCurbe(&meParams));
2734
2735 refScaledIdx = m_refList[m_vp8PicParams->LastRefPic.FrameIdx]->ucScalingIdx;
2736 goldScaledIdx = m_refList[m_vp8PicParams->GoldenRefPic.FrameIdx]->ucScalingIdx;
2737 altrefScaledIdx = m_refList[m_vp8PicParams->AltRefPic.FrameIdx]->ucScalingIdx;
2738
2739 CODECHAL_DEBUG_TOOL(
2740 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2741 encFunctionType,
2742 MHW_DSH_TYPE,
2743 kernelState));
2744 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
2745 encFunctionType,
2746 kernelState));
2747 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2748 encFunctionType,
2749 MHW_ISH_TYPE,
2750 kernelState));
2751
2752 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
2753 m_trackedBuf->Get4xDsSurface(refScaledIdx),
2754 CodechalDbgAttr::attrReferenceSurfaces,
2755 "MeRef4xScaledSurf"))
2756
2757 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
2758 m_trackedBuf->Get4xDsSurface(goldScaledIdx),
2759 CodechalDbgAttr::attrReferenceSurfaces,
2760 "GoldenRef4xScaledSurf"))
2761
2762 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpYUVSurface(
2763 m_trackedBuf->Get4xDsSurface(altrefScaledIdx),
2764 CodechalDbgAttr::attrReferenceSurfaces,
2765 "AltRef4xScaledSurf"))
2766 )
2767
2768 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
2769
2770 sendKernelCmdsParams = SendKernelCmdsParams();
2771 sendKernelCmdsParams.EncFunctionType = encFunctionType;
2772 sendKernelCmdsParams.pKernelState = kernelState;
2773 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
2774
2775 // Add binding table
2776 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
2777 stateHeapInterface,
2778 kernelState));
2779
2780 if (m_initBrcDistortionBuffer && !use16xMe)
2781 {
2782 InitBrcDistortionBuffer();
2783 }
2784
2785 //Add surface states
2786 MOS_ZeroMemory(&meSurfaceParams, sizeof(struct CodechalVp8MeSurfaceParams));
2787 meSurfaceParams.ppRefList = &m_refList[0];
2788 meSurfaceParams.pLastRefPic = &m_vp8PicParams->LastRefPic;
2789 meSurfaceParams.pGoldenRefPic = &m_vp8PicParams->GoldenRefPic;
2790 meSurfaceParams.pAlternateRefPic = &m_vp8PicParams->AltRefPic;
2791 meSurfaceParams.ps4xMeMvDataBuffer = &m_s4XMemvDataBuffer;
2792 meSurfaceParams.ps16xMeMvDataBuffer = &m_s16XMemvDataBuffer;
2793 meSurfaceParams.psMeDistortionBuffer = &m_s4XMeDistortionBuffer;
2794 // Me kernel is only for P frame, no need to worry about I frame
2795 meSurfaceParams.psMeBrcDistortionBuffer = m_brcEnabled ? &m_brcBuffers.sMeBrcDistortionBuffer : &m_s4XMeDistortionBuffer;
2796 meSurfaceParams.dwDownscaledWidthInMb =
2797 (use16xMe) ? m_downscaledWidthInMb16x : m_downscaledWidthInMb4x;
2798 meSurfaceParams.dwDownscaledHeightInMb =
2799 (use16xMe) ? m_downscaledHeightInMb16x : m_downscaledHeightInMb4x;
2800 meSurfaceParams.dwVerticalLineStride = m_verticalLineStride;
2801 meSurfaceParams.dwVerticalLineStrideOffset = m_verticalLineStrideOffset;
2802 meSurfaceParams.b16xMeInUse = use16xMe;
2803 meSurfaceParams.b16xMeEnabled = m_b16XMeEnabled;
2804 meSurfaceParams.RefCtrl = m_vp8PicParams->ref_frame_ctrl;
2805 meSurfaceParams.pMeBindingTable = &bindingTable;
2806 meSurfaceParams.pKernelState = kernelState;
2807 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendMeSurfaces(&cmdBuffer, &meSurfaceParams));
2808
2809 CODECHAL_DEBUG_TOOL(
2810 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2811 encFunctionType,
2812 MHW_SSH_TYPE,
2813 kernelState));
2814 )
2815
2816 resolutionX = (use16xMe) ? m_downscaledWidthInMb16x : m_downscaledWidthInMb4x;
2817 resolutionY = (use16xMe) ? m_downscaledFrameFieldHeightInMb16x : m_downscaledFrameFieldHeightInMb4x;
2818
2819 MOS_ZeroMemory(&walkerCodecParams, sizeof(walkerCodecParams));
2820 walkerCodecParams.WalkerMode = m_walkerMode;
2821 walkerCodecParams.dwResolutionX = resolutionX;
2822 walkerCodecParams.dwResolutionY = resolutionY;
2823 walkerCodecParams.bNoDependency = true;
2824
2825 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalInitMediaObjectWalkerParams(
2826 m_hwInterface,
2827 &walkerParams,
2828 &walkerCodecParams));
2829
2830 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObjectWalkerCmd(
2831 &cmdBuffer,
2832 &walkerParams));
2833
2834 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport(&cmdBuffer, encFunctionType));
2835
2836 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
2837 stateHeapInterface,
2838 kernelState));
2839 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
2840 stateHeapInterface));
2841
2842 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
2843
2844 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
2845 &cmdBuffer,
2846 encFunctionType,
2847 nullptr)));
2848
2849 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
2850
2851 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
2852
2853 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw));
2854
2855 if (use16xMe)
2856 {
2857 m_b16XMeDone = true;
2858 }
2859
2860 return status;
2861 }
2862
MpuKernel()2863 MOS_STATUS CodechalEncodeVp8::MpuKernel()
2864 {
2865 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
2866 PMHW_KERNEL_STATE kernelState;
2867 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
2868 struct CodechalVp8MpuCurbeParams mpuCurbeParams;
2869 struct CodechalVp8MpuSurfaceParams mpuSurfaceParams;
2870 struct CodechalBindingTableVp8Mpu bindingTable;
2871 SendKernelCmdsParams sendKernelCmdsParams;
2872 MHW_WALKER_PARAMS walkerParams;
2873 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
2874 MOS_COMMAND_BUFFER cmdBuffer;
2875 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
2876 MHW_VDBOX_VP8_ENCODER_CFG_PARAMS encoderCfgParams;
2877 struct CodechalVp8UpdateMpuTpuBufferParams updateMpuTpuBuffersParams;
2878 MHW_MEDIA_OBJECT_PARAMS mediaObjectParams;
2879 MOS_STATUS status = MOS_STATUS_SUCCESS;
2880
2881 CODECHAL_ENCODE_FUNCTION_ENTER;
2882
2883 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
2884 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
2885 CODECHAL_ENCODE_CHK_NULL_RETURN(m_refList);
2886
2887 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
2888 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
2889
2890 encFunctionType = CODECHAL_MEDIA_STATE_MPU_FHB;
2891 kernelState = &m_mpuKernelState;
2892 bindingTable = m_mpuBindingTable;
2893
2894 //Update all the data for the key frames
2895 if (m_pictureCodingType == I_TYPE)
2896 {
2897 MOS_ZeroMemory(&updateMpuTpuBuffersParams, sizeof(updateMpuTpuBuffersParams));
2898 updateMpuTpuBuffersParams.pOsInterface = m_osInterface;
2899 updateMpuTpuBuffersParams.dwCoeffProbsSize = COEFFS_PROPABILITIES_SIZE;
2900 updateMpuTpuBuffersParams.presCurrFrameTokenProbability = &m_mpuTpuBuffers.resCoeffProbs;
2901 updateMpuTpuBuffersParams.presHwTokenProbabilityPass1 = &m_mpuTpuBuffers.resRefCoeffProbs;
2902 updateMpuTpuBuffersParams.presKeyFrameTokenProbability = &m_mpuTpuBuffers.resKeyFrameTokenProbability;
2903 updateMpuTpuBuffersParams.presHwTokenProbabilityPass2 = &m_mpuTpuBuffers.resHwTokenProbabilityPass2;
2904 updateMpuTpuBuffersParams.presRepakDecisionSurface = &m_mpuTpuBuffers.resRepakDecisionSurface;
2905
2906 CODECHAL_ENCODE_CHK_STATUS_RETURN(KeyFrameUpdateMpuTpuBuffer(&updateMpuTpuBuffersParams));
2907 }
2908
2909 if (!m_mfxEncoderConfigCommandInitialized)
2910 {
2911 //Set MFX_VP8_ENCODER_CFG
2912 MOS_ZeroMemory(&encoderCfgParams, sizeof(encoderCfgParams));
2913 encoderCfgParams.bFirstPass = !(m_currPass);
2914 encoderCfgParams.bBRCEnabled = m_brcEnabled ? true : false;
2915 encoderCfgParams.dwCfgCmdOffset = HEADER_METADATA_OFFSET;
2916 encoderCfgParams.dwCfgBufferSize = PICTURE_STATE_SIZE;
2917 encoderCfgParams.pEncodeVP8SeqParams = m_vp8SeqParams;
2918 encoderCfgParams.pEncodeVP8PicParams = m_vp8PicParams;
2919 encoderCfgParams.pEncodeVP8QuantData = m_vp8QuantData;
2920
2921 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->InitMfxVp8EncoderCfgCmd(&m_mpuTpuBuffers.resPictureState, &encoderCfgParams));
2922 }
2923
2924 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
2925 stateHeapInterface,
2926 kernelState->KernelParams.iBTCount));
2927 m_vmeStatesSize =
2928 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
2929 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
2930
2931 if (m_mpuCurbeSetInBrcUpdate)
2932 {
2933 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2934 stateHeapInterface,
2935 kernelState,
2936 true,
2937 0,
2938 false,
2939 m_storeData));
2940 }
2941 else
2942 {
2943 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
2944 stateHeapInterface,
2945 kernelState,
2946 false,
2947 0,
2948 false,
2949 m_storeData));
2950
2951 MOS_ZeroMemory(&idParams, sizeof(idParams));
2952 idParams.pKernelState = kernelState;
2953 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
2954 stateHeapInterface,
2955 1,
2956 &idParams));
2957
2958 // Setup VP8 Curbe
2959 MOS_ZeroMemory(&mpuCurbeParams, sizeof(mpuCurbeParams));
2960 mpuCurbeParams.pPicParams = m_vp8PicParams;
2961 mpuCurbeParams.pSeqParams = m_vp8SeqParams;
2962 mpuCurbeParams.pVp8QuantData = m_vp8QuantData;
2963 mpuCurbeParams.ucKernelMode = m_kernelMode;
2964 mpuCurbeParams.bVmeKernelDump = m_vmeKernelDump;
2965 mpuCurbeParams.wPictureCodingType = m_pictureCodingType;
2966 mpuCurbeParams.EncFunctionType = encFunctionType;
2967 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetMpuCurbe(&mpuCurbeParams));
2968 }
2969
2970 CODECHAL_DEBUG_TOOL(
2971 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2972 encFunctionType,
2973 MHW_DSH_TYPE,
2974 kernelState));
2975 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
2976 encFunctionType,
2977 kernelState));
2978 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
2979 encFunctionType,
2980 MHW_ISH_TYPE,
2981 kernelState));
2982 )
2983
2984 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
2985
2986 sendKernelCmdsParams = SendKernelCmdsParams();
2987 sendKernelCmdsParams.EncFunctionType = encFunctionType;
2988 sendKernelCmdsParams.pKernelState = kernelState;
2989 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
2990
2991 // Add binding table
2992 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
2993 stateHeapInterface,
2994 kernelState));
2995
2996 //Add surface states
2997 MOS_ZeroMemory(&mpuSurfaceParams, sizeof(mpuSurfaceParams));
2998 mpuSurfaceParams.MediaStateType = encFunctionType;
2999 mpuSurfaceParams.dwHistogramSize = HISTOGRAM_SIZE;
3000 mpuSurfaceParams.dwModeProbabilitySize = MODE_PROPABILITIES_SIZE;
3001 mpuSurfaceParams.dwTokenProbabilitySize = COEFFS_PROPABILITIES_SIZE;
3002 mpuSurfaceParams.dwFrameHeaderSize = CODECHAL_VP8_FRAME_HEADER_SIZE;
3003 mpuSurfaceParams.dwHeaderMetadataSize = HEADER_METADATA_SIZE;
3004 mpuSurfaceParams.dwPictureStateSize = PICTURE_STATE_SIZE;
3005 mpuSurfaceParams.dwMpuBitstreamSize = MPU_BITSTREAM_SIZE;
3006 mpuSurfaceParams.dwTpuBitstreamSize = TPU_BITSTREAM_SIZE;
3007 mpuSurfaceParams.dwEntropyCostTableSize = ENTROPY_COST_TABLE_SIZE;
3008 mpuSurfaceParams.dwHeaderMetaDataOffset = m_brcEnabled ? 0 : HEADER_METADATA_OFFSET;
3009 mpuSurfaceParams.dwTokenBitsDataSize = TOKEN_BITS_DATA_SIZE;
3010 mpuSurfaceParams.dwKernelDumpSize = VP8_KERNEL_DUMP_SIZE;
3011 mpuSurfaceParams.bVMEKernelDump = m_vmeKernelDump;
3012 mpuSurfaceParams.presHistogram = &m_resHistogram;
3013 mpuSurfaceParams.presRefModeProbability = &m_mpuTpuBuffers.resRefModeProbs;
3014 mpuSurfaceParams.presModeProbability = &m_mpuTpuBuffers.resModeProbs;
3015 mpuSurfaceParams.presRefTokenProbability = &m_mpuTpuBuffers.resRefCoeffProbs;
3016 mpuSurfaceParams.presTokenProbability = &m_mpuTpuBuffers.resCoeffProbs;
3017 mpuSurfaceParams.presFrameHeader = &m_resFrameHeader;
3018 mpuSurfaceParams.presHeaderMetadata = m_brcEnabled ? &m_brcBuffers.resEncoderCfgCommandWriteBuffer : &m_mpuTpuBuffers.resPictureState;
3019 mpuSurfaceParams.presPictureState = &m_mpuTpuBuffers.resPictureState;
3020 mpuSurfaceParams.presMpuBitstream = &m_mpuTpuBuffers.resMpuBitstream;
3021 mpuSurfaceParams.presTpuBitstream = &m_mpuTpuBuffers.resTpuBitstream;
3022 mpuSurfaceParams.presVmeKernelDumpBuffer = &m_resVmeKernelDumpBuffer;
3023 mpuSurfaceParams.presEntropyCostTable = &m_mpuTpuBuffers.resEntropyCostTable;
3024 mpuSurfaceParams.presTokenBitsData = &m_mpuTpuBuffers.resTokenBitsData;
3025 mpuSurfaceParams.presModeCostUpdateBuffer = &m_resModeCostUpdateSurface;
3026 mpuSurfaceParams.pKernelState = kernelState;
3027
3028 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendMpuSurfaces(&cmdBuffer, &mpuSurfaceParams));
3029
3030 CODECHAL_DEBUG_TOOL(
3031 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
3032 encFunctionType,
3033 MHW_SSH_TYPE,
3034 kernelState));
3035
3036 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpBuffer(
3037 &m_resModeCostUpdateSurface,
3038 CodechalDbgAttr::attrInput,
3039 "ModeCostUpdate",
3040 16 * sizeof(uint32_t),
3041 0,
3042 CODECHAL_NUM_MEDIA_STATES));
3043 )
3044
3045 MOS_ZeroMemory(&mediaObjectParams, sizeof(mediaObjectParams));
3046 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObject(
3047 &cmdBuffer,
3048 nullptr,
3049 &mediaObjectParams));
3050
3051 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport( &cmdBuffer, encFunctionType));
3052
3053 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
3054 stateHeapInterface,
3055 kernelState));
3056 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
3057 stateHeapInterface));
3058
3059 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3060 m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
3061
3062 CODECHAL_DEBUG_TOOL(
3063 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3064 &cmdBuffer,
3065 encFunctionType,
3066 nullptr)));
3067
3068 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3069 m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
3070
3071 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
3072
3073 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3074 m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw));
3075
3076 return status;
3077 }
3078
TpuKernel()3079 MOS_STATUS CodechalEncodeVp8::TpuKernel()
3080 {
3081 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
3082 PMHW_KERNEL_STATE kernelState;
3083 MHW_INTERFACE_DESCRIPTOR_PARAMS idParams;
3084 struct CodechalVp8TpuCurbeParams tpuCurbeParams;
3085 struct CodechalVp8TpuSurfaceParams tpuSurfaceParams;
3086 struct CodechalBindingTableVp8Tpu bindingTable;
3087 SendKernelCmdsParams sendKernelCmdsParams;
3088 MHW_WALKER_PARAMS walkerParams;
3089 CODECHAL_WALKER_CODEC_PARAMS walkerCodecParams;
3090 MOS_COMMAND_BUFFER cmdBuffer;
3091 CODECHAL_MEDIA_STATE_TYPE encFunctionType;
3092 MHW_MEDIA_OBJECT_PARAMS mediaObjectParams;
3093 MOS_STATUS status = MOS_STATUS_SUCCESS;
3094
3095 CODECHAL_ENCODE_FUNCTION_ENTER;
3096
3097 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
3098 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
3099 CODECHAL_ENCODE_CHK_NULL_RETURN(m_refList);
3100
3101 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
3102 CODECHAL_ENCODE_CHK_NULL_RETURN(stateHeapInterface);
3103
3104 encFunctionType = CODECHAL_MEDIA_STATE_TPU_FHB;
3105 kernelState = &m_tpuKernelState;
3106 bindingTable = m_tpuBindingTable;
3107
3108 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnRequestSshSpaceForCmdBuf(
3109 stateHeapInterface,
3110 kernelState->KernelParams.iBTCount));
3111 m_vmeStatesSize =
3112 m_hwInterface->GetKernelLoadCommandSize(kernelState->KernelParams.iBTCount);
3113 CODECHAL_ENCODE_CHK_STATUS_RETURN(VerifySpaceAvailable());
3114
3115 if (m_tpuCurbeSetInBrcUpdate)
3116 {
3117 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
3118 stateHeapInterface,
3119 kernelState,
3120 true,
3121 0,
3122 false,
3123 m_storeData));
3124 }
3125 else
3126 {
3127 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->AssignDshAndSshSpace(
3128 stateHeapInterface,
3129 kernelState,
3130 false,
3131 0,
3132 false,
3133 m_storeData));
3134
3135 MOS_ZeroMemory(&idParams, sizeof(idParams));
3136 idParams.pKernelState = kernelState;
3137 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetInterfaceDescriptor(
3138 stateHeapInterface,
3139 1,
3140 &idParams));
3141
3142 // Setup VP8 Curbe
3143 MOS_ZeroMemory(&tpuCurbeParams, sizeof(struct CodechalVp8TpuCurbeParams));
3144 tpuCurbeParams.pPicParams = m_vp8PicParams;
3145 tpuCurbeParams.pSeqParams = m_vp8SeqParams;
3146 tpuCurbeParams.pVp8QuantData = m_vp8QuantData;
3147 tpuCurbeParams.ucKernelMode = m_kernelMode;
3148 tpuCurbeParams.bVmeKernelDump = m_vmeKernelDump;
3149 tpuCurbeParams.wPictureCodingType = m_pictureCodingType;
3150 tpuCurbeParams.EncFunctionType = encFunctionType;
3151 tpuCurbeParams.wPicWidthInMb = m_picWidthInMb;
3152 tpuCurbeParams.wFieldFrameHeightInMb = m_frameFieldHeightInMb;
3153 tpuCurbeParams.bRebinarizationFrameHdr = m_usRepakPassIterVal > 0 ? true : false;
3154 // Adaptive RePak can be enabled only when RePak is enabled
3155 tpuCurbeParams.bAdaptiveRePak = m_usRepakPassIterVal > 0 ? m_adaptiveRepakSupported : 0;
3156
3157 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetTpuCurbe(&tpuCurbeParams));
3158 }
3159
3160 CODECHAL_DEBUG_TOOL(
3161 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
3162 encFunctionType,
3163 MHW_DSH_TYPE,
3164 kernelState));
3165 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCurbe(
3166 encFunctionType,
3167 kernelState));
3168 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
3169 encFunctionType,
3170 MHW_ISH_TYPE,
3171 kernelState));
3172 )
3173
3174 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
3175
3176 sendKernelCmdsParams = SendKernelCmdsParams();
3177 sendKernelCmdsParams.EncFunctionType = encFunctionType;
3178 sendKernelCmdsParams.pKernelState = kernelState;
3179 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendGenericKernelCmds(&cmdBuffer, &sendKernelCmdsParams));
3180
3181 // Add binding table
3182 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSetBindingTable(
3183 stateHeapInterface,
3184 kernelState));
3185
3186 //Add surface states
3187 MOS_ZeroMemory(&tpuSurfaceParams, sizeof(tpuSurfaceParams));
3188 tpuSurfaceParams.MediaStateType = encFunctionType;
3189 tpuSurfaceParams.dwPakTokenStatsSize = TOKEN_STATISTICS_SIZE;
3190 tpuSurfaceParams.dwTokenProbabilitySize = COEFFS_PROPABILITIES_SIZE;
3191 tpuSurfaceParams.dwEntropyCostTableSize = ENTROPY_COST_TABLE_SIZE;
3192 tpuSurfaceParams.dwFrameHeaderSize = CODECHAL_VP8_FRAME_HEADER_SIZE;
3193 tpuSurfaceParams.dwPictureStateSize = PICTURE_STATE_SIZE;
3194 tpuSurfaceParams.dwMpuCurbeSize = TOKEN_BITS_DATA_SIZE;
3195 tpuSurfaceParams.dwHeaderMetadataSize = HEADER_METADATA_SIZE;
3196 tpuSurfaceParams.dwHeaderMetaDataOffset = m_brcEnabled ? 0 : HEADER_METADATA_OFFSET;
3197 tpuSurfaceParams.dwKernelDumpSize = VP8_KERNEL_DUMP_SIZE;
3198 tpuSurfaceParams.dwRepakDecision = REPAK_DECISION_BUF_SIZE;
3199 tpuSurfaceParams.bVMEKernelDump = m_vmeKernelDump;
3200 tpuSurfaceParams.presPakTokenStatistics = &m_mpuTpuBuffers.resPakTokenStatistics;
3201 tpuSurfaceParams.presPakTokenUpdateFlags = &m_mpuTpuBuffers.resPakTokenUpdateFlags;
3202 tpuSurfaceParams.presEntropyCostTable = &m_mpuTpuBuffers.resEntropyCostTable;
3203 tpuSurfaceParams.presFrameHeader = &m_resFrameHeader;
3204 tpuSurfaceParams.presDefaultTokenProbability = &m_mpuTpuBuffers.resDefaultTokenProbability;
3205 tpuSurfaceParams.presPictureState = &m_mpuTpuBuffers.resPictureState;
3206 tpuSurfaceParams.presMpuCurbeData = &m_mpuTpuBuffers.resTokenBitsData;
3207 tpuSurfaceParams.presHeaderMetadata = m_brcEnabled ? &m_brcBuffers.resEncoderCfgCommandWriteBuffer : &m_mpuTpuBuffers.resPictureState;
3208 tpuSurfaceParams.presCurrFrameTokenProbability = &m_mpuTpuBuffers.resCoeffProbs;
3209 tpuSurfaceParams.presHwTokenProbabilityPass1 = &m_mpuTpuBuffers.resRefCoeffProbs;
3210 tpuSurfaceParams.presKeyFrameTokenProbability = &m_mpuTpuBuffers.resKeyFrameTokenProbability;
3211 tpuSurfaceParams.presUpdatedFrameTokenProbability = &m_mpuTpuBuffers.resUpdatedTokenProbability;
3212 tpuSurfaceParams.presHwTokenProbabilityPass2 = &m_mpuTpuBuffers.resHwTokenProbabilityPass2;
3213 tpuSurfaceParams.presVmeKernelDumpBuffer = &m_resVmeKernelDumpBuffer;
3214 tpuSurfaceParams.presRepakDecisionSurface = &m_mpuTpuBuffers.resRepakDecisionSurface;
3215 tpuSurfaceParams.pKernelState = kernelState;
3216
3217 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendTpuSurfaces(&cmdBuffer, &tpuSurfaceParams));
3218
3219 CODECHAL_DEBUG_TOOL(
3220 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpKernelRegion(
3221 encFunctionType,
3222 MHW_SSH_TYPE,
3223 kernelState));
3224 )
3225
3226 MOS_ZeroMemory(&mediaObjectParams, sizeof(mediaObjectParams));
3227 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetRenderInterface()->AddMediaObject(
3228 &cmdBuffer,
3229 nullptr,
3230 &mediaObjectParams));
3231
3232 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport( &cmdBuffer, encFunctionType));
3233
3234 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnSubmitBlocks(
3235 stateHeapInterface,
3236 kernelState));
3237 CODECHAL_ENCODE_CHK_STATUS_RETURN(stateHeapInterface->pfnUpdateGlobalCmdBufId(
3238 stateHeapInterface));
3239
3240 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
3241
3242 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3243 &cmdBuffer,
3244 encFunctionType,
3245 nullptr)));
3246
3247 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3248 m_hwInterface->UpdateSSEuForCmdBuffer(&cmdBuffer, m_singleTaskPhaseSupported, m_lastTaskInPhase));
3249
3250 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
3251
3252 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_renderContextUsesNullHw));
3253
3254 return status;
3255 }
3256
ExecutePictureLevel()3257 MOS_STATUS CodechalEncodeVp8::ExecutePictureLevel()
3258 {
3259 MhwMiInterface *commonMiInterface;
3260 MOS_COMMAND_BUFFER cmdBuffer;
3261 MHW_VDBOX_PIPE_MODE_SELECT_PARAMS pipeModeSelectParams;
3262 MHW_VDBOX_SURFACE_PARAMS surfaceParams;
3263 MHW_VDBOX_PIPE_BUF_ADDR_PARAMS pipeBufAddrParams;
3264 MHW_VDBOX_IND_OBJ_BASE_ADDR_PARAMS indObjBaseAddrParams;
3265 MHW_VDBOX_VP8_BSP_BUF_BASE_ADDR_PARAMS vp8BspBufBaseAddrParams;
3266 MHW_MI_CONDITIONAL_BATCH_BUFFER_END_PARAMS miConditionalBatchBufferEndParams;
3267 MHW_BATCH_BUFFER batchBuffer;
3268 PerfTagSetting perfTag;
3269 uint8_t index, picIdx;
3270 int32_t i;
3271 MOS_STATUS status = MOS_STATUS_SUCCESS;
3272 bool deblockingEnable, suppressReconPic;
3273 bool newCommandBufferStarted = false;
3274
3275 CODECHAL_ENCODE_FUNCTION_ENTER;
3276
3277 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
3278 commonMiInterface = m_hwInterface->GetMiInterface();
3279
3280 perfTag.Value = 0;
3281 perfTag.Mode = (uint16_t)m_mode & CODECHAL_ENCODE_MODE_BIT_MASK;
3282 perfTag.CallType = CODECHAL_ENCODE_PERFTAG_CALL_PAK_ENGINE;
3283 perfTag.PictureCodingType = m_pictureCodingType;
3284 m_osInterface->pfnSetPerfTag(m_osInterface, perfTag.Value);
3285
3286 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
3287
3288 // set MFX_PIPE_MODE_SELECT values
3289 pipeModeSelectParams.Mode = m_mode;
3290 pipeModeSelectParams.bStreamOutEnabled = false;
3291 deblockingEnable = ((m_vp8PicParams->version == 0) || (m_vp8PicParams->version == 1)) ? 1 : 0;
3292 suppressReconPic =
3293 ((!m_refList[m_currReconstructedPic.FrameIdx]->bUsedAsRef) && m_suppressReconPicSupported);
3294 pipeModeSelectParams.bPreDeblockOutEnable = !deblockingEnable && !suppressReconPic;
3295 pipeModeSelectParams.bPostDeblockOutEnable = deblockingEnable && !suppressReconPic;
3296
3297 // set MFX_PIPE_BUF_ADDR_STATE values
3298 pipeBufAddrParams.Mode = m_mode;
3299 pipeBufAddrParams.psPreDeblockSurface = &m_reconSurface;
3300 pipeBufAddrParams.psPostDeblockSurface = &m_reconSurface;
3301 pipeBufAddrParams.psRawSurface = m_rawSurfaceToPak;
3302 pipeBufAddrParams.presStreamOutBuffer = &m_resStreamOutBuffer[m_currRecycledBufIdx];
3303 pipeBufAddrParams.presMfdDeblockingFilterRowStoreScratchBuffer = &m_resDeblockingFilterRowStoreScratchBuffer;
3304 pipeBufAddrParams.presMfdIntraRowStoreScratchBuffer = &m_resIntraRowStoreScratchBuffer;
3305
3306 CODECHAL_ENCODE_CHK_NULL_RETURN(m_mmcState);
3307 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_mmcState->SetPipeBufAddr(&pipeBufAddrParams));
3308
3309 // Setting invalid entries to nullptr
3310 for (i = 0; i < CODEC_MAX_NUM_REF_FRAME; i++)
3311 {
3312 pipeBufAddrParams.presReferences[i] = nullptr;
3313 }
3314
3315 if (m_pictureCodingType == P_TYPE)
3316 {
3317 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->LastRefPic))
3318 {
3319 index = m_vp8PicParams->LastRefPic.FrameIdx;
3320 pipeBufAddrParams.presReferences[0] = &(m_refList[index]->sRefBuffer.OsResource);
3321 }
3322
3323 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->GoldenRefPic))
3324 {
3325 index = m_vp8PicParams->GoldenRefPic.FrameIdx;
3326 pipeBufAddrParams.presReferences[1] = &(m_refList[index]->sRefBuffer.OsResource);
3327 }
3328
3329 if (!CodecHal_PictureIsInvalid(m_vp8PicParams->AltRefPic))
3330 {
3331 index = m_vp8PicParams->AltRefPic.FrameIdx;
3332 pipeBufAddrParams.presReferences[2] = &(m_refList[index]->sRefBuffer.OsResource);
3333 }
3334 }
3335 for (i = 0; i < CODEC_MAX_NUM_REF_FRAME_NON_AVC; i++)
3336 {
3337 if (m_picIdx[i].bValid)
3338 {
3339 picIdx = m_picIdx[i].ucPicIdx;
3340 CodecHalGetResourceInfo(
3341 m_osInterface,
3342 &(m_refList[picIdx]->sRefReconBuffer));
3343 pipeBufAddrParams.presReferences[i] = &(m_refList[picIdx]->sRefReconBuffer.OsResource);
3344 }
3345 }
3346
3347 // set MFX_SURFACE_STATE values
3348 MOS_ZeroMemory(&surfaceParams, sizeof(surfaceParams));
3349 surfaceParams.Mode = m_mode;
3350
3351 // set MFX_IND_OBJ_BASE_ADDR_STATE values
3352 MOS_ZeroMemory(&indObjBaseAddrParams, sizeof(indObjBaseAddrParams));
3353 indObjBaseAddrParams.Mode = CODECHAL_ENCODE_MODE_VP8;
3354 indObjBaseAddrParams.presMvObjectBuffer = &m_resMbCodeSurface;
3355 indObjBaseAddrParams.dwMvObjectOffset = m_mvOffset + m_mvBottomFieldOffset;
3356 indObjBaseAddrParams.dwMvObjectSize = m_mbCodeSize - m_mvOffset;
3357 indObjBaseAddrParams.presPakBaseObjectBuffer = &m_resBitstreamBuffer;
3358 indObjBaseAddrParams.presDataBuffer = &m_resBitstreamBuffer;
3359 indObjBaseAddrParams.dwPakBaseObjectSize = m_bitstreamUpperBound;
3360 indObjBaseAddrParams.dwDataSize = m_bitstreamUpperBound;
3361
3362 //set MFX_VP8_BSP_BUF_BASE_ADDR_STATE values
3363 MOS_ZeroMemory(&vp8BspBufBaseAddrParams, sizeof(vp8BspBufBaseAddrParams));
3364 vp8BspBufBaseAddrParams.presFrameHeaderBuffer = &m_resFrameHeader;
3365 vp8BspBufBaseAddrParams.presPakIntermediateBuffer = &m_resPakIntermediateBuffer;
3366 vp8BspBufBaseAddrParams.presPakFinalFrameBuffer = &m_resBitstreamBuffer;
3367 vp8BspBufBaseAddrParams.presTokenStatisticsBuffer = &m_mpuTpuBuffers.resPakTokenStatistics;
3368 vp8BspBufBaseAddrParams.presBsdMpcRowStoreScratchBuffer = &m_resMPCRowStoreScratchBuffer;
3369 vp8BspBufBaseAddrParams.dwPakIntermediatePartition0Size = ((m_frameWidth * m_frameHeight) / 4) + INTERMEDIATE_PARTITION0_SIZE;
3370 vp8BspBufBaseAddrParams.dwPakIntermediateTokenSize = (m_frameWidth * m_frameHeight * 2);
3371 vp8BspBufBaseAddrParams.dwPartitions = 1 << (m_vp8PicParams->CodedCoeffTokenPartition);
3372 vp8BspBufBaseAddrParams.presCoeffProbsBuffer = &m_mpuTpuBuffers.resCoeffProbs;
3373
3374 if (m_usRepakPassIterVal > 0 &&
3375 m_pictureCodingType == I_TYPE &&
3376 m_usRepakPassIterVal == m_currPass)
3377 {
3378 // When repak enabled, for I frames during repak pass assign key frame token prob. required by kernel
3379 vp8BspBufBaseAddrParams.presCoeffProbsBuffer = &m_mpuTpuBuffers.resKeyFrameTokenProbability;
3380 }
3381
3382 // Send command buffer header at the beginning
3383 if (!m_brcEnabled)
3384 {
3385 newCommandBufferStarted = true;
3386 }
3387 else
3388 {
3389 if (m_currPass == 0)
3390 {
3391 newCommandBufferStarted = true;
3392 }
3393 else if (m_currPass == m_usRepakPassIterVal && m_usRepakPassIterVal > 0)
3394 {
3395 newCommandBufferStarted = true;
3396 }
3397 }
3398
3399 if (newCommandBufferStarted)
3400 {
3401 CODECHAL_ENCODE_CHK_STATUS_RETURN(SendPrologWithFrameTracking(&cmdBuffer, false));
3402 }
3403
3404 // BRC 2-4th Pass (excludes RePAK)
3405 if (m_brcEnabled &&
3406 m_currPass > 0 &&
3407 (m_currPass < m_usRepakPassIterVal || m_usRepakPassIterVal == 0))
3408 {
3409 // Insert conditional batch buffer end
3410 MOS_ZeroMemory(
3411 &miConditionalBatchBufferEndParams,
3412 sizeof(MHW_MI_CONDITIONAL_BATCH_BUFFER_END_PARAMS));
3413
3414 miConditionalBatchBufferEndParams.presSemaphoreBuffer =
3415 &m_encodeStatusBuf.resStatusBuffer;
3416 miConditionalBatchBufferEndParams.dwOffset =
3417 (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize) +
3418 m_encodeStatusBuf.dwImageStatusMaskOffset +
3419 (sizeof(uint32_t) * 2);
3420 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiConditionalBatchBufferEndCmd(
3421 &cmdBuffer,
3422 &miConditionalBatchBufferEndParams));
3423 }
3424
3425 // RePAK needed for both CQP and BRC
3426 if ((m_usRepakPassIterVal > 0) && (m_currPass == m_usRepakPassIterVal))
3427 {
3428 // Execute RePAK based on decision from TPU kernel
3429 // by using conditional batch buffer end command
3430 MOS_ZeroMemory(
3431 &miConditionalBatchBufferEndParams,
3432 sizeof(MHW_MI_CONDITIONAL_BATCH_BUFFER_END_PARAMS));
3433
3434 miConditionalBatchBufferEndParams.presSemaphoreBuffer =
3435 &m_mpuTpuBuffers.resRepakDecisionSurface;
3436 miConditionalBatchBufferEndParams.dwOffset = 0;
3437
3438 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiConditionalBatchBufferEndCmd(
3439 &cmdBuffer,
3440 &miConditionalBatchBufferEndParams));
3441 }
3442
3443 if (!m_currPass && m_osInterface->bTagResourceSync)
3444 {
3445 // This is a short term WA to solve the sync tag issue: the sync tag write for PAK is inserted at the end of 2nd pass PAK BB
3446 // which may be skipped in multi-pass PAK enabled case. The idea here is to insert the previous frame's tag at the beginning
3447 // of the BB and keep the current frame's tag at the end of the BB. There will be a delay for tag update but it should be fine
3448 // as long as Dec/VP/Enc won't depend on this PAK so soon.
3449 MHW_MI_STORE_DATA_PARAMS Params;
3450 PMOS_RESOURCE resGlobalGpuContextSyncTagBuffer = nullptr;
3451 uint32_t dwValue;
3452
3453 CODECHAL_HW_CHK_STATUS_RETURN(m_osInterface->pfnGetGpuStatusBufferResource(
3454 m_osInterface,
3455 resGlobalGpuContextSyncTagBuffer));
3456 CODECHAL_HW_CHK_NULL_RETURN(resGlobalGpuContextSyncTagBuffer);
3457
3458 dwValue = m_osInterface->pfnGetGpuStatusTag(m_osInterface, m_osInterface->CurrentGpuContextOrdinal);
3459 Params.pOsResource = resGlobalGpuContextSyncTagBuffer;
3460 Params.dwResourceOffset = m_osInterface->pfnGetGpuStatusTagOffset(m_osInterface, m_osInterface->CurrentGpuContextOrdinal);
3461 Params.dwValue = (dwValue > 0) ? (dwValue - 1) : 0;
3462 CODECHAL_HW_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiStoreDataImmCmd(&cmdBuffer, &Params));
3463 }
3464
3465 CODECHAL_ENCODE_CHK_STATUS_RETURN(StartStatusReport(&cmdBuffer, CODECHAL_NUM_MEDIA_STATES));
3466
3467 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxPipeModeSelectCmd(&cmdBuffer, &pipeModeSelectParams));
3468
3469 // Ref surface
3470 surfaceParams.ucSurfaceStateId = CODECHAL_MFX_REF_SURFACE_ID;
3471 surfaceParams.psSurface = &m_reconSurface;
3472 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxSurfaceCmd(&cmdBuffer, &surfaceParams));
3473
3474 // Src surface
3475 surfaceParams.ucSurfaceStateId = CODECHAL_MFX_SRC_SURFACE_ID;
3476 surfaceParams.psSurface = m_rawSurfaceToPak;
3477 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxSurfaceCmd(&cmdBuffer, &surfaceParams));
3478
3479 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxPipeBufAddrCmd(&cmdBuffer, &pipeBufAddrParams));
3480
3481 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxIndObjBaseAddrCmd(&cmdBuffer, &indObjBaseAddrParams));
3482
3483 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMfxInterface()->AddMfxVp8BspBufBaseAddrCmd(&cmdBuffer, &vp8BspBufBaseAddrParams));
3484
3485 // MMIO register reads from PAK engine, different from PAK statistics buffer used for BrcUpdate kernel input
3486 // save Pak stats into dump buffer BEFORE every PAK pass execution for debugging
3487 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3488 SetPakStatsDebugBuffer(
3489 &cmdBuffer,
3490 &m_brcBuffers.resBrcPakStatsBeforeDumpBuffer,
3491 m_currPass * 48));
3492
3493 // Insert Batch Buffer Start command to MFX_VP8_PIC_STATE and MFX_VP8_ENCODER_CFG and BB end
3494
3495 // Insert Batch Buffer Start command to Pic State command
3496 MOS_ZeroMemory(&batchBuffer, sizeof(batchBuffer));
3497 batchBuffer.OsResource = m_mpuTpuBuffers.resPictureState;
3498 batchBuffer.bSecondLevel = true;
3499 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiBatchBufferStartCmd(
3500 &cmdBuffer,
3501 &batchBuffer));
3502
3503 if (m_brcEnabled)
3504 {
3505 // Insert Batch Buffer Start command to MFX_VP8_ENCODER_CFG Config States
3506 MOS_ZeroMemory(&batchBuffer, sizeof(batchBuffer));
3507 batchBuffer.OsResource = m_brcBuffers.resEncoderCfgCommandWriteBuffer;
3508 if (m_usRepakPassIterVal == 0)
3509 {
3510 //No repak in this case
3511 batchBuffer.dwOffset = m_currPass * BRC_IMG_STATE_SIZE_PER_PASS;
3512 }
3513 else
3514 {
3515 batchBuffer.dwOffset = m_usRepakPassIterVal == m_currPass ? 0 : m_currPass * BRC_IMG_STATE_SIZE_PER_PASS;
3516 }
3517 batchBuffer.bSecondLevel = true;
3518 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiBatchBufferStartCmd(
3519 &cmdBuffer,
3520 &batchBuffer));
3521 }
3522
3523 // Insert Batch Buffer Start command to send VP8_PAK_OBJ data for MBs in this slice
3524 MOS_ZeroMemory(&batchBuffer, sizeof(batchBuffer));
3525 batchBuffer.OsResource = m_resMbCodeSurface;
3526 batchBuffer.bSecondLevel = true;
3527
3528 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiBatchBufferStartCmd(
3529 &cmdBuffer,
3530 &batchBuffer));
3531
3532 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
3533
3534 return status;
3535 }
3536
SetPakStatsDebugBuffer(PMOS_COMMAND_BUFFER cmdBuffer,PMOS_RESOURCE pResource,uint32_t dwBaseOffset)3537 MOS_STATUS CodechalEncodeVp8::SetPakStatsDebugBuffer(PMOS_COMMAND_BUFFER cmdBuffer, PMOS_RESOURCE pResource, uint32_t dwBaseOffset)
3538 {
3539 MhwMiInterface *commonMiInterface;
3540 MHW_MI_STORE_REGISTER_MEM_PARAMS miStoreRegMemParams;
3541 MHW_MI_FLUSH_DW_PARAMS flushDwParams;
3542 MHW_MI_STORE_DATA_PARAMS storeDataParams;
3543 MmioRegistersMfx *mmioRegisters;
3544 MOS_STATUS status = MOS_STATUS_SUCCESS;
3545
3546 CODECHAL_ENCODE_FUNCTION_ENTER;
3547
3548 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
3549 CODECHAL_ENCODE_CHK_NULL_RETURN(pResource);
3550 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
3551
3552 commonMiInterface = m_hwInterface->GetMiInterface();
3553
3554 CODECHAL_ENCODE_CHK_COND_RETURN((m_vdboxIndex > m_hwInterface->GetMfxInterface()->GetMaxVdboxIndex()), "ERROR - vdbox index exceed the maximum");
3555 mmioRegisters = m_hwInterface->SelectVdboxAndGetMmioRegister(m_vdboxIndex, cmdBuffer);
3556
3557 // this is just for dump purpose after each PAK pass
3558 // doesn't have to do with order in CodecHalVp8_EncodeReadPakStatistics
3559 // this order can be changed based on driver need
3560 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
3561
3562 miStoreRegMemParams.presStoreBuffer = pResource;
3563 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 0;
3564 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8ImageStatusMaskRegOffset;
3565 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3566
3567 miStoreRegMemParams.presStoreBuffer = pResource;
3568 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 1;
3569 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8ImageStatusCtrlRegOffset;
3570 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3571
3572 miStoreRegMemParams.presStoreBuffer = pResource;
3573 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 2;
3574 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8BitstreamBytecountFrameRegOffset;
3575 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3576
3577 // Driver needs to read MFX_VP8_PIC_STATUS.DW4 / MFX_VP8_PIC_STATUS.DW5 (DeltaQindex / DeltaLoopFilter reads).
3578 // This would trigger HW to register DeltaQindex / DeltaLoopFilter to be used to update CumulativeDeltaQindex / CumulativeDeltaLoopFilter.
3579
3580 miStoreRegMemParams.presStoreBuffer = pResource;
3581 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 5;
3582 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex01RegOffset;
3583 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3584
3585 miStoreRegMemParams.presStoreBuffer = pResource;
3586 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 6;
3587 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex23RegOffset;
3588 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3589
3590 miStoreRegMemParams.presStoreBuffer = pResource;
3591 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 7;
3592 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter01RegOffset;
3593 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3594
3595 miStoreRegMemParams.presStoreBuffer = pResource;
3596 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 8;
3597 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter23RegOffset;
3598 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3599
3600 miStoreRegMemParams.presStoreBuffer = pResource;
3601 miStoreRegMemParams.dwOffset = dwBaseOffset + sizeof(uint32_t) * 9;
3602 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcConvergenceStatusRegOffset;
3603 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
3604
3605 return status;
3606 }
3607
AddBBEndToPicStateCmd()3608 MOS_STATUS CodechalEncodeVp8::AddBBEndToPicStateCmd()
3609 {
3610 MOS_LOCK_PARAMS lockFlagsWriteOnly;
3611 uint32_t *data;
3612 MOS_STATUS status = MOS_STATUS_SUCCESS;
3613
3614 CODECHAL_ENCODE_FUNCTION_ENTER;
3615
3616 //ADD BB End command to PIC_STATE_CMD
3617 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
3618 lockFlagsWriteOnly.WriteOnly = 1;
3619 data = (uint32_t *)m_osInterface->pfnLockResource(
3620 m_osInterface,
3621 &(m_mpuTpuBuffers.resPictureState),
3622 &lockFlagsWriteOnly);
3623
3624 if (data == nullptr)
3625 {
3626 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock VP8 Pic State CMD.");
3627 return MOS_STATUS_UNKNOWN;
3628 }
3629 data += 38;
3630 *data = 0x05000000; // BATCH Buffer End command.
3631 m_osInterface->pfnUnlockResource(m_osInterface, &m_mpuTpuBuffers.resPictureState);
3632
3633 return status;
3634 }
3635
EncodeSliceLevelBrc(PMOS_COMMAND_BUFFER cmdBuffer)3636 MOS_STATUS CodechalEncodeVp8::EncodeSliceLevelBrc(PMOS_COMMAND_BUFFER cmdBuffer)
3637 {
3638 MOS_SYNC_PARAMS syncParams;
3639 EncodeReadBrcPakStatsParams readBrcPakStatsParams;
3640 uint32_t dwOffset;
3641 uint32_t *data;
3642 MOS_LOCK_PARAMS lockFlagsWriteOnly;
3643 MOS_STATUS status = MOS_STATUS_SUCCESS;
3644
3645 CODECHAL_ENCODE_FUNCTION_ENTER;
3646
3647 dwOffset =
3648 (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize) +
3649 m_encodeStatusBuf.dwNumPassesOffset + // Num passes offset
3650 sizeof(uint32_t) * 2; // pEncodeStatus is offset by 2 DWs in the resource
3651
3652 // Read PaK statistics buffer here for next pass's use
3653 readBrcPakStatsParams.pHwInterface = m_hwInterface;
3654 readBrcPakStatsParams.presBrcPakStatisticBuffer = &m_brcBuffers.resBrcPakStatisticBuffer[0];
3655 readBrcPakStatsParams.VideoContext = m_videoContext;
3656 readBrcPakStatsParams.ucPass = m_currPass;
3657 readBrcPakStatsParams.presStatusBuffer = &m_encodeStatusBuf.resStatusBuffer;
3658 readBrcPakStatsParams.dwStatusBufNumPassesOffset = dwOffset;
3659
3660 // MMIO register reads from PAK engine, different from PAK statistics buffer used for BrcUpdate kernel input
3661 // save Pak stats into dump buffer "AFTER" every pass for debugging
3662 CODECHAL_ENCODE_CHK_STATUS_RETURN(
3663 SetPakStatsDebugBuffer(
3664 cmdBuffer,
3665 &m_brcBuffers.resBrcPakStatsAfterDumpBuffer,
3666 m_currPass * 48));
3667
3668 // LOAD_REG_MEM & STORE_REG_MEM in BRC flow diagram
3669 // LOAD_REG_MEM is only needed for 2nd-4th PAK pass
3670 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadBrcPakStatistics(
3671 cmdBuffer,
3672 &readBrcPakStatsParams));
3673
3674 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
3675 lockFlagsWriteOnly.WriteOnly = 1;
3676 data = (uint32_t *)m_osInterface->pfnLockResource(
3677 m_osInterface,
3678 &(m_mpuTpuBuffers.resPictureState),
3679 &lockFlagsWriteOnly);
3680
3681 if (data == nullptr)
3682 {
3683 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock Pic State Read Buffer.");
3684 return MOS_STATUS_UNKNOWN;
3685 }
3686 data += 38;
3687 *data = 0x05000000; // BATCH Buffer End command. Remove me once kernel is fixed.
3688 m_osInterface->pfnUnlockResource(m_osInterface, &m_mpuTpuBuffers.resPictureState);
3689
3690 // Write MFC MMIO register values to Tpu curbe (including cumulative QP & cumulative LF)
3691 CODECHAL_ENCODE_CHK_STATUS_RETURN(SetPakStatsInTpuCurbe(cmdBuffer));
3692
3693 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport( cmdBuffer, CODECHAL_NUM_MEDIA_STATES));
3694
3695 // 4th BRC PAK pass go inside if statement
3696 if (((m_usRepakPassIterVal > 0 && (m_currPass == m_numPasses - 1))) || // Repak enabled, last PAK pass before Repak
3697 (m_usRepakPassIterVal == 0 && m_currPass == m_numPasses)) // Repak disabled, last PAK pass
3698 {
3699 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(cmdBuffer, nullptr));
3700
3701 // last PAK pass except RePak
3702 std::string pakPassName = "PAK_PASS" + std::to_string(static_cast<uint32_t>(m_currPass));
3703 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3704 cmdBuffer,
3705 CODECHAL_NUM_MEDIA_STATES,
3706 pakPassName.data())));
3707
3708 m_osInterface->pfnReturnCommandBuffer(m_osInterface, cmdBuffer, 0);
3709
3710 // MFX should wait for RenderContext aka MPU kernel to finish on the render engine
3711 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
3712 {
3713 syncParams = g_cInitSyncParams;
3714 syncParams.GpuContext = m_videoContext;
3715 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
3716 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
3717 }
3718
3719 // Submit cmdBuffer at last BRC pass or at in the repak pass if repak is enabled.
3720 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, cmdBuffer, m_videoContextUsesNullHw));
3721
3722 // send signal from video, last PAK pass except RePAK
3723 if (m_signalEnc && !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
3724 {
3725 // signal semaphore
3726 syncParams = g_cInitSyncParams;
3727 syncParams.GpuContext = m_videoContext;
3728 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
3729
3730 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
3731 }
3732 }
3733 else // remaining PAK passes
3734 {
3735 std::string pakPassName = "PAK_PASS" + std::to_string(static_cast<uint32_t>(m_currPass));
3736 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3737 cmdBuffer,
3738 CODECHAL_NUM_MEDIA_STATES,
3739 pakPassName.data())));
3740
3741 m_osInterface->pfnReturnCommandBuffer(m_osInterface, cmdBuffer, 0);
3742 }
3743
3744 return status;
3745 }
3746
ExecuteSliceLevel()3747 MOS_STATUS CodechalEncodeVp8::ExecuteSliceLevel()
3748 {
3749 MOS_COMMAND_BUFFER cmdBuffer = {};
3750 MOS_SYNC_PARAMS syncParams = {};
3751 EncodeReadBrcPakStatsParams readBrcPakStatsParams = {};
3752 uint32_t *data = nullptr;
3753 MOS_LOCK_PARAMS lockFlagsWriteOnly = {};
3754 MOS_STATUS status = MOS_STATUS_SUCCESS;
3755
3756 CODECHAL_ENCODE_FUNCTION_ENTER;
3757
3758 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
3759 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
3760 CODECHAL_ENCODE_CHK_NULL_RETURN(m_osInterface);
3761 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnGetCommandBuffer(m_osInterface, &cmdBuffer, 0));
3762
3763 // read image status
3764 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadMfcStatus(&cmdBuffer));
3765
3766 if (m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses() == CODECHAL_ENCODE_BRC_SINGLE_PASS) // Multi-Pass BRC: disabled by default
3767 {
3768 // BRC PAK statistics different for each pass
3769 if (m_brcEnabled)
3770 {
3771 // Read PaK statistics buffer here for next frame's use
3772 readBrcPakStatsParams.pHwInterface = m_hwInterface;
3773 readBrcPakStatsParams.presBrcPakStatisticBuffer = &m_brcBuffers.resBrcPakStatisticBuffer[0];
3774 readBrcPakStatsParams.VideoContext = m_videoContext;
3775
3776 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadBrcPakStatistics(
3777 &cmdBuffer,
3778 &readBrcPakStatsParams));
3779
3780 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
3781 lockFlagsWriteOnly.WriteOnly = 1;
3782 data = (uint32_t *)m_osInterface->pfnLockResource(
3783 m_osInterface,
3784 &(m_mpuTpuBuffers.resPictureState),
3785 &lockFlagsWriteOnly);
3786
3787 if (data == nullptr)
3788 {
3789 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock BRC Encoder CFG Read Buffer.");
3790 return MOS_STATUS_UNKNOWN;
3791 }
3792 data += 38;
3793 *data = 0x05000000; // BATCH Buffer End command. Remove me once kernel is fixed.
3794 m_osInterface->pfnUnlockResource(m_osInterface, &m_mpuTpuBuffers.resPictureState);
3795 }
3796
3797 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport( &cmdBuffer, CODECHAL_NUM_MEDIA_STATES));
3798
3799 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
3800
3801 std::string Pak_pass = "PAK_PASS" + std::to_string(static_cast<uint32_t>(m_currPass));
3802 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3803 &cmdBuffer,
3804 CODECHAL_NUM_MEDIA_STATES,
3805 Pak_pass.data())));
3806 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
3807
3808 if (m_brcEnabled)
3809 {
3810 // RePAK waits for TPU kernel execution
3811 if ((m_currPass == 0 || m_currPass == m_usRepakPassIterVal) &&
3812 !Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
3813 {
3814 syncParams = g_cInitSyncParams;
3815 syncParams.GpuContext = m_videoContext;
3816 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
3817
3818 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
3819 }
3820 }
3821 else
3822 {
3823 // MFX should wait for RenderContext
3824 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
3825 {
3826 syncParams = g_cInitSyncParams;
3827 syncParams.GpuContext = m_videoContext;
3828 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
3829
3830 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
3831 }
3832 }
3833
3834 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_videoContextUsesNullHw));
3835
3836 if (m_brcEnabled)
3837 {
3838 if ((m_currPass == (m_numPasses - 1) || m_currPass == (m_numPasses)) &&
3839 m_signalEnc &&
3840 !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse)
3841 )
3842 {
3843
3844 // signal semaphore
3845 syncParams = g_cInitSyncParams;
3846 syncParams.GpuContext = m_videoContext;
3847 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
3848
3849 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
3850 }
3851 }
3852 else // CQP
3853 {
3854 //Signal TPU on first pak pass and MBEnc in second pak pass if next frame is P
3855 // PAK signals end of execution
3856 // I frame only case also needs to signal RePAK end (ucCurrPass = 1 && GopSize = 1)
3857 // since next frame render engine will always wait
3858 if (m_signalEnc &&
3859 !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse) &&
3860 ((m_currPass == 0) || (m_vp8SeqParams->GopPicSize >= 1)))
3861 {
3862 // signal semaphore
3863 syncParams = g_cInitSyncParams;
3864 syncParams.GpuContext = m_videoContext;
3865 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
3866
3867 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
3868 }
3869 }
3870 }
3871 else // Multi-Pass BRC: enabled
3872 {
3873 // PAK Passes except RePak
3874 if ((m_brcEnabled) &&
3875 ((m_currPass < m_numPasses && m_usRepakPassIterVal > 0) || // Repak enabled
3876 (m_currPass <= m_numPasses && m_usRepakPassIterVal == 0)) // Repak disabled
3877 )
3878 {
3879 CODECHAL_ENCODE_CHK_STATUS_RETURN(EncodeSliceLevelBrc(&cmdBuffer));
3880 }
3881 else // CQP PAK pass, RePak pass for CQP & BRC
3882 {
3883 // RePak pass for BRC
3884 if (m_brcEnabled)
3885 {
3886 uint32_t dwOffset;
3887
3888 dwOffset =
3889 (m_encodeStatusBuf.wCurrIndex * m_encodeStatusBuf.dwReportSize) +
3890 m_encodeStatusBuf.dwNumPassesOffset + // Num passes offset
3891 sizeof(uint32_t) * 2; // pEncodeStatus is offset by 2 DWs in the resource
3892
3893 // Read PaK statistics buffer here for next pass's use
3894 readBrcPakStatsParams.pHwInterface = m_hwInterface;
3895 readBrcPakStatsParams.presBrcPakStatisticBuffer = &m_brcBuffers.resBrcPakStatisticBuffer[0];
3896 readBrcPakStatsParams.VideoContext = m_videoContext;
3897
3898 readBrcPakStatsParams.ucPass = m_currPass;
3899 readBrcPakStatsParams.presStatusBuffer = &m_encodeStatusBuf.resStatusBuffer;
3900 readBrcPakStatsParams.dwStatusBufNumPassesOffset = dwOffset;
3901
3902 // LOAD_REG_MEM & STORE_REG_MEM in BRC flow diagram
3903 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadBrcPakStatistics(
3904 &cmdBuffer,
3905 &readBrcPakStatsParams));
3906 }
3907
3908 //TPU kernel call, CQP Pak pass and Repak pass below
3909 MOS_ZeroMemory(&lockFlagsWriteOnly, sizeof(MOS_LOCK_PARAMS));
3910 lockFlagsWriteOnly.WriteOnly = 1;
3911 data = (uint32_t *)m_osInterface->pfnLockResource(
3912 m_osInterface,
3913 &(m_mpuTpuBuffers.resPictureState),
3914 &lockFlagsWriteOnly);
3915
3916 if (data == nullptr)
3917 {
3918 CODECHAL_ENCODE_ASSERTMESSAGE("Failed to Lock BRC Picture State Write Buffer.");
3919 return MOS_STATUS_UNKNOWN;
3920 }
3921 data += 38;
3922 *data = 0x05000000; // BATCH Buffer End command. Remove me once kernel is fixed.
3923 m_osInterface->pfnUnlockResource(m_osInterface, &m_mpuTpuBuffers.resPictureState);
3924
3925 CODECHAL_ENCODE_CHK_STATUS_RETURN(EndStatusReport( &cmdBuffer, CODECHAL_NUM_MEDIA_STATES));
3926
3927 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_hwInterface->GetMiInterface()->AddMiBatchBufferEnd(&cmdBuffer, nullptr));
3928
3929 std::string pakPassName = "PAK_PASS" + std::to_string(static_cast<uint32_t>(m_currPass));
3930 CODECHAL_DEBUG_TOOL(CODECHAL_ENCODE_CHK_STATUS_RETURN(m_debugInterface->DumpCmdBuffer(
3931 &cmdBuffer,
3932 CODECHAL_NUM_MEDIA_STATES,
3933 pakPassName.data())));
3934 m_osInterface->pfnReturnCommandBuffer(m_osInterface, &cmdBuffer, 0);
3935
3936 // MFX should wait for CurrPass 0 and CurrPass 1
3937 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
3938 {
3939 syncParams = g_cInitSyncParams;
3940 syncParams.GpuContext = m_videoContext;
3941 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
3942
3943 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
3944 }
3945
3946 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnSubmitCommandBuffer(m_osInterface, &cmdBuffer, m_videoContextUsesNullHw));
3947
3948 // send signal from video, RePAK
3949 //Signal after every PAK
3950 if (m_signalEnc &&
3951 !Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
3952 {
3953 // signal semaphore
3954 syncParams = g_cInitSyncParams;
3955 syncParams.GpuContext = m_videoContext;
3956 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
3957
3958 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
3959 }
3960 }
3961 }
3962
3963 CODECHAL_DEBUG_TOOL(
3964 if (!m_mmcUserFeatureUpdated) {
3965 CODECHAL_UPDATE_ENCODE_MMC_USER_FEATURE(m_reconSurface, m_osInterface->pOsContext);
3966 m_mmcUserFeatureUpdated = true;
3967 })
3968
3969 // Reset parameters for next PAK execution
3970 if (m_currPass == m_numPasses)
3971 {
3972 m_newPpsHeader = 0;
3973 m_newSeqHeader = 0;
3974 }
3975
3976 //call the TPU kernel only once
3977 if (((m_currPass == m_numPasses - 1) && m_usRepakPassIterVal > 0) || // RePAK enabled: last PAK pass before RePAK
3978 (m_currPass == m_numPasses && m_usRepakPassIterVal == 0)) // RePAK disabled: last PAK pass
3979 {
3980 //call the TPU kernel
3981 m_osInterface->pfnSetGpuContext(m_osInterface, m_renderContext);
3982 m_osInterface->pfnResetOsStates(m_osInterface);
3983
3984 if (!Mos_ResourceIsNull(&m_resSyncObjectVideoContextInUse))
3985 {
3986 // TPU kernel waits for PAK execution
3987 syncParams = g_cInitSyncParams;
3988 syncParams.GpuContext = m_renderContext;
3989 syncParams.presSyncResource = &m_resSyncObjectVideoContextInUse;
3990
3991 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineWait(m_osInterface, &syncParams));
3992 }
3993
3994 CODECHAL_ENCODE_CHK_STATUS_RETURN(TpuKernel());
3995
3996 // if repak is enabled, then need to signal after TPU kernel execution
3997 // m_numPasses >= 1 even when RePak is disabled due to multi-pass BRC
3998 // fix needed since P frame RePAK can be disabled sometimes
3999 if (!Mos_ResourceIsNull(&m_resSyncObjectRenderContextInUse))
4000 {
4001 // TPU kernel signals RePAK after execution
4002 syncParams = g_cInitSyncParams;
4003 syncParams.GpuContext = m_renderContext;
4004 syncParams.presSyncResource = &m_resSyncObjectRenderContextInUse;
4005
4006 CODECHAL_ENCODE_CHK_STATUS_RETURN(m_osInterface->pfnEngineSignal(m_osInterface, &syncParams));
4007 }
4008
4009 m_osInterface->pfnSetGpuContext(m_osInterface, m_videoContext);
4010 m_osInterface->pfnResetOsStates(m_osInterface);
4011 }
4012
4013 return status;
4014 }
4015
ReadImageStatus(PMOS_COMMAND_BUFFER cmdBuffer)4016 MOS_STATUS CodechalEncodeVp8::ReadImageStatus(PMOS_COMMAND_BUFFER cmdBuffer)
4017 {
4018 MhwMiInterface *commonMiInterface = nullptr;
4019 EncodeStatusBuffer *encodeStatusBuf = nullptr;
4020 MHW_MI_STORE_REGISTER_MEM_PARAMS miStoreRegMemParams = {};
4021 MHW_MI_FLUSH_DW_PARAMS flushDwParams = {};
4022 uint32_t baseOffset = 0;
4023 MmioRegistersMfx *mmioRegisters = nullptr;
4024 MOS_STATUS status = MOS_STATUS_SUCCESS;
4025
4026 CODECHAL_ENCODE_FUNCTION_ENTER;
4027
4028 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
4029 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4030
4031 commonMiInterface = m_hwInterface->GetMiInterface();
4032
4033 CODECHAL_ENCODE_CHK_COND_RETURN((m_vdboxIndex > m_hwInterface->GetMfxInterface()->GetMaxVdboxIndex()), "ERROR - vdbox index exceed the maximum");
4034 mmioRegisters = m_hwInterface->SelectVdboxAndGetMmioRegister(m_vdboxIndex, cmdBuffer);
4035
4036 commonMiInterface = m_hwInterface->GetMiInterface();
4037 encodeStatusBuf = &m_encodeStatusBuf;
4038
4039 baseOffset =
4040 (encodeStatusBuf->wCurrIndex * m_encodeStatusBuf.dwReportSize) +
4041 sizeof(uint32_t) * 2; // pEncodeStatus is offset by 2 DWs in the resource
4042
4043 miStoreRegMemParams.presStoreBuffer = &encodeStatusBuf->resStatusBuffer;
4044 miStoreRegMemParams.dwOffset = baseOffset + encodeStatusBuf->dwImageStatusMaskOffset;
4045 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8ImageStatusMaskRegOffset;
4046 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4047
4048 miStoreRegMemParams.presStoreBuffer = &encodeStatusBuf->resStatusBuffer;
4049 miStoreRegMemParams.dwOffset = baseOffset + encodeStatusBuf->dwImageStatusCtrlOffset;
4050 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8ImageStatusCtrlRegOffset;
4051 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4052
4053 MOS_ZeroMemory(&flushDwParams, sizeof(flushDwParams));
4054 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiFlushDwCmd(cmdBuffer, &flushDwParams));
4055
4056 return status;
4057 }
4058
ReadMfcStatus(PMOS_COMMAND_BUFFER cmdBuffer)4059 MOS_STATUS CodechalEncodeVp8::ReadMfcStatus(PMOS_COMMAND_BUFFER cmdBuffer)
4060 {
4061 MhwMiInterface *commonMiInterface;
4062 EncodeStatusBuffer *encodeStatusBuf;
4063 MHW_MI_STORE_REGISTER_MEM_PARAMS miStoreRegMemParams;
4064 MHW_MI_FLUSH_DW_PARAMS flushDwParams;
4065 MmioRegistersMfx *mmioRegisters;
4066 uint32_t baseOffset;
4067 MOS_STATUS status = MOS_STATUS_SUCCESS;
4068
4069 CODECHAL_ENCODE_FUNCTION_ENTER;
4070
4071 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
4072 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4073
4074 commonMiInterface = m_hwInterface->GetMiInterface();
4075
4076 CODECHAL_ENCODE_CHK_COND_RETURN((m_vdboxIndex > m_hwInterface->GetMfxInterface()->GetMaxVdboxIndex()), "ERROR - vdbox index exceed the maximum");
4077 mmioRegisters = m_hwInterface->SelectVdboxAndGetMmioRegister(m_vdboxIndex, cmdBuffer);
4078
4079 encodeStatusBuf = &m_encodeStatusBuf;
4080
4081 baseOffset =
4082 (encodeStatusBuf->wCurrIndex * m_encodeStatusBuf.dwReportSize) +
4083 sizeof(uint32_t) * 2; // pEncodeStatus is offset by 2 DWs in the resource
4084
4085 MOS_ZeroMemory(&flushDwParams, sizeof(flushDwParams));
4086 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiFlushDwCmd(cmdBuffer, &flushDwParams));
4087
4088 miStoreRegMemParams.presStoreBuffer = &encodeStatusBuf->resStatusBuffer;
4089 miStoreRegMemParams.dwOffset = baseOffset + encodeStatusBuf->dwBSByteCountOffset;
4090 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8BitstreamBytecountFrameRegOffset;
4091 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4092
4093 CODECHAL_ENCODE_CHK_STATUS_RETURN(ReadImageStatus(cmdBuffer))
4094
4095 return status;
4096 }
4097
ReadBrcPakStatistics(PMOS_COMMAND_BUFFER cmdBuffer,EncodeReadBrcPakStatsParams * params)4098 MOS_STATUS CodechalEncodeVp8::ReadBrcPakStatistics(
4099 PMOS_COMMAND_BUFFER cmdBuffer,
4100 EncodeReadBrcPakStatsParams* params)
4101 {
4102 MhwMiInterface *commonMiInterface;
4103 MHW_MI_STORE_REGISTER_MEM_PARAMS miStoreRegMemParams;
4104 MHW_MI_FLUSH_DW_PARAMS flushDwParams;
4105 MHW_MI_STORE_DATA_PARAMS storeDataParams;
4106 MmioRegistersMfx *mmioRegisters;
4107 MOS_STATUS status = MOS_STATUS_SUCCESS;
4108
4109 CODECHAL_ENCODE_FUNCTION_ENTER;
4110
4111 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4112 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
4113 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pHwInterface->GetMiInterface());
4114 CODECHAL_ENCODE_CHK_NULL_RETURN(params->presBrcPakStatisticBuffer);
4115
4116 commonMiInterface = params->pHwInterface->GetMiInterface();
4117
4118 CODECHAL_ENCODE_CHK_COND_RETURN((m_vdboxIndex > m_hwInterface->GetMfxInterface()->GetMaxVdboxIndex()), "ERROR - vdbox index exceed the maximum");
4119 mmioRegisters = m_hwInterface->SelectVdboxAndGetMmioRegister(m_vdboxIndex, cmdBuffer);
4120
4121 // MI_FLUSH
4122 MOS_ZeroMemory(&flushDwParams, sizeof(flushDwParams));
4123 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiFlushDwCmd(cmdBuffer, &flushDwParams));
4124
4125 // PAK statistics buffer DW0, DW2, DW4 are used by BrcUpdate kernel exeuction in the next frame
4126
4127 // PAK stats needs to be updated from PAK pass number from (N)th PAK pass N: # of PAK pass executed
4128 if (params->ucPass < m_hwInterface->GetMfxInterface()->GetBrcNumPakPasses())
4129 {
4130 // MI_STORE_DATA_IMM
4131 MOS_ZeroMemory(&storeDataParams, sizeof(storeDataParams));
4132 storeDataParams.pOsResource = params->presBrcPakStatisticBuffer;
4133 storeDataParams.dwResourceOffset = sizeof(uint32_t) * 2;
4134 storeDataParams.dwValue = ((uint32_t)params->ucPass + 1) << 8;
4135 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreDataImmCmd(cmdBuffer, &storeDataParams));
4136 }
4137
4138 // MI_STORE_REGISTER_MEM - read from MMIO memory & write to buffer
4139 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4140 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4141 miStoreRegMemParams.dwOffset = 0;
4142 miStoreRegMemParams.dwRegister = mmioRegisters->mfcVP8BitstreamBytecountFrameRegOffset;
4143 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4144
4145 // Read following registers as this will trigger HW to register these values
4146 // and update cumulative Qp and LF registers for next pass
4147 // PAK statistics buffer (DW5-6 & DW9-13) is used to write these values
4148 // assuming BrcUpdate kernel doesn't need to use this later
4149 // Driver just need buffer to write these values, but driver doesn't need to use them later
4150 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4151 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4152 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 5;
4153 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcDQIndexRegOffset;
4154 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4155
4156 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4157 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4158 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 6;
4159 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcDLoopFilterRegOffset;
4160 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4161
4162 // PAK stats needs to be updated from QP/LF delta values from (N-1)th PAK pass N: # of PAK pass executed
4163 if (params->ucPass == 0) // need to update if # of maximum PAK pass > 2 in the future
4164 {
4165 // MFX_VP8_BRC_CumulativeDQindex01 MMIO register read needs to come after
4166 // MFX_VP8_BRC_DQindex & MFX_VP8_BRC_DLoopFilter MMIO register reads
4167 // otherwise, cumulative QP value will not be read correctly
4168 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4169 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4170 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 4;
4171 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex01RegOffset;
4172 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4173 }
4174
4175 // DW7-8 skipped on purpose since BrcUpdate Kernel started to use DW8 for Golden Ref Suggestion
4176 // dwMfxVP8BrcCumulativeDQIndex01RegOffset: already read with DW4 above
4177 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4178 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4179 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 9;
4180 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex01RegOffset;
4181 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4182
4183 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4184 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4185 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 10;
4186 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex23RegOffset;
4187 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4188
4189 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4190 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4191 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 11;
4192 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter01RegOffset;
4193 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4194
4195 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4196 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4197 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 12;
4198 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter23RegOffset;
4199 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4200
4201 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
4202 miStoreRegMemParams.presStoreBuffer = params->presBrcPakStatisticBuffer;
4203 miStoreRegMemParams.dwOffset = sizeof(uint32_t) * 13;
4204 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcConvergenceStatusRegOffset;
4205 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
4206
4207 return status;
4208 }
4209
GetStatusReport(EncodeStatus * pEncodeStatus,EncodeStatusReport * pEncodeStatusReport)4210 MOS_STATUS CodechalEncodeVp8::GetStatusReport(
4211 EncodeStatus *pEncodeStatus,
4212 EncodeStatusReport *pEncodeStatusReport)
4213 {
4214 uint32_t longTermIndication;
4215 uint32_t qindex;
4216 PMOS_RESOURCE pakBuffer;
4217 uint8_t *data;
4218 MOS_LOCK_PARAMS lockFlagsReadOnly;
4219 MOS_STATUS status = MOS_STATUS_SUCCESS;
4220
4221 CODECHAL_ENCODE_FUNCTION_ENTER;
4222
4223 CODECHAL_ENCODE_CHK_NULL_RETURN(pEncodeStatus);
4224 CODECHAL_ENCODE_CHK_NULL_RETURN(pEncodeStatusReport);
4225
4226 pakBuffer = &m_brcBuffers.resBrcPakStatisticBuffer[0];
4227
4228 MOS_ZeroMemory(&lockFlagsReadOnly, sizeof(MOS_LOCK_PARAMS));
4229 lockFlagsReadOnly.ReadOnly = 1;
4230
4231 data = (uint8_t*)m_osInterface->pfnLockResource(m_osInterface, pakBuffer, &lockFlagsReadOnly);
4232
4233 CODECHAL_ENCODE_CHK_NULL_RETURN(data);
4234
4235 longTermIndication = *(data + sizeof(uint32_t) * 8); // reading longterm reference suggestion
4236
4237 qindex = *(data + sizeof(uint32_t) * 4); // reading qindex
4238 qindex = qindex & 0x7f; // masking for 7 bits
4239
4240 m_osInterface->pfnUnlockResource(m_osInterface, pakBuffer);
4241
4242 pEncodeStatusReport->LongTermIndication = (uint8_t)longTermIndication;
4243
4244 pEncodeStatusReport->CodecStatus = CODECHAL_STATUS_SUCCESSFUL;
4245 pEncodeStatusReport->bitstreamSize = pEncodeStatus->dwMFCBitstreamByteCountPerFrame + pEncodeStatus->dwHeaderBytesInserted;
4246 pEncodeStatusReport->AverageQp = (uint8_t)qindex;
4247 // This loop filter value needs to revisit if the app needs to get a right value and do something
4248 pEncodeStatusReport->loopFilterLevel = pEncodeStatus->LoopFilterLevel;
4249
4250 return status;
4251 }
4252
SendBrcUpdateSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8BrcUpdateSurfaceParams * params)4253 MOS_STATUS CodechalEncodeVp8::SendBrcUpdateSurfaces(
4254 PMOS_COMMAND_BUFFER cmdBuffer,
4255 struct CodechalVp8BrcUpdateSurfaceParams* params)
4256 {
4257 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
4258 PMHW_KERNEL_STATE kernelState;
4259 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
4260 struct CodechalBindingTableVp8BrcUpdate* vp8BrcUpdateBindingTable;
4261 uint32_t size;
4262 MOS_RESOURCE *dsh = nullptr;
4263 MOS_STATUS status = MOS_STATUS_SUCCESS;
4264
4265 CODECHAL_ENCODE_FUNCTION_ENTER;
4266
4267 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
4268 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface());
4269 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface()->m_stateHeapInterface);
4270 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4271 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
4272 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncKernelState);
4273
4274 vp8BrcUpdateBindingTable = &m_brcUpdateBindingTable;
4275 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
4276 kernelState = params->pKernelState;
4277
4278 // 0. BRC history buffer
4279 size = ENCODE_VP8_BRC_HISTORY_BUFFER_SIZE;
4280 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4281 surfaceCodecParams.presBuffer = params->presBrcHistoryBuffer;
4282 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcHistoryBuffer;
4283 surfaceCodecParams.dwSize = size;
4284 surfaceCodecParams.bIsWritable = true;
4285 surfaceCodecParams.bRenderTarget = true;
4286 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4287 m_hwInterface,
4288 cmdBuffer,
4289 &surfaceCodecParams,
4290 kernelState));
4291
4292 // 1. PAK Statistics buffer
4293 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4294 surfaceCodecParams.presBuffer = params->presBrcPakStatisticBuffer;
4295 surfaceCodecParams.dwSize = params->dwBrcPakStatisticsSize;
4296 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcPakStatisticsOutputBuffer;
4297 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4298 m_hwInterface,
4299 cmdBuffer,
4300 &surfaceCodecParams,
4301 kernelState));
4302
4303 // 2. Encoder CFG command surface - read only
4304 size = BRC_IMG_STATE_SIZE_PER_PASS * 7;
4305 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4306 surfaceCodecParams.presBuffer = params->presVp8EncoderCfgCommandWriteBuffer;
4307 surfaceCodecParams.dwSize = size;
4308 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcEncoderCfgReadBuffer;
4309 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4310 m_hwInterface,
4311 cmdBuffer,
4312 &surfaceCodecParams,
4313 kernelState));
4314
4315 // 3. Encoder CFG command surface - write only
4316 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4317 surfaceCodecParams.presBuffer = params->presVp8EncoderCfgCommandWriteBuffer;
4318 surfaceCodecParams.dwSize = size;
4319 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcEncoderCfgWriteBuffer;
4320 surfaceCodecParams.bIsWritable = true;
4321 surfaceCodecParams.bRenderTarget = true;
4322 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4323 m_hwInterface,
4324 cmdBuffer,
4325 &surfaceCodecParams,
4326 kernelState));
4327
4328 // 4. BRC ENC CURBE Buffer - read only
4329 size = MOS_ALIGN_CEIL(
4330 params->pMbEncKernelState->KernelParams.iCurbeLength,
4331 stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
4332 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4333 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = params->pMbEncKernelState->m_dshRegion.GetResource());
4334 surfaceCodecParams.presBuffer = dsh;
4335 surfaceCodecParams.dwOffset =
4336 params->pMbEncKernelState->m_dshRegion.GetOffset() +
4337 params->pMbEncKernelState->dwCurbeOffset;
4338 surfaceCodecParams.dwSize = size;
4339 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcMbEncCurbeReadBuffer;
4340 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4341 m_hwInterface,
4342 cmdBuffer,
4343 &surfaceCodecParams,
4344 kernelState));
4345
4346 // 5. BRC ENC CURBE Buffer - write only
4347 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4348 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = params->pMbEncKernelState->m_dshRegion.GetResource());
4349 surfaceCodecParams.presBuffer = dsh;
4350 surfaceCodecParams.dwOffset =
4351 params->pMbEncKernelState->m_dshRegion.GetOffset() +
4352 params->pMbEncKernelState->dwCurbeOffset;
4353 surfaceCodecParams.dwSize = size;
4354 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcMbEncCurbeWriteData;
4355 surfaceCodecParams.bRenderTarget = true;
4356 surfaceCodecParams.bIsWritable = true;
4357 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4358 m_hwInterface,
4359 cmdBuffer,
4360 &surfaceCodecParams,
4361 kernelState));
4362
4363 // 6. VP8_ME BRC Distortion data buffer - input/output
4364 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4365 surfaceCodecParams.bIs2DSurface = true;
4366 surfaceCodecParams.bMediaBlockRW = true;
4367 surfaceCodecParams.psSurface = (params->wPictureCodingType == I_TYPE) ?
4368 params->psMeBrcDistortionBuffer : params->ps4xMeDistortionBuffer;
4369 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcDistortionBuffer;
4370 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4371 m_hwInterface,
4372 cmdBuffer,
4373 &surfaceCodecParams,
4374 kernelState));
4375
4376 // 7. BRC Constant Data Surface
4377 size = BRC_CONSTANTSURFACE_VP8;
4378 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4379 surfaceCodecParams.bRenderTarget = true;
4380 surfaceCodecParams.presBuffer = params->presVp8BrcConstantDataBuffer;
4381 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcConstantData;
4382 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4383 m_hwInterface,
4384 cmdBuffer,
4385 &surfaceCodecParams,
4386 kernelState));
4387
4388 // 8. Segmap surface - Enable this when Segmentation is enabled
4389 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4390 surfaceCodecParams.bIs2DSurface = true;
4391 surfaceCodecParams.psSurface = params->psSegmentationMap;
4392 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwVp8BrcSegmentationMap;
4393 surfaceCodecParams.bRenderTarget = true;
4394 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4395 m_hwInterface,
4396 cmdBuffer,
4397 &surfaceCodecParams,
4398 kernelState));
4399
4400 // 9. BRC Mpu CURBE Buffer - read only
4401 size = MOS_ALIGN_CEIL(
4402 m_mpuKernelState.KernelParams.iCurbeLength,
4403 stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
4404 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4405 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = m_mpuKernelState.m_dshRegion.GetResource());
4406 surfaceCodecParams.presBuffer = dsh;
4407 surfaceCodecParams.dwOffset =
4408 m_mpuKernelState.m_dshRegion.GetOffset() +
4409 m_mpuKernelState.dwCurbeOffset;
4410 surfaceCodecParams.dwSize = size;
4411 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcMpuCurbeReadBuffer;
4412 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4413 m_hwInterface,
4414 cmdBuffer,
4415 &surfaceCodecParams,
4416 kernelState));
4417
4418 // 10. BRC Mpu CURBE Buffer - write only
4419 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4420 memset(&dsh, 0, sizeof(dsh));
4421 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = m_mpuKernelState.m_dshRegion.GetResource());
4422 surfaceCodecParams.presBuffer = dsh;
4423 surfaceCodecParams.dwOffset =
4424 m_mpuKernelState.m_dshRegion.GetOffset() +
4425 m_mpuKernelState.dwCurbeOffset;
4426 surfaceCodecParams.dwSize = size;
4427 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcMpuCurbeWriteData;
4428 surfaceCodecParams.bRenderTarget = true;
4429 surfaceCodecParams.bIsWritable = true;
4430 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4431 m_hwInterface,
4432 cmdBuffer,
4433 &surfaceCodecParams,
4434 kernelState));
4435
4436 // 11. BRC Tpu CURBE Buffer - read only
4437 size = MOS_ALIGN_CEIL(
4438 m_tpuKernelState.KernelParams.iCurbeLength,
4439 stateHeapInterface->pStateHeapInterface->GetCurbeAlignment());
4440 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4441 memset(&dsh, 0, sizeof(dsh));
4442 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = m_tpuKernelState.m_dshRegion.GetResource());
4443 surfaceCodecParams.presBuffer = dsh;
4444 surfaceCodecParams.dwOffset =
4445 m_tpuKernelState.m_dshRegion.GetOffset() +
4446 m_tpuKernelState.dwCurbeOffset;
4447 surfaceCodecParams.dwSize = size;
4448 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcTpuCurbeReadBuffer;
4449 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4450 m_hwInterface,
4451 cmdBuffer,
4452 &surfaceCodecParams,
4453 kernelState));
4454
4455 // 12. BRC Tpu CURBE Buffer - write only
4456 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4457 memset(&dsh, 0, sizeof(dsh));
4458 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = m_tpuKernelState.m_dshRegion.GetResource());
4459 surfaceCodecParams.presBuffer = dsh;
4460 surfaceCodecParams.dwOffset =
4461 m_tpuKernelState.m_dshRegion.GetOffset() +
4462 m_tpuKernelState.dwCurbeOffset;
4463 surfaceCodecParams.dwSize = size;
4464 surfaceCodecParams.dwBindingTableOffset = vp8BrcUpdateBindingTable->dwBrcTpuCurbeWriteData;
4465 surfaceCodecParams.bRenderTarget = true;
4466 surfaceCodecParams.bIsWritable = true;
4467 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4468 m_hwInterface,
4469 cmdBuffer,
4470 &surfaceCodecParams,
4471 kernelState));
4472
4473 return status;
4474 }
4475
SendMeSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MeSurfaceParams * params)4476 MOS_STATUS CodechalEncodeVp8::SendMeSurfaces(
4477 PMOS_COMMAND_BUFFER cmdBuffer,
4478 struct CodechalVp8MeSurfaceParams* params)
4479 {
4480 PMOS_SURFACE scaledSurface, meMvDataBuffer;
4481 uint32_t width, height;
4482 uint8_t lastRefPicIdx, goldenRefPicIdx, alternateRefPicIdx, scaledIdx;
4483 PMHW_KERNEL_STATE kernelState;
4484 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
4485 struct CodechalBindingTableVp8Me* vp8MeBindingTable;
4486 CODECHAL_MEDIA_STATE_TYPE encMediaStateType;
4487 MOS_STATUS status = MOS_STATUS_SUCCESS;
4488
4489 CODECHAL_ENCODE_FUNCTION_ENTER;
4490
4491 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4492 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
4493 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
4494 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps16xMeMvDataBuffer);
4495 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMeBindingTable);
4496 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
4497
4498 kernelState = params->pKernelState;
4499
4500 encMediaStateType = params->b16xMeInUse ? CODECHAL_MEDIA_STATE_16X_ME : CODECHAL_MEDIA_STATE_4X_ME;
4501 vp8MeBindingTable = params->pMeBindingTable;
4502
4503 lastRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4504 goldenRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4505 alternateRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4506
4507 if (!CodecHal_PictureIsInvalid(*params->pLastRefPic))
4508 {
4509 lastRefPicIdx = params->pLastRefPic->FrameIdx;
4510 }
4511
4512 if (!CodecHal_PictureIsInvalid(*params->pGoldenRefPic))
4513 {
4514 goldenRefPicIdx = params->pGoldenRefPic->FrameIdx;
4515 }
4516
4517 if (!CodecHal_PictureIsInvalid(*params->pAlternateRefPic))
4518 {
4519 alternateRefPicIdx = params->pAlternateRefPic->FrameIdx;
4520 }
4521
4522 if (params->b16xMeInUse)
4523 {
4524 scaledSurface = m_trackedBuf->Get16xDsSurface(CODEC_CURR_TRACKED_BUFFER);
4525 meMvDataBuffer = params->ps16xMeMvDataBuffer;
4526 }
4527 else
4528 {
4529 scaledSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
4530 meMvDataBuffer = params->ps4xMeMvDataBuffer;
4531 }
4532
4533 width = params->dwDownscaledWidthInMb * 32;
4534 width = MOS_ALIGN_CEIL(width, 64);
4535
4536 height = params->dwDownscaledHeightInMb * 4 * CODECHAL_VP8_ME_ME_DATA_SIZE_MULTIPLIER;
4537
4538 // Force the values
4539 meMvDataBuffer->dwWidth = width;
4540 meMvDataBuffer->dwHeight = height;
4541 meMvDataBuffer->dwPitch = width;
4542
4543 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4544 surfaceCodecParams.bIs2DSurface = true;
4545 surfaceCodecParams.bMediaBlockRW = true;
4546 surfaceCodecParams.psSurface = meMvDataBuffer;
4547 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
4548 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MEMVDataSurface;
4549 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4550 m_hwInterface,
4551 cmdBuffer,
4552 &surfaceCodecParams,
4553 kernelState));
4554
4555 // Insert 16xMe Mv Buffer when 16xMe is enabled
4556 if (params->b16xMeEnabled)
4557 {
4558 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4559 surfaceCodecParams.bIs2DSurface = true;
4560 surfaceCodecParams.bMediaBlockRW = true;
4561 surfaceCodecParams.psSurface = params->ps16xMeMvDataBuffer;
4562 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
4563 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp816xMEMVDataSurface;
4564 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4565 m_hwInterface,
4566 cmdBuffer,
4567 &surfaceCodecParams,
4568 kernelState));
4569 }
4570
4571 // Insert Distortion buffers only for 4xMe case
4572 if (!params->b16xMeInUse)
4573 {
4574 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4575 surfaceCodecParams.bIs2DSurface = true;
4576 surfaceCodecParams.bMediaBlockRW = true;
4577 surfaceCodecParams.psSurface = params->psMeDistortionBuffer;
4578 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeDist;
4579 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
4580 surfaceCodecParams.bIsWritable = true;
4581 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4582 m_hwInterface,
4583 cmdBuffer,
4584 &surfaceCodecParams,
4585 kernelState));
4586
4587 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4588 surfaceCodecParams.bIs2DSurface = true;
4589 surfaceCodecParams.bMediaBlockRW = true;
4590 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer; // Using the Distortion buffer only, not yet allocated the BRC specifc distortion buffer
4591 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeBrcDist;
4592 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_ME_DISTORTION_ENCODE].Value;
4593 surfaceCodecParams.bIsWritable = true;
4594 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4595 m_hwInterface,
4596 cmdBuffer,
4597 &surfaceCodecParams,
4598 kernelState));
4599 }
4600
4601 // Current Picture - VME Inter Prediction Surface
4602 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4603 surfaceCodecParams.bUseAdvState = true;
4604 surfaceCodecParams.psSurface = scaledSurface;
4605 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
4606 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeCurrPic;
4607 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
4608 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4609 m_hwInterface,
4610 cmdBuffer,
4611 &surfaceCodecParams,
4612 kernelState));
4613
4614 // Refctrl uses 3 bits- bit zero is Last ref, bit 1 is golden ref and bit 2 is alt ref
4615
4616 //Last - set this ref surface only for appropriate RefCtrl value
4617 scaledIdx = params->ppRefList[lastRefPicIdx]->ucScalingIdx;
4618 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4619 surfaceCodecParams.bUseAdvState = true;
4620 surfaceCodecParams.psSurface = params->b16xMeInUse ? m_trackedBuf->Get16xDsSurface(scaledIdx) : m_trackedBuf->Get4xDsSurface(scaledIdx);
4621 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
4622 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
4623
4624 switch (params->RefCtrl)
4625 {
4626 case 1:
4627 case 3:
4628 case 5:
4629 case 7:
4630 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef1Pic;
4631 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4632 m_hwInterface,
4633 cmdBuffer,
4634 &surfaceCodecParams,
4635 kernelState));
4636 break;
4637 }
4638
4639 //Golden- set this ref surface only for appropriate RefCtrl value
4640 scaledIdx = params->ppRefList[goldenRefPicIdx]->ucScalingIdx;
4641 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4642 surfaceCodecParams.bUseAdvState = true;
4643 surfaceCodecParams.psSurface = params->b16xMeInUse ? m_trackedBuf->Get16xDsSurface(scaledIdx) : m_trackedBuf->Get4xDsSurface(scaledIdx);
4644 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
4645 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
4646
4647 switch (params->RefCtrl)
4648 {
4649 case 2:
4650 case 6:
4651 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef1Pic;
4652 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4653 m_hwInterface,
4654 cmdBuffer,
4655 &surfaceCodecParams,
4656 kernelState));
4657 break;
4658 case 3:
4659 case 7:
4660 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef2Pic;
4661 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4662 m_hwInterface,
4663 cmdBuffer,
4664 &surfaceCodecParams,
4665 kernelState));
4666 break;
4667 }
4668
4669 //Alt Ref- set this ref surface only for appropriate RefCtrl value
4670 scaledIdx = params->ppRefList[alternateRefPicIdx]->ucScalingIdx;
4671 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4672 surfaceCodecParams.bUseAdvState = true;
4673 surfaceCodecParams.psSurface = params->b16xMeInUse ? m_trackedBuf->Get16xDsSurface(scaledIdx) : m_trackedBuf->Get4xDsSurface(scaledIdx);
4674 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
4675 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
4676
4677 switch (params->RefCtrl)
4678 {
4679 case 4:
4680 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef1Pic;
4681 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4682 m_hwInterface,
4683 cmdBuffer,
4684 &surfaceCodecParams,
4685 kernelState));
4686 break;
4687 case 5:
4688 case 6:
4689 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef2Pic;
4690 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4691 m_hwInterface,
4692 cmdBuffer,
4693 &surfaceCodecParams,
4694 kernelState));
4695 break;
4696 case 7:
4697 surfaceCodecParams.dwBindingTableOffset = vp8MeBindingTable->dwVp8MeRef3Pic;
4698 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4699 m_hwInterface,
4700 cmdBuffer,
4701 &surfaceCodecParams,
4702 kernelState));
4703 break;
4704 }
4705
4706 return status;
4707 }
4708
SendTpuSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8TpuSurfaceParams * params)4709 MOS_STATUS CodechalEncodeVp8::SendTpuSurfaces(
4710 PMOS_COMMAND_BUFFER cmdBuffer,
4711 struct CodechalVp8TpuSurfaceParams* params)
4712 {
4713 uint32_t size;
4714 PMHW_KERNEL_STATE kernelState;
4715 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
4716 struct CodechalBindingTableVp8Tpu* vp8TpuBindingTable;
4717 MOS_STATUS status = MOS_STATUS_SUCCESS;
4718
4719 CODECHAL_ENCODE_FUNCTION_ENTER;
4720
4721 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4722 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
4723 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
4724
4725 vp8TpuBindingTable = &m_tpuBindingTable;
4726
4727 kernelState = params->pKernelState;
4728
4729 // Pak token statistics
4730 size = params->dwPakTokenStatsSize;
4731 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4732 surfaceCodecParams.dwSize = size;
4733 surfaceCodecParams.presBuffer = params->presPakTokenStatistics;
4734 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuPakTokenStatistics;
4735 surfaceCodecParams.bRenderTarget = true;
4736 surfaceCodecParams.bRawSurface = true;
4737 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4738 m_hwInterface,
4739 cmdBuffer,
4740 &surfaceCodecParams,
4741 kernelState));
4742
4743 // Pak token Update flags
4744 size = params->dwTokenProbabilitySize;
4745 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4746 surfaceCodecParams.dwSize = size;
4747 surfaceCodecParams.presBuffer = params->presPakTokenUpdateFlags;
4748 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuTokenUpdateFlags;
4749 surfaceCodecParams.bRenderTarget = true;
4750 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4751 m_hwInterface,
4752 cmdBuffer,
4753 &surfaceCodecParams,
4754 kernelState));
4755
4756 // Entropy cost
4757 size = params->dwEntropyCostTableSize;
4758 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4759 surfaceCodecParams.dwSize = size;
4760 surfaceCodecParams.presBuffer = params->presEntropyCostTable;
4761 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuEntropyCost;
4762 surfaceCodecParams.bRenderTarget = true;
4763 surfaceCodecParams.bRawSurface = true;
4764 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4765 m_hwInterface,
4766 cmdBuffer,
4767 &surfaceCodecParams,
4768 kernelState));
4769
4770 // Frame header
4771 size = params->dwFrameHeaderSize;
4772 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4773 surfaceCodecParams.dwSize = size;
4774 surfaceCodecParams.presBuffer = params->presFrameHeader;
4775 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuFrameHeaderBitstream;
4776 surfaceCodecParams.bRenderTarget = true;
4777 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4778 m_hwInterface,
4779 cmdBuffer,
4780 &surfaceCodecParams,
4781 kernelState));
4782
4783 // Default token token probability
4784 size = params->dwTokenProbabilitySize;
4785 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4786 surfaceCodecParams.dwSize = size;
4787 surfaceCodecParams.presBuffer = params->presDefaultTokenProbability;
4788 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuDefaultTokenProbability;
4789 surfaceCodecParams.bRenderTarget = true;
4790 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4791 m_hwInterface,
4792 cmdBuffer,
4793 &surfaceCodecParams,
4794 kernelState));
4795
4796 // Picture state surface
4797 size = params->dwPictureStateSize;
4798 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4799 surfaceCodecParams.dwSize = size;
4800 surfaceCodecParams.presBuffer = params->presPictureState;
4801 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuPictureState;
4802 surfaceCodecParams.bRenderTarget = true;
4803 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4804 m_hwInterface,
4805 cmdBuffer,
4806 &surfaceCodecParams,
4807 kernelState));
4808
4809 // MPU Curbe info from TPU
4810 size = params->dwMpuCurbeSize;
4811 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4812 surfaceCodecParams.dwSize = size;
4813 surfaceCodecParams.presBuffer = params->presMpuCurbeData;
4814 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuMpuCurbeData;
4815 surfaceCodecParams.bRenderTarget = true;
4816 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4817 m_hwInterface,
4818 cmdBuffer,
4819 &surfaceCodecParams,
4820 kernelState));
4821
4822 // Encoder CFG command surface
4823 size = params->dwHeaderMetadataSize;
4824 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4825 surfaceCodecParams.dwSize = size;
4826 surfaceCodecParams.dwOffset = params->dwHeaderMetaDataOffset;
4827 surfaceCodecParams.presBuffer = params->presHeaderMetadata;
4828 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuHeaderMetaData;
4829 surfaceCodecParams.bRenderTarget = true;
4830 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4831 m_hwInterface,
4832 cmdBuffer,
4833 &surfaceCodecParams,
4834 kernelState));
4835
4836 // Current frame token probability
4837 size = params->dwTokenProbabilitySize;
4838 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4839 surfaceCodecParams.dwSize = size;
4840 surfaceCodecParams.presBuffer = params->presCurrFrameTokenProbability;
4841 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuTokenProbability;
4842 surfaceCodecParams.bRenderTarget = true;
4843 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4844 m_hwInterface,
4845 cmdBuffer,
4846 &surfaceCodecParams,
4847 kernelState));
4848
4849 // Hardware token probability pass 1
4850 size = params->dwTokenProbabilitySize;
4851 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4852 surfaceCodecParams.dwSize = size;
4853 surfaceCodecParams.presBuffer = params->presHwTokenProbabilityPass1;
4854 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuPakHardwareTokenProbabilityPass1;
4855 surfaceCodecParams.bRenderTarget = true;
4856 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4857 m_hwInterface,
4858 cmdBuffer,
4859 &surfaceCodecParams,
4860 kernelState));
4861
4862 // key frame token probability
4863 size = params->dwTokenProbabilitySize;
4864 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4865 surfaceCodecParams.dwSize = size;
4866 surfaceCodecParams.presBuffer = params->presKeyFrameTokenProbability;
4867 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuKeyFrameTokenProbability;
4868 surfaceCodecParams.bRenderTarget = true;
4869 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4870 m_hwInterface,
4871 cmdBuffer,
4872 &surfaceCodecParams,
4873 kernelState));
4874
4875 // update token probability
4876 size = params->dwTokenProbabilitySize;
4877 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4878 surfaceCodecParams.dwSize = size;
4879 surfaceCodecParams.presBuffer = params->presUpdatedFrameTokenProbability;
4880 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuUpdatedTokenProbability;
4881 surfaceCodecParams.bRenderTarget = true;
4882 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4883 m_hwInterface,
4884 cmdBuffer,
4885 &surfaceCodecParams,
4886 kernelState));
4887
4888 // Hardware token probability pass 2
4889 size = params->dwTokenProbabilitySize;
4890 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4891 surfaceCodecParams.dwSize = size;
4892 surfaceCodecParams.presBuffer = params->presHwTokenProbabilityPass2;
4893 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuPakHardwareTokenProbabilityPass2;
4894 surfaceCodecParams.bRenderTarget = true;
4895 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4896 m_hwInterface,
4897 cmdBuffer,
4898 &surfaceCodecParams,
4899 kernelState));
4900
4901 if (params->bVMEKernelDump)
4902 {
4903 size = params->dwKernelDumpSize;
4904 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4905 surfaceCodecParams.presBuffer = params->presVmeKernelDumpBuffer;
4906 surfaceCodecParams.dwSize = size;
4907 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuKernelDebugDump;
4908 surfaceCodecParams.bRenderTarget = true;
4909 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4910 m_hwInterface,
4911 cmdBuffer,
4912 &surfaceCodecParams,
4913 kernelState));
4914 }
4915
4916 size = params->dwRepakDecision;
4917 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4918 surfaceCodecParams.dwSize = size;
4919 surfaceCodecParams.presBuffer = params->presRepakDecisionSurface;
4920 surfaceCodecParams.dwBindingTableOffset = vp8TpuBindingTable->dwVp8TpuRepakDecision;
4921 surfaceCodecParams.bRenderTarget = true;
4922 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4923 m_hwInterface,
4924 cmdBuffer,
4925 &surfaceCodecParams,
4926 kernelState));
4927
4928 return status;
4929 }
4930
SendMbEncSurfaces(PMOS_COMMAND_BUFFER cmdBuffer,struct CodechalVp8MbencSurfaceParams * params)4931 MOS_STATUS CodechalEncodeVp8::SendMbEncSurfaces(
4932 PMOS_COMMAND_BUFFER cmdBuffer,
4933 struct CodechalVp8MbencSurfaceParams* params)
4934 {
4935 uint32_t size;
4936 uint8_t lastRefPicIdx, goldenRefPicIdx, alternateRefPicIdx;
4937 PMHW_KERNEL_STATE kernelState;
4938 CODECHAL_SURFACE_CODEC_PARAMS surfaceCodecParams;
4939 struct CodechalBindingTableVp8Mbenc* vp8MbEncBindingTable;
4940 MOS_STATUS status = MOS_STATUS_SUCCESS;
4941 uint8_t vdirection, scaledIdx;
4942
4943 CODECHAL_ENCODE_FUNCTION_ENTER;
4944
4945 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
4946 CODECHAL_ENCODE_CHK_NULL_RETURN(params);
4947 CODECHAL_ENCODE_CHK_NULL_RETURN(params->psCurrPicSurface);
4948 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pMbEncBindingTable);
4949 CODECHAL_ENCODE_CHK_NULL_RETURN(params->pKernelState);
4950
4951 lastRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4952 goldenRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4953 alternateRefPicIdx = CODECHAL_ENCODE_VP8_INVALID_PIC_ID;
4954
4955 vp8MbEncBindingTable = params->pMbEncBindingTable;
4956
4957 m_osInterface = m_hwInterface->GetOsInterface();
4958 kernelState = params->pKernelState;
4959
4960 vdirection = CODECHAL_VDIRECTION_FRAME;
4961
4962 // Per-MB output data buffer
4963 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
4964 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4965 surfaceCodecParams.dwSize = size;
4966 surfaceCodecParams.bMediaBlockRW = true;
4967 surfaceCodecParams.presBuffer = params->presPerMB_MBCodeOpData;
4968 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMBOut;
4969 surfaceCodecParams.bRenderTarget = true;
4970 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4971 m_hwInterface,
4972 cmdBuffer,
4973 &surfaceCodecParams,
4974 kernelState));
4975
4976 // Current Picture Y
4977 CodecHalGetResourceInfo(m_osInterface, params->psCurrPicSurface);
4978
4979 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
4980 surfaceCodecParams.bIs2DSurface = true;
4981 surfaceCodecParams.bMediaBlockRW = true;
4982 surfaceCodecParams.bUseUVPlane = true;
4983 surfaceCodecParams.psSurface = params->psCurrPicSurface;
4984 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
4985 surfaceCodecParams.dwCacheabilityControl =
4986 m_hwInterface->ComposeSurfaceCacheabilityControl(
4987 MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE,
4988 (codechalL3 | codechalLLC));
4989 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncCurrY;
4990 surfaceCodecParams.dwUVBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncCurrUV;
4991 surfaceCodecParams.dwVerticalLineStride = params->dwVerticalLineStride;
4992 surfaceCodecParams.dwVerticalLineStrideOffset = params->dwVerticalLineStrideOffset;
4993
4994 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
4995 m_hwInterface,
4996 cmdBuffer,
4997 &surfaceCodecParams,
4998 kernelState));
4999
5000 // Current Picture - VME Prediction Surface
5001 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5002 surfaceCodecParams.bUseAdvState = true;
5003 surfaceCodecParams.psSurface = params->psCurrPicSurface;
5004 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
5005 surfaceCodecParams.dwCacheabilityControl =
5006 m_hwInterface->ComposeSurfaceCacheabilityControl(
5007 MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE,
5008 (codechalL3 | codechalLLC));
5009 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVME;
5010 surfaceCodecParams.ucVDirection = vdirection;
5011
5012 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5013 m_hwInterface,
5014 cmdBuffer,
5015 &surfaceCodecParams,
5016 kernelState));
5017
5018 if (params->wPictureCodingType == I_TYPE)
5019 {
5020 // MB Mode Cost Luma buffer
5021 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5022 surfaceCodecParams.bIs2DSurface = true;
5023 surfaceCodecParams.psSurface = params->psMBModeCostLumaBuffer;
5024 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
5025 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMBModeCostLuma;
5026 surfaceCodecParams.bRenderTarget = true;
5027 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5028 m_hwInterface,
5029 cmdBuffer,
5030 &surfaceCodecParams,
5031 kernelState));
5032
5033 // Block Mode Cost buffer
5034 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5035 surfaceCodecParams.bIs2DSurface = true;
5036 surfaceCodecParams.psSurface = params->psBlockModeCostBuffer;
5037 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
5038 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncBlockModeCost;
5039 surfaceCodecParams.bRenderTarget = true;
5040 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5041 m_hwInterface,
5042 cmdBuffer,
5043 &surfaceCodecParams,
5044 kernelState));
5045
5046 // Chroma Recon Buffer
5047 size = 64 * params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb;
5048 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5049 surfaceCodecParams.dwSize = size;
5050 surfaceCodecParams.presBuffer = params->psChromaReconBuffer;
5051 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
5052 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncChromaRecon;
5053 surfaceCodecParams.bRenderTarget = true;
5054 surfaceCodecParams.bIsWritable = true;
5055 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5056 m_hwInterface,
5057 cmdBuffer,
5058 &surfaceCodecParams,
5059 kernelState));
5060
5061 // Histogram
5062 size = params->dwHistogramSize;
5063 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5064 surfaceCodecParams.dwSize = size;
5065 //surfaceCodecParams.bMediaBlockRW = true;
5066 surfaceCodecParams.presBuffer = params->presHistogram;
5067 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_HISTOGRAM_ENCODE].Value;
5068 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncHistogram;
5069 surfaceCodecParams.bRenderTarget = true;
5070 surfaceCodecParams.bRawSurface = true;
5071 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5072 m_hwInterface,
5073 cmdBuffer,
5074 &surfaceCodecParams,
5075 kernelState));
5076
5077 if (params->bSegmentationEnabled)
5078 {
5079 // Segmentation map
5080 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5081 surfaceCodecParams.bIs2DSurface = true;
5082 surfaceCodecParams.psSurface = params->psSegmentationMap;
5083 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncSegmentationMap;
5084 surfaceCodecParams.bRenderTarget = true;
5085 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5086 m_hwInterface,
5087 cmdBuffer,
5088 &surfaceCodecParams,
5089 kernelState));
5090 }
5091
5092 // BRC distortion data buffer for I frame
5093 if (params->bMbEncIFrameDistInUse)
5094 {
5095 // Distortion Surface (output)
5096 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5097 surfaceCodecParams.bIs2DSurface = true;
5098 surfaceCodecParams.bMediaBlockRW = true;
5099 surfaceCodecParams.psSurface = params->psMeBrcDistortionBuffer;
5100 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_L3_LLC_ENCODE].Value;
5101 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncBRCDist;
5102 surfaceCodecParams.bIsWritable = true;
5103 surfaceCodecParams.bRenderTarget = true;
5104 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5105 m_hwInterface,
5106 cmdBuffer,
5107 &surfaceCodecParams,
5108 kernelState));
5109
5110 // Curr Y downscaled (input)
5111 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5112 surfaceCodecParams.bIs2DSurface = true;
5113 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
5114 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5115 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MbEncCurrYDownscaled;
5116 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
5117 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5118 m_hwInterface,
5119 cmdBuffer,
5120 &surfaceCodecParams,
5121 kernelState));
5122
5123 // VME Coarse Intra downscaled (input)
5124 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5125 surfaceCodecParams.bUseAdvState = true;
5126 surfaceCodecParams.psSurface = m_trackedBuf->Get4xDsSurface(CODEC_CURR_TRACKED_BUFFER);
5127 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5128 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVMECoarseIntra;
5129 surfaceCodecParams.ucVDirection = g_cMhw_VDirection[MHW_FRAME];
5130 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5131 m_hwInterface,
5132 cmdBuffer,
5133 &surfaceCodecParams,
5134 kernelState));
5135 }
5136 }
5137 else
5138 {
5139 // P_TYPE
5140 // MV data buffer
5141 size = CODECHAL_GET_WIDTH_IN_MACROBLOCKS(params->dwOriFrameWidth) * CODECHAL_GET_HEIGHT_IN_MACROBLOCKS(params->dwOriFrameHeight) * 64 /*64 * NumMBInFrame*/;
5142 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5143 surfaceCodecParams.dwSize = size;
5144 surfaceCodecParams.presBuffer = params->presPerMB_MBCodeOpData;
5145 surfaceCodecParams.bMediaBlockRW = true;
5146 surfaceCodecParams.dwOffset = params->dwMvOffset;
5147 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
5148 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncIndMVData;
5149 surfaceCodecParams.bRenderTarget = true;
5150 surfaceCodecParams.bIsWritable = true;
5151 surfaceCodecParams.bRawSurface = true;
5152 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5153 m_hwInterface,
5154 cmdBuffer,
5155 &surfaceCodecParams,
5156 kernelState));
5157
5158 // VP8_ME MV data buffer
5159 if (params->bHmeEnabled)
5160 {
5161 CODECHAL_ENCODE_CHK_NULL_RETURN(params->ps4xMeMvDataBuffer);
5162
5163 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5164 surfaceCodecParams.bIs2DSurface = true;
5165 surfaceCodecParams.bMediaBlockRW = true;
5166 surfaceCodecParams.psSurface = params->ps4xMeMvDataBuffer;
5167 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_MV_DATA_ENCODE].Value;
5168 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncMVDataFromME;
5169 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5170 m_hwInterface,
5171 cmdBuffer,
5172 &surfaceCodecParams,
5173 kernelState));
5174 }
5175
5176 //Reference Frame MB Count
5177 size = sizeof(uint32_t) * 8;
5178 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5179 surfaceCodecParams.dwSize = size;
5180 surfaceCodecParams.bMediaBlockRW = true;
5181 surfaceCodecParams.presBuffer = params->presRefMbCountSurface;
5182 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRefMBCount;
5183 surfaceCodecParams.bRenderTarget = true;
5184 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5185 m_hwInterface,
5186 cmdBuffer,
5187 &surfaceCodecParams,
5188 kernelState));
5189
5190 // VME Inter Prediction Surface
5191 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5192 surfaceCodecParams.bUseAdvState = true;
5193 surfaceCodecParams.psSurface = params->psCurrPicSurface;
5194 surfaceCodecParams.dwOffset = params->dwCurrPicSurfaceOffset;
5195 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5196 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncVMEInterPred;
5197 surfaceCodecParams.ucVDirection = vdirection;
5198 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5199 m_hwInterface,
5200 cmdBuffer,
5201 &surfaceCodecParams,
5202 kernelState));
5203
5204 if (!CodecHal_PictureIsInvalid(*params->pLastRefPic))
5205 {
5206 lastRefPicIdx = params->pLastRefPic->FrameIdx;
5207 }
5208
5209 if (!CodecHal_PictureIsInvalid(*params->pGoldenRefPic))
5210 {
5211 goldenRefPicIdx = params->pGoldenRefPic->FrameIdx;
5212 }
5213
5214 if (!CodecHal_PictureIsInvalid(*params->pAlternateRefPic))
5215 {
5216 alternateRefPicIdx = params->pAlternateRefPic->FrameIdx;
5217 }
5218
5219 // Last reference
5220 if (lastRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
5221 {
5222 // Picture Y VME
5223 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5224 surfaceCodecParams.bUseAdvState = true;
5225 surfaceCodecParams.psSurface = ¶ms->ppRefList[lastRefPicIdx]->sRefBuffer;
5226 surfaceCodecParams.ucVDirection = vdirection;
5227 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5228
5229 switch (params->uiRefCtrl)
5230 {
5231 case 1:
5232 case 3:
5233 case 5:
5234 case 7:
5235 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
5236 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5237 m_hwInterface,
5238 cmdBuffer,
5239 &surfaceCodecParams,
5240 kernelState));
5241 break;
5242 }
5243
5244 }
5245
5246 // Golden reference
5247 if (goldenRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
5248 {
5249 // Picture Y VME
5250 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5251 surfaceCodecParams.bUseAdvState = true;
5252 surfaceCodecParams.psSurface = ¶ms->ppRefList[goldenRefPicIdx]->sRefBuffer;
5253 surfaceCodecParams.ucVDirection = vdirection;
5254 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5255
5256 switch (params->uiRefCtrl)
5257 {
5258 case 2:
5259 case 6:
5260 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
5261 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5262 m_hwInterface,
5263 cmdBuffer,
5264 &surfaceCodecParams,
5265 kernelState));
5266 break;
5267 case 3:
5268 case 7:
5269 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef2Pic;
5270 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5271 m_hwInterface,
5272 cmdBuffer,
5273 &surfaceCodecParams,
5274 kernelState));
5275 break;
5276 }
5277
5278 }
5279
5280 // Alternate reference
5281 if (alternateRefPicIdx != CODECHAL_ENCODE_VP8_INVALID_PIC_ID)
5282 {
5283 // Picture Y VME
5284 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5285 surfaceCodecParams.bUseAdvState = true;
5286 surfaceCodecParams.psSurface = ¶ms->ppRefList[alternateRefPicIdx]->sRefBuffer;
5287 surfaceCodecParams.ucVDirection = vdirection;
5288 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_SURFACE_CURR_ENCODE].Value;
5289
5290 switch (params->uiRefCtrl)
5291 {
5292 case 4:
5293 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef1Pic;
5294 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5295 m_hwInterface,
5296 cmdBuffer,
5297 &surfaceCodecParams,
5298 kernelState));
5299 break;
5300 case 5:
5301 case 6:
5302 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef2Pic;
5303 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5304 m_hwInterface,
5305 cmdBuffer,
5306 &surfaceCodecParams,
5307 kernelState));
5308 break;
5309 case 7:
5310 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncRef3Pic;
5311 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5312 m_hwInterface,
5313 cmdBuffer,
5314 &surfaceCodecParams,
5315 kernelState));
5316 break;
5317 }
5318 }
5319
5320 //Per MB Quant Data Surface
5321 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5322 surfaceCodecParams.bIs2DSurface = true;
5323 surfaceCodecParams.bMediaBlockRW = true;
5324 surfaceCodecParams.psSurface = params->psPerMBQuantDataBuffer;
5325 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncPerMBQuantDataP;
5326 surfaceCodecParams.bRenderTarget = true;
5327 surfaceCodecParams.bIsWritable = true;
5328 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5329 m_hwInterface,
5330 cmdBuffer,
5331 &surfaceCodecParams,
5332 kernelState));
5333
5334 if (params->bSegmentationEnabled)
5335 {
5336 //Per Segmentation Map
5337 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5338 surfaceCodecParams.bIs2DSurface = true;
5339 surfaceCodecParams.psSurface = params->psSegmentationMap;
5340 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncSegmentationMap;
5341 surfaceCodecParams.bRenderTarget = true;
5342 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5343 m_hwInterface,
5344 cmdBuffer,
5345 &surfaceCodecParams,
5346 kernelState));
5347 }
5348
5349 //Inter Prediction Distortion Surface
5350 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5351 surfaceCodecParams.bIs2DSurface = true;
5352 surfaceCodecParams.psSurface = params->psInterPredictionDistortionSurface;
5353 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8InterPredDistortion;
5354 surfaceCodecParams.bRenderTarget = true;
5355 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5356 m_hwInterface,
5357 cmdBuffer,
5358 &surfaceCodecParams,
5359 kernelState));
5360
5361 //Per MV Data Surface
5362 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 16;
5363 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5364 surfaceCodecParams.dwSize = size;
5365 surfaceCodecParams.bMediaBlockRW = true;
5366 surfaceCodecParams.presBuffer = params->presPerMVDataSurface;
5367 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8PerMVDataSurface;
5368 surfaceCodecParams.bRenderTarget = true;
5369 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5370 m_hwInterface,
5371 cmdBuffer,
5372 &surfaceCodecParams,
5373 kernelState));
5374
5375 //MB/MV Counter Surface, initialize to zero
5376 size = params->dwHistogramSize;
5377 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5378 surfaceCodecParams.dwSize = size;
5379 surfaceCodecParams.presBuffer = params->presHistogram;
5380 surfaceCodecParams.dwCacheabilityControl = m_hwInterface->GetCacheabilitySettings()[MOS_CODEC_RESOURCE_USAGE_VP8_HISTOGRAM_ENCODE].Value;
5381 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBEncHistogram;
5382 surfaceCodecParams.bRenderTarget = true;
5383 surfaceCodecParams.bRawSurface = true;
5384 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5385 m_hwInterface,
5386 cmdBuffer,
5387 &surfaceCodecParams,
5388 kernelState));
5389
5390 //Mode Cost Update Surface, 64 bytes
5391 size = CODECHAL_VP8_MODE_COST_SURFACE_SIZE;
5392 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5393 surfaceCodecParams.dwSize = size;
5394 surfaceCodecParams.presBuffer = params->presModeCostUpdateSurface;
5395 surfaceCodecParams.dwBindingTableOffset = vp8MbEncBindingTable->dwVp8MBModeCostUpdateSurface;
5396 surfaceCodecParams.bRenderTarget = true;
5397 surfaceCodecParams.bRawSurface = true;
5398 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5399 m_hwInterface,
5400 cmdBuffer,
5401 &surfaceCodecParams,
5402 kernelState));
5403
5404 }
5405 // Kernel Debug Dump surface
5406 if (params->bVMEKernelDump)
5407 {
5408 size = params->dwFrameWidthInMb * params->dwFrameFieldHeightInMb * 32;
5409 MOS_ZeroMemory(&surfaceCodecParams, sizeof(CODECHAL_SURFACE_CODEC_PARAMS));
5410 surfaceCodecParams.presBuffer = params->presVmeKernelDumpBuffer;
5411 surfaceCodecParams.dwSize = size;
5412 surfaceCodecParams.dwOffset = params->dwMvOffset;
5413 surfaceCodecParams.dwBindingTableOffset = (params->wPictureCodingType == I_TYPE) ?
5414 vp8MbEncBindingTable->dwVp8MBEncVMEDebugStreamoutI : vp8MbEncBindingTable->dwVp8MBEncVMEDebugStreamoutP;
5415 surfaceCodecParams.bRenderTarget = true;
5416 CODECHAL_ENCODE_CHK_STATUS_RETURN(CodecHalSetRcsSurfaceState(
5417 m_hwInterface,
5418 cmdBuffer,
5419 &surfaceCodecParams,
5420 kernelState));
5421 }
5422
5423 return status;
5424 }
5425
SetPakStatsInTpuCurbe(PMOS_COMMAND_BUFFER cmdBuffer)5426 MOS_STATUS CodechalEncodeVp8::SetPakStatsInTpuCurbe(PMOS_COMMAND_BUFFER cmdBuffer)
5427 {
5428 MhwMiInterface *commonMiInterface;
5429 PMHW_STATE_HEAP_INTERFACE stateHeapInterface;
5430 MHW_MI_STORE_REGISTER_MEM_PARAMS miStoreRegMemParams;
5431 MHW_MI_FLUSH_DW_PARAMS flushDwParams;
5432 uint32_t baseOffset;
5433 PMOS_RESOURCE presTpuCurbeBuffer;
5434 MHW_MI_STORE_DATA_PARAMS storeDataParams;
5435 MmioRegistersMfx *mmioRegisters;
5436 MOS_RESOURCE *dsh = nullptr;
5437 MOS_STATUS status = MOS_STATUS_SUCCESS;
5438
5439 CODECHAL_ENCODE_FUNCTION_ENTER;
5440
5441 CODECHAL_ENCODE_CHK_NULL_RETURN(cmdBuffer);
5442 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface);
5443 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetMiInterface());
5444 CODECHAL_ENCODE_CHK_NULL_RETURN(m_hwInterface->GetRenderInterface()->m_stateHeapInterface);
5445
5446 commonMiInterface = m_hwInterface->GetMiInterface();
5447 stateHeapInterface = m_hwInterface->GetRenderInterface()->m_stateHeapInterface;
5448
5449 CODECHAL_ENCODE_CHK_COND_RETURN((m_vdboxIndex > m_hwInterface->GetMfxInterface()->GetMaxVdboxIndex()), "ERROR - vdbox index exceed the maximum");
5450 mmioRegisters = m_hwInterface->SelectVdboxAndGetMmioRegister(m_vdboxIndex, cmdBuffer);
5451
5452 CODECHAL_ENCODE_CHK_NULL_RETURN(dsh = m_tpuKernelState.m_dshRegion.GetResource());
5453 presTpuCurbeBuffer = dsh;
5454 CODECHAL_ENCODE_CHK_NULL_RETURN(presTpuCurbeBuffer);
5455
5456 baseOffset =
5457 m_tpuKernelState.m_dshRegion.GetOffset() +
5458 m_tpuKernelState.dwCurbeOffset;
5459
5460 MOS_ZeroMemory(&storeDataParams, sizeof(storeDataParams));
5461 storeDataParams.pOsResource = presTpuCurbeBuffer;
5462 storeDataParams.dwResourceOffset = baseOffset + sizeof(uint32_t) * 6;
5463 storeDataParams.dwValue = ((uint32_t)m_currPass + 1) << 8;
5464 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreDataImmCmd(cmdBuffer, &storeDataParams));
5465
5466 // TPU curbe needs to be updated from QP/LF delta values from (N-1)th PAK pass N: # of PAK pass executed
5467 if (m_currPass == 0) // need to update if # of maximum PAK pass > 2 in the future
5468 {
5469 MOS_ZeroMemory(&miStoreRegMemParams, sizeof(miStoreRegMemParams));
5470
5471 miStoreRegMemParams.presStoreBuffer = presTpuCurbeBuffer;
5472 miStoreRegMemParams.dwOffset = baseOffset + sizeof(uint32_t) * 8;
5473 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex01RegOffset;
5474 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
5475
5476 miStoreRegMemParams.presStoreBuffer = presTpuCurbeBuffer;
5477 miStoreRegMemParams.dwOffset = baseOffset + sizeof(uint32_t) * 9;
5478 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDQIndex23RegOffset;
5479 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
5480
5481 miStoreRegMemParams.presStoreBuffer = presTpuCurbeBuffer;
5482 miStoreRegMemParams.dwOffset = baseOffset + sizeof(uint32_t) * 10;
5483 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter01RegOffset;
5484 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
5485
5486 miStoreRegMemParams.presStoreBuffer = presTpuCurbeBuffer;
5487 miStoreRegMemParams.dwOffset = baseOffset + sizeof(uint32_t) * 11;
5488 miStoreRegMemParams.dwRegister = mmioRegisters->mfxVP8BrcCumulativeDLoopFilter23RegOffset;
5489 CODECHAL_ENCODE_CHK_STATUS_RETURN(commonMiInterface->AddMiStoreRegisterMemCmd(cmdBuffer, &miStoreRegMemParams));
5490 }
5491
5492 return status;
5493 }
5494
5495 #if USE_CODECHAL_DEBUG_TOOL
DumpVp8EncodePicParams(PCODEC_VP8_ENCODE_PIC_PARAMS picParams)5496 MOS_STATUS CodechalEncodeVp8::DumpVp8EncodePicParams(
5497 PCODEC_VP8_ENCODE_PIC_PARAMS picParams)
5498 {
5499 CODECHAL_DEBUG_FUNCTION_ENTER;
5500 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrPicParams))
5501 {
5502 return MOS_STATUS_SUCCESS;
5503 }
5504
5505 CODECHAL_DEBUG_CHK_NULL(picParams);
5506
5507 std::ostringstream oss;
5508 oss.setf(std::ios::showbase | std::ios::uppercase);
5509
5510 oss << "# DDI Parameters:" << std::endl;
5511 oss << "CurrOriginalPic = " << std::dec << +picParams->CurrOriginalPic.FrameIdx << std::endl;
5512 oss << "CurrReconstructedPic = " << std::dec << +picParams->CurrReconstructedPic.FrameIdx << std::endl;
5513 oss << "LastRefPic = " << std::dec << +picParams->LastRefPic.FrameIdx << std::endl;
5514 oss << "GoldenRefPic = " << std::dec << +picParams->GoldenRefPic.FrameIdx << std::endl;
5515 oss << "AltRefPic = " << std::dec << +picParams->AltRefPic.FrameIdx << std::endl;
5516 oss << "uPicFlags = " << std::dec << +picParams->uPicFlags << std::endl;
5517 oss << "frame_type: " << std::hex << +picParams->frame_type << std::endl;
5518 oss << "version: " << std::hex << +picParams->version << std::endl;
5519 oss << "show_frame: " << std::hex << +picParams->show_frame << std::endl;
5520 oss << "color_space: " << std::hex << +picParams->color_space << std::endl;
5521 oss << "clamping_type: " << std::hex << +picParams->clamping_type << std::endl;
5522 oss << "segmentation_enabled: " << std::hex << +picParams->segmentation_enabled << std::endl;
5523 oss << "update_mb_segmentation_map: " << std::hex << +picParams->update_mb_segmentation_map << std::endl;
5524 oss << "update_segment_feature_data: " << std::hex << +picParams->update_segment_feature_data << std::endl;
5525 oss << "filter_type: " << std::hex << +picParams->filter_type << std::endl;
5526 oss << "loop_filter_adj_enable: " << std::hex << +picParams->loop_filter_adj_enable << std::endl;
5527 oss << "CodedCoeffTokenPartition: " << std::hex << +picParams->CodedCoeffTokenPartition << std::endl;
5528 oss << "refresh_golden_frame: " << std::hex << +picParams->refresh_golden_frame << std::endl;
5529 oss << "refresh_alternate_frame: " << std::hex << +picParams->refresh_alternate_frame << std::endl;
5530 oss << "copy_buffer_to_golden: " << std::hex << +picParams->copy_buffer_to_golden << std::endl;
5531 oss << "copy_buffer_to_alternate: " << std::hex << +picParams->copy_buffer_to_alternate << std::endl;
5532 oss << "sign_bias_golden: " << std::hex << +picParams->sign_bias_golden << std::endl;
5533 oss << "sign_bias_alternate: " << std::hex << +picParams->sign_bias_alternate << std::endl;
5534 oss << "refresh_entropy_probs: " << std::hex << +picParams->refresh_entropy_probs << std::endl;
5535 oss << "refresh_last: " << std::hex << +picParams->refresh_last << std::endl;
5536 oss << "mb_no_coeff_skip: " << std::hex << +picParams->mb_no_coeff_skip << std::endl;
5537 oss << "forced_lf_adjustment: " << std::hex << +picParams->forced_lf_adjustment << std::endl;
5538 oss << "ref_frame_ctrl: " << std::hex << +picParams->ref_frame_ctrl << std::endl;
5539
5540 for (uint8_t i = 0; i < 4; ++i)
5541 {
5542 oss << "loop_filter_level[" << +i << "]: " << std::hex << +picParams->loop_filter_level[i] << std::endl;
5543 }
5544
5545 for (uint8_t i = 0; i < 4; ++i)
5546 {
5547 oss << "ref_lf_delta[" << +i << "]: " << std::hex << +picParams->ref_lf_delta[i] << std::endl;
5548 }
5549
5550 for (uint8_t i = 0; i < 4; ++i)
5551 {
5552 oss << "mode_lf_delta[" << +i << "]: " << std::hex << +picParams->mode_lf_delta[i] << std::endl;
5553 }
5554
5555 oss << "sharpness_level: " << std::hex << +picParams->sharpness_level << std::endl;
5556 oss << "StatusReportFeedbackNumber: " << std::hex << +picParams->StatusReportFeedbackNumber << std::endl;
5557 oss << "ClampQindexHigh: " << std::hex << +picParams->ClampQindexHigh << std::endl;
5558 oss << "ClampQindexLow: " << std::hex << +picParams->ClampQindexLow << std::endl;
5559 oss << "temporal_id: " << std::hex << +picParams->temporal_id << std::endl;
5560
5561 const char * fileName = m_debugInterface->CreateFileName(
5562 "_ENC",
5563 CodechalDbgBufferType::bufPicParams,
5564 CodechalDbgExtType::txt);
5565 std::ofstream ofs(fileName, std::ios::out);
5566 ofs << oss.str();
5567 ofs.close();
5568
5569 return MOS_STATUS_SUCCESS;
5570 }
5571
DumpVp8EncodeSeqParams(PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams)5572 MOS_STATUS CodechalEncodeVp8::DumpVp8EncodeSeqParams(
5573 PCODEC_VP8_ENCODE_SEQUENCE_PARAMS seqParams)
5574 {
5575 CODECHAL_DEBUG_FUNCTION_ENTER;
5576
5577 if (!m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrSeqParams))
5578 {
5579 return MOS_STATUS_SUCCESS;
5580 }
5581
5582 CODECHAL_DEBUG_CHK_NULL(seqParams);
5583
5584 std::ostringstream oss;
5585 oss.setf(std::ios::showbase | std::ios::uppercase);
5586
5587 oss << "# DDI Parameters:" << std::endl;
5588 oss << "FrameWidth = " << std::dec << +seqParams->FrameWidth << std::endl;
5589 oss << "FrameWidthScale = " << std::dec << +seqParams->FrameWidthScale << std::endl;
5590 oss << "FrameHeight = " << std::dec << +seqParams->FrameHeight << std::endl;
5591 oss << "FrameHeightScale = " << std::dec << +seqParams->FrameHeightScale << std::endl;
5592 oss << "GopPicSize = " << std::dec << +seqParams->GopPicSize << std::endl;
5593 oss << "TargetUsage = " << std::dec << +seqParams->TargetUsage << std::endl;
5594 oss << "RateControlMethod = " << std::dec << +seqParams->RateControlMethod << std::endl;
5595 oss << "TargetBitRate = " << std::dec << +seqParams->TargetBitRate[0] << std::endl;
5596 oss << "MaxBitRate = " << std::dec << +seqParams->MaxBitRate << std::endl;
5597 oss << "MinBitRate = " << std::dec << +seqParams->MinBitRate << std::endl;
5598 oss << "InitVBVBufferFullnessInBit = " << +seqParams->InitVBVBufferFullnessInBit << std::endl;
5599 oss << "VBVBufferSizeInBit = " << std::dec << +seqParams->VBVBufferSizeInBit << std::endl;
5600 // begining of union/struct
5601 oss << "# bResetBRC = " << std::dec << +seqParams->ResetBRC << std::endl;
5602 oss << "# bNoFrameHeaderInsertion = " << std::dec << +seqParams->NoFrameHeaderInsertion << std::endl;
5603 // Next 5 fields not currently implemented. nullptr output
5604 oss << "# UseRawReconRef = " << std::dec << +seqParams->UseRawReconRef << std::endl;
5605 oss << "# MBBRC = " << std::dec << +seqParams->MBBRC << std::endl;
5606 oss << "# bReserved = " << std::dec << +seqParams->bReserved << std::endl;
5607 oss << "# sFlags = " << std::dec << +seqParams->sFlags << std::endl;
5608 // end of union/struct
5609 oss << "UserMaxFrameSize = " << std::dec << +seqParams->UserMaxFrameSize << std::endl;
5610 oss << "FramesPer100Sec = " << std::dec << +seqParams->FramesPer100Sec[0] << std::endl;
5611
5612 const char * fileName = m_debugInterface->CreateFileName(
5613 "_DDIEnc",
5614 CodechalDbgBufferType::bufSeqParams,
5615 CodechalDbgExtType::txt);
5616
5617 std::ofstream ofs(fileName, std::ios::out);
5618 ofs << oss.str();
5619 ofs.close();
5620
5621 if (m_debugInterface->DumpIsEnabled(CodechalDbgAttr::attrDriverUltDump))
5622 {
5623 if (!m_debugInterface->m_ddiFileName.empty())
5624 {
5625 std::ofstream ofs(m_debugInterface->m_ddiFileName, std::ios::app);
5626 ofs << "SeqParamFile"
5627 << " = \"" << m_debugInterface->m_fileName << "\"" << std::endl;
5628 ofs.close();
5629 }
5630 }
5631
5632 return MOS_STATUS_SUCCESS;
5633 }
5634
DumpMbEncPakOutput(PCODEC_REF_LIST currRefList,CodechalDebugInterface * debugInterface)5635 MOS_STATUS CodechalEncodeVp8::DumpMbEncPakOutput(PCODEC_REF_LIST currRefList, CodechalDebugInterface* debugInterface)
5636 {
5637 CODECHAL_ENCODE_FUNCTION_ENTER;
5638 CODECHAL_ENCODE_CHK_NULL_RETURN(currRefList);
5639 CODECHAL_ENCODE_CHK_NULL_RETURN(debugInterface);
5640
5641 CODECHAL_ENCODE_CHK_STATUS_RETURN(debugInterface->DumpBuffer(
5642 &currRefList->resRefMbCodeBuffer,
5643 CodechalDbgAttr::attrOutput,
5644 "MbCode",
5645 m_picWidthInMb * m_picHeightInMb * 16 * 4,
5646 0,
5647 CODECHAL_MEDIA_STATE_ENC_NORMAL));
5648
5649 CODECHAL_ENCODE_CHK_STATUS_RETURN(debugInterface->DumpBuffer(
5650 &currRefList->resRefMbCodeBuffer,
5651 CodechalDbgAttr::attrOutput,
5652 "MVData",
5653 m_picWidthInMb * m_picHeightInMb * 16 * 4,
5654 m_mvOffset,
5655 CODECHAL_MEDIA_STATE_ENC_NORMAL));
5656
5657 return MOS_STATUS_SUCCESS;
5658 }
5659
5660 #endif
5661