/aosp_15_r20/external/ComputeLibrary/src/core/CL/cl_kernels/ |
H A D | load_store_utility.h | 36 #define STORE_ROW_1(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 40 #define STORE_ROW_2(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 45 #define STORE_ROW_3(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 50 #define STORE_ROW_4(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 55 #define STORE_ROW_5(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 60 #define STORE_ROW_6(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 65 #define STORE_ROW_7(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 70 #define STORE_ROW_8(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 75 #define STORE_ROW_9(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument 80 #define STORE_ROW_10(N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z) \ argument [all …]
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H A D | gemm_helpers.h | 103 #define LOAD_TENSOR_ROW_0(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 106 #define LOAD_TENSOR_ROW_1(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 109 #define LOAD_TENSOR_ROW_2(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 113 #define LOAD_TENSOR_ROW_3(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 117 #define LOAD_TENSOR_ROW_4(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 121 #define LOAD_TENSOR_ROW_5(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 125 #define LOAD_TENSOR_ROW_6(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 129 #define LOAD_TENSOR_ROW_7(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 133 #define LOAD_TENSOR_ROW_8(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument 137 #define LOAD_TENSOR_ROW_9(N0, DATA_TYPE, BASENAME, PTR, COL_OFFSET, STRIDE_Y, Z) \ argument [all …]
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H A D | tile_helpers.h | 352 #define GET_SPATIAL_IDX(IDX, N0, PARTIAL_N0) (max((int)(get_global_id(IDX) * N0 - (N0 - PARTIAL_N0)… argument 834 #define T_OFFSET_CORRECTION(ACC_DATA_TYPE, M0, N0, K0, SRC_OFFSET, WEI_OFFSET, lhs, rhs, dst) … argument 869 #define T_QUANTIZE8(SRC_DATA_TYPE, DST_DATA_TYPE, QUANTIZATION_TYPE, M0, N0, DST_OFFSET, DST_SHIFT,… argument 870 #define T_QUANTIZE8_STR(SRC_DATA_TYPE, DST_DATA_TYPE, QUANTIZATION_TYPE, M0, N0, DST_OFFSET, DST_SH… argument 886 #define T_QUANTIZE8_PER_TENSOR(SRC_DATA_TYPE, DST_DATA_TYPE, M0, N0, DST_OFFSET, DST_SHIFT, DST_MUL… argument 931 #define T_QUANTIZE8_PER_CHANNEL(SRC_DATA_TYPE, DST_DATA_TYPE, M0, N0, DST_OFFSET, DST_SHIFT, DST_MU… argument 976 #define T_QUANTIZE8_ASYMMETRIC(SRC_DATA_TYPE, DST_DATA_TYPE, M0, N0, DST_OFFSET, DST_SHIFT, DST_MUL… argument 1018 #define T_ROWSET_MASK(DATA_TYPE, M0, N0, VALUE_TO_SET, a, mask) … argument 1042 #define T_ACTIVATION(DATA_TYPE, M0, N0, ACTIVATION_TYPE, A_VAL, B_VAL, src, dst) \ argument 1083 #define T_ACTIVATION_QUANTIZED(DATA_TYPE, M0, N0, ACTIVATION_TYPE, ZERO_VALUE, A_VAL, B_VAL, src, d… argument [all …]
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/aosp_15_r20/external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
H A D | StringSwitch.h | 107 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 114 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 121 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 129 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 138 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 148 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 158 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 169 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 180 StringSwitch &Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 218 CasesLower(const char (&S0)[N0], const char (&S1)[N1], const T &Value) { in CasesLower() [all …]
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/aosp_15_r20/external/clang/test/CXX/temp/temp.spec/temp.expl.spec/ |
H A D | p2-0x.cpp | 20 namespace N0 { namespace 50 namespace N0 { namespace 87 namespace N0 { namespace 96 namespace N0 { namespace 140 namespace N0 { namespace 151 namespace N0 { namespace 176 namespace N0 { namespace 215 namespace N0 { namespace 247 namespace N0 { namespace
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H A D | p2.cpp | 21 namespace N0 { namespace 59 namespace N0 { namespace 117 namespace N0 { namespace 135 namespace N0 { namespace 146 namespace N0 { namespace 174 namespace N0 { namespace 216 namespace N0 { namespace 251 namespace N0 { namespace
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/aosp_15_r20/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 762 SDValue N0, N1, N2; in isOneUseSetCC() local 816 SDValue DAGCombiner::ReassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, in ReassociateOps() 1048 SDValue N0 = Op.getOperand(0); in PromoteIntBinOp() local 1106 SDValue N0 = Op.getOperand(0); in PromoteIntShiftOp() local 1500 SDValue N0 = N->getOperand(0); in combine() local 1634 SDValue N0 = N->getOperand(0); in visitADD() local 1781 SDValue N0 = N->getOperand(0); in visitADDC() local 1822 SDValue N0 = N->getOperand(0); in visitADDE() local 1853 SDValue N0 = N->getOperand(0); in visitSUB() local 1963 SDValue N0 = N->getOperand(0); in visitSUBC() local [all …]
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 948 SDValue N0, N1, N2; in isOneUseSetCC() local 1020 SDValue N0, in reassociationCanBreakAddressingModePattern() 1102 SDValue N0, SDValue N1) { in reassociateOpsCommutative() 1170 SDValue DAGCombiner::reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, in reassociateOps() 1380 SDValue N0 = Op.getOperand(0); in PromoteIntBinOp() local 1448 SDValue N0 = Op.getOperand(0); in PromoteIntShiftOp() local 1888 SDValue N0 = N->getOperand(0); in combine() local 2200 SDValue N0 = N->getOperand(0); in foldSelectWithIdentityConstant() local 2427 SDValue N0 = N->getOperand(0); in visitADDLike() local 2512 auto ReassociateAddOr = [&](SDValue N0, SDValue N1) { in visitADDLike() [all …]
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 844 SDValue N0, N1, N2; in isOneUseSetCC() local 891 SDValue N0, in reassociationCanBreakAddressingModePattern() 948 SDValue N0, SDValue N1) { in reassociateOpsCommutative() 978 SDValue DAGCombiner::reassociateOps(unsigned Opc, const SDLoc &DL, SDValue N0, in reassociateOps() 1202 SDValue N0 = Op.getOperand(0); in PromoteIntBinOp() local 1267 SDValue N0 = Op.getOperand(0); in PromoteIntShiftOp() local 1682 SDValue N0 = N->getOperand(0); in combine() local 2083 SDValue N0 = N->getOperand(0); in visitADDLike() local 2301 SDValue N0 = N->getOperand(0); in visitADD() local 2325 SDValue N0 = N->getOperand(0); in visitADDSAT() local [all …]
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/aosp_15_r20/external/ComputeLibrary/src/core/CL/cl_kernels/common/experimental/gemm_fused_post_ops/ |
H A D | fp_mixed_precision_helpers.h | 62 #define MIXED_PRECISION_ELTWISE_OP_BLOCK(OP, M0, N0, OPERAND1, OPERAND2, DATA_TYPE_ACCUMULATOR, CON… argument 66 #define MIXED_PRECISION_ELTWISE_OP_BLOCK(OP, M0, N0, OPERAND1, OPERAND2, DATA_TYPE_ACCUMULATOR, CON… argument 89 #define MIXED_PRECISION_ELTWISE_OP_BLOCK_BROADCAST(OP, M0, N0, OPERAND1, OPERAND2, DATA_TYPE_ACCUMU… argument 93 #define MIXED_PRECISION_ELTWISE_OP_BLOCK_BROADCAST(OP, M0, N0, OPERAND1, OPERAND2, DATA_TYPE_ACCUMU… argument 106 #define MIXED_PRECISION_STORE_BLOCK_BOUNDARY_AWARE(M0, N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z, P… argument 110 #define MIXED_PRECISION_STORE_BLOCK_BOUNDARY_AWARE(M0, N0, DATA_TYPE, BASENAME, PTR, STRIDE_Y, Z, P… argument
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/aosp_15_r20/external/rust/android-crates-io/crates/ring/src/arithmetic/ |
D | n0.rs | 19 pub(in super::super) struct N0([Limb; 2]); struct 21 impl N0 { implementation 26 impl From<u64> for N0 { implementation
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D | bigint.rs | 610 n0: &N0, in elem_exp_consttime() 625 n0: &N0, in elem_exp_consttime() 653 fn power_amm(table: &[Limb], state: &mut [Limb], n0: &N0, i: Window, num_limbs: usize) { in elem_exp_consttime() 766 fn limbs_mont_mul(r: &mut [Limb], a: &[Limb], m: &[Limb], n0: &N0, _cpu_features: cpu::Features) { in limbs_mont_mul() 788 n0: &N0, in limbs_mont_product() 808 fn limbs_mont_square(r: &mut [Limb], m: &[Limb], n0: &N0, _cpu_features: cpu::Features) { in limbs_mont_square()
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/aosp_15_r20/external/llvm/include/llvm/ADT/ |
H A D | StringSwitch.h | 91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 118 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases() 134 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], in Cases()
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/aosp_15_r20/external/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 660 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local 724 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned() local 816 SDValue N0 = Addr.getOperand(0); in SelectMUBUF() local 851 SDValue N0 = Addr.getOperand(0); in SelectMUBUF() local 919 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratch() local 1053 SDValue N0 = Offset.getOperand(0); in SelectMUBUFIntrinsicVOffset() local 1128 SDValue N0 = Addr.getOperand(0); in SelectSMRD() local 1199 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset() local
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/aosp_15_r20/external/llvm/unittests/Transforms/Utils/ |
H A D | ValueMapperTest.cpp | 76 MDNode *N0; // !0 = !{!1} in TEST() local 202 auto *N0 = MDTuple::get(C, None); in TEST() local 219 auto *N0 = MDTuple::get(C, None); in TEST() local 306 auto *N0 = MDTuple::get(C, None); in TEST() local
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/aosp_15_r20/external/ComputeLibrary/src/core/CL/cl_kernels/common/experimental/gemm_fused_post_ops/act_eltwise_op_act/ |
H A D | fp_post_ops_act_eltwise_op_act.h | 72 #define POST_OP2_ELTWISE_OP(OP, M0, N0, BASENAME, ELTWISE_OPERAND_NAME, ELTWISE_OPERAND_ROW, DATA_T… argument 78 #define POST_OP2_ELTWISE_OP(OP, M0, N0, BASENAME, ELTWISE_OPERAND_NAME, ELTWISE_OPERAND_ROW, DATA_T… argument 84 #define POST_OP2_ELTWISE_OP(OP, M0, N0, BASENAME, ELTWISE_OPERAND_NAME, ELTWISE_OPERAND_ROW, DATA_T… argument
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 608 SDValue N0 = Node->getOperand(0); in tryShrinkShlLogicImm() local 719 SDValue N0 = Node->getOperand(0); in Select() local 749 SDValue N0 = Node->getOperand(0); in Select() local 829 SDValue N0 = Node->getOperand(0); in Select() local 859 SDValue N0 = Node->getOperand(0); in Select() local 1058 SDValue N0 = Node->getOperand(0); in Select() local 2171 SDValue N0 = N.getOperand(0); in selectSHXADDOp() local 2220 SDValue N0 = N.getOperand(0); in selectSHXADDOp() local 2267 SDValue N0 = N.getOperand(0); in selectSHXADD_UWOp() local 2582 SDValue N0 = N->getOperand(0); in doPeepholeSExtW() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1190 SDValue N0 = N->getOperand(0); in tryOptimizeRem8Extend() local 1501 SDValue N0 = N.getOperand(0); in matchWrapper() local 3380 SDValue N0 = Node->getOperand(0); in matchBitExtract() local 3519 SDValue N0 = Node->getOperand(0); in matchBEXTRFromAndImm() local 3638 SDValue N0 = Node->getOperand(0); in emitPCMPISTR() local 3671 SDValue N0 = Node->getOperand(0); in emitPCMPESTR() local 4196 SDValue N0 = SetccOp0; in tryVPTESTM() local 4379 SDValue N0 = N->getOperand(0); in tryMatchBitSelect() local 4547 SDValue N0 = Node->getOperand(0); in Select() local 4596 SDValue N0 = Node->getOperand(0); in Select() local [all …]
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1440 SDValue N0 = N->getOperand(0); in tryOptimizeRem8Extend() local 1766 SDValue N0 = N.getOperand(0); in matchWrapper() local 3637 SDValue N0 = Node->getOperand(0); in matchBitExtract() local 3796 SDValue N0 = Node->getOperand(0); in matchBEXTRFromAndImm() local 3915 SDValue N0 = Node->getOperand(0); in emitPCMPISTR() local 3948 SDValue N0 = Node->getOperand(0); in emitPCMPESTR() local 4353 SDValue N0 = N->getOperand(0); in tryVPTERNLOG() local 4576 SDValue N0 = SetccOp0; in tryVPTESTM() local 4735 SDValue N0 = N->getOperand(0); in tryMatchBitSelect() local 5016 SDValue N0 = Node->getOperand(0); in Select() local [all …]
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/aosp_15_r20/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 746 SDValue N0 = N.getOperand(0); in matchWrapper() local 2036 SDValue N0 = Node->getOperand(0); in Select() local 2117 SDValue N0 = Node->getOperand(0); in Select() local 2134 SDValue N0 = Node->getOperand(0); in Select() local 2159 SDValue N0 = Node->getOperand(0); in Select() local 2318 SDValue N0 = Node->getOperand(0); in Select() local 2504 SDValue N0 = Node->getOperand(0); in Select() local
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/aosp_15_r20/external/libopus/celt/ |
H A D | bands.c | 275 int N0; in anti_collapse() local 483 int i, c, N0; in spreading_decision() local 583 static void deinterleave_hadamard(celt_norm *X, int N0, int stride, int hadamard) in deinterleave_hadamard() 609 static void interleave_hadamard(celt_norm *X, int N0, int stride, int hadamard) in interleave_hadamard() 632 void haar1(celt_norm *X, int N0, int stride) in haar1() 1114 int N0=N; in quant_band() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 725 SDValue &N0, SDValue &N1) { in getBaseWithOffsetUsingSplitOR() 1059 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local 1163 SDValue N0 = Addr.getOperand(0); in SelectDSReadWrite2() local 1254 SDValue N0 = Addr; in SelectMUBUF() local 1394 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratchOffen() local 1534 SDValue N0, N1; in SelectFlatOffsetImpl() local 1983 SDValue N0, N1; in SelectSMRDBaseOffset() local 2072 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset() local
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 1189 SDValue N0 = Addr.getOperand(0); in SelectDS1Addr1Offset() local 1264 SDValue N0 = Addr.getOperand(0); in SelectDS64Bit4ByteAligned() local 1365 SDValue N0 = Addr; in SelectMUBUF() local 1530 SDValue N0 = Addr.getOperand(0); in SelectMUBUFScratchOffen() local 1661 SDValue N0 = Addr.getOperand(0); in SelectFlatOffset() local 1830 SDValue N0 = Addr.getOperand(0); in SelectSMRD() local 1894 SDValue N0 = Index.getOperand(0); in SelectMOVRELOffset() local
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/aosp_15_r20/external/rust/android-crates-io/crates/der/src/tag/ |
D | number.rs | 26 pub const N0: Self = Self(0); constant
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/aosp_15_r20/external/rust/android-crates-io/crates/ring/src/arithmetic/bigint/ |
D | modulus.rs | 209 pub(super) fn n0(&self) -> &N0 { in n0() 290 pub(super) fn n0(&self) -> &N0 { in n0()
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