| /aosp_15_r20/external/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1128 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1247 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Restores() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1236 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1369 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Restores() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1762 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local
1895 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Restores() local
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| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 913 unsigned NextReg = CSI[i + 1].getReg(); in computeCalleeSaveRegisterPairs() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1210 unsigned NextReg = SrcReg; in getSrcVReg() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1082 unsigned NextReg = SrcReg; in getSrcVReg() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 1982 unsigned NextReg = CSI[i + 1].getReg(); in computeCalleeSaveRegisterPairs() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1412 Register NextReg = MI->getOperand(1).getReg(); in getTestBitReg() local
1466 Register NextReg; in getTestBitReg() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2583 Register NextReg = CSI[i + RegInc].getReg(); in computeCalleeSaveRegisterPairs() local
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceInstARM32.cpp | 1433 const Variable *NextReg = getStackReg(i); in emitUsingForm() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2230 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 5949 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6135 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2778 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local
|