1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __HAL_INTF_H__ 8 #define __HAL_INTF_H__ 9 10 11 enum { 12 RTW_PCIE = BIT0, 13 RTW_USB = BIT1, 14 RTW_SDIO = BIT2, 15 RTW_GSPI = BIT3, 16 }; 17 18 enum { 19 HW_VAR_MEDIA_STATUS, 20 HW_VAR_MEDIA_STATUS1, 21 HW_VAR_SET_OPMODE, 22 HW_VAR_MAC_ADDR, 23 HW_VAR_BSSID, 24 HW_VAR_INIT_RTS_RATE, 25 HW_VAR_BASIC_RATE, 26 HW_VAR_TXPAUSE, 27 HW_VAR_BCN_FUNC, 28 HW_VAR_CORRECT_TSF, 29 HW_VAR_CHECK_BSSID, 30 HW_VAR_MLME_DISCONNECT, 31 HW_VAR_MLME_SITESURVEY, 32 HW_VAR_MLME_JOIN, 33 HW_VAR_ON_RCR_AM, 34 HW_VAR_OFF_RCR_AM, 35 HW_VAR_BEACON_INTERVAL, 36 HW_VAR_SLOT_TIME, 37 HW_VAR_RESP_SIFS, 38 HW_VAR_ACK_PREAMBLE, 39 HW_VAR_SEC_CFG, 40 HW_VAR_SEC_DK_CFG, 41 HW_VAR_BCN_VALID, 42 HW_VAR_RF_TYPE, 43 HW_VAR_DM_FLAG, 44 HW_VAR_DM_FUNC_OP, 45 HW_VAR_DM_FUNC_SET, 46 HW_VAR_DM_FUNC_CLR, 47 HW_VAR_CAM_EMPTY_ENTRY, 48 HW_VAR_CAM_INVALID_ALL, 49 HW_VAR_CAM_WRITE, 50 HW_VAR_CAM_READ, 51 HW_VAR_AC_PARAM_VO, 52 HW_VAR_AC_PARAM_VI, 53 HW_VAR_AC_PARAM_BE, 54 HW_VAR_AC_PARAM_BK, 55 HW_VAR_ACM_CTRL, 56 HW_VAR_AMPDU_MIN_SPACE, 57 HW_VAR_AMPDU_FACTOR, 58 HW_VAR_RXDMA_AGG_PG_TH, 59 HW_VAR_SET_RPWM, 60 HW_VAR_CPWM, 61 HW_VAR_H2C_FW_PWRMODE, 62 HW_VAR_H2C_PS_TUNE_PARAM, 63 HW_VAR_H2C_FW_JOINBSSRPT, 64 HW_VAR_FWLPS_RF_ON, 65 HW_VAR_H2C_FW_P2P_PS_OFFLOAD, 66 HW_VAR_TDLS_WRCR, 67 HW_VAR_TDLS_INIT_CH_SEN, 68 HW_VAR_TDLS_RS_RCR, 69 HW_VAR_TDLS_DONE_CH_SEN, 70 HW_VAR_INITIAL_GAIN, 71 HW_VAR_TRIGGER_GPIO_0, 72 HW_VAR_BT_SET_COEXIST, 73 HW_VAR_BT_ISSUE_DELBA, 74 HW_VAR_CURRENT_ANTENNA, 75 HW_VAR_ANTENNA_DIVERSITY_LINK, 76 HW_VAR_ANTENNA_DIVERSITY_SELECT, 77 HW_VAR_SWITCH_EPHY_WoWLAN, 78 HW_VAR_EFUSE_USAGE, 79 HW_VAR_EFUSE_BYTES, 80 HW_VAR_EFUSE_BT_USAGE, 81 HW_VAR_EFUSE_BT_BYTES, 82 HW_VAR_FIFO_CLEARN_UP, 83 HW_VAR_CHECK_TXBUF, 84 HW_VAR_PCIE_STOP_TX_DMA, 85 HW_VAR_APFM_ON_MAC, /* Auto FSM to Turn On, include clock, isolation, power control for MAC only */ 86 /* The valid upper nav range for the HW updating, if the true value is larger than the upper range, the HW won't update it. */ 87 /* Unit in microsecond. 0 means disable this function. */ 88 HW_VAR_SYS_CLKR, 89 HW_VAR_NAV_UPPER, 90 HW_VAR_C2H_HANDLE, 91 HW_VAR_RPT_TIMER_SETTING, 92 HW_VAR_TX_RPT_MAX_MACID, 93 HW_VAR_H2C_MEDIA_STATUS_RPT, 94 HW_VAR_CHK_HI_QUEUE_EMPTY, 95 HW_VAR_DL_BCN_SEL, 96 HW_VAR_AMPDU_MAX_TIME, 97 HW_VAR_WIRELESS_MODE, 98 HW_VAR_USB_MODE, 99 HW_VAR_PORT_SWITCH, 100 HW_VAR_DO_IQK, 101 HW_VAR_DM_IN_LPS, 102 HW_VAR_SET_REQ_FW_PS, 103 HW_VAR_FW_PS_STATE, 104 HW_VAR_SOUNDING_ENTER, 105 HW_VAR_SOUNDING_LEAVE, 106 HW_VAR_SOUNDING_RATE, 107 HW_VAR_SOUNDING_STATUS, 108 HW_VAR_SOUNDING_FW_NDPA, 109 HW_VAR_SOUNDING_CLK, 110 HW_VAR_DL_RSVD_PAGE, 111 HW_VAR_MACID_SLEEP, 112 HW_VAR_MACID_WAKEUP, 113 }; 114 115 enum hal_def_variable { 116 HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, 117 HAL_DEF_IS_SUPPORT_ANT_DIV, 118 HAL_DEF_CURRENT_ANTENNA, 119 HAL_DEF_DRVINFO_SZ, 120 HAL_DEF_MAX_RECVBUF_SZ, 121 HAL_DEF_RX_PACKET_OFFSET, 122 HAL_DEF_DBG_DUMP_RXPKT,/* for dbg */ 123 HAL_DEF_DBG_DM_FUNC,/* for dbg */ 124 HAL_DEF_RA_DECISION_RATE, 125 HAL_DEF_RA_SGI, 126 HAL_DEF_PT_PWR_STATUS, 127 HAL_DEF_TX_LDPC, /* LDPC support */ 128 HAL_DEF_RX_LDPC, /* LDPC support */ 129 HAL_DEF_TX_STBC, /* TX STBC support */ 130 HAL_DEF_RX_STBC, /* RX STBC support */ 131 HAL_DEF_EXPLICIT_BEAMFORMER,/* Explicit Compressed Steering Capable */ 132 HAL_DEF_EXPLICIT_BEAMFORMEE,/* Explicit Compressed Beamforming Feedback Capable */ 133 HW_VAR_MAX_RX_AMPDU_FACTOR, 134 HW_DEF_RA_INFO_DUMP, 135 HAL_DEF_DBG_DUMP_TXPKT, 136 HW_DEF_FA_CNT_DUMP, 137 HW_DEF_ODM_DBG_FLAG, 138 HW_DEF_ODM_DBG_LEVEL, 139 HAL_DEF_TX_PAGE_SIZE, 140 HAL_DEF_TX_PAGE_BOUNDARY, 141 HAL_DEF_TX_PAGE_BOUNDARY_WOWLAN, 142 HAL_DEF_ANT_DETECT,/* to do for 8723a */ 143 HAL_DEF_PCI_SUUPORT_L1_BACKDOOR, /* Determine if the L1 Backdoor setting is turned on. */ 144 HAL_DEF_PCI_AMD_L1_SUPPORT, 145 HAL_DEF_PCI_ASPM_OSC, /* Support for ASPM OSC, added by Roger, 2013.03.27. */ 146 HAL_DEF_MACID_SLEEP, /* Support for MACID sleep */ 147 }; 148 149 enum hal_odm_variable { 150 HAL_ODM_STA_INFO, 151 HAL_ODM_P2P_STATE, 152 HAL_ODM_WIFI_DISPLAY_STATE, 153 HAL_ODM_NOISE_MONITOR, 154 }; 155 156 enum hal_intf_ps_func { 157 HAL_USB_SELECT_SUSPEND, 158 HAL_MAX_ID, 159 }; 160 161 typedef s32 (*c2h_id_filter)(u8 *c2h_evt); 162 163 struct hal_ops { 164 void (*SetHalODMVarHandler)(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet); 165 166 u8 (*Efuse_WordEnableDataWrite)(struct adapter *padapter, u16 efuse_addr, u8 word_en, u8 *data, bool bPseudoTest); 167 168 s32 (*xmit_thread_handler)(struct adapter *padapter); 169 void (*hal_notch_filter)(struct adapter *adapter, bool enable); 170 void (*hal_reset_security_engine)(struct adapter *adapter); 171 s32 (*c2h_handler)(struct adapter *padapter, u8 *c2h_evt); 172 c2h_id_filter c2h_id_filter_ccx; 173 174 s32 (*fill_h2c_cmd)(struct adapter *, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 175 }; 176 177 #define RF_CHANGE_BY_INIT 0 178 #define RF_CHANGE_BY_IPS BIT28 179 #define RF_CHANGE_BY_PS BIT29 180 #define RF_CHANGE_BY_HW BIT30 181 #define RF_CHANGE_BY_SW BIT31 182 183 #define GET_EEPROM_EFUSE_PRIV(adapter) (&adapter->eeprompriv) 184 #define is_boot_from_eeprom(adapter) (adapter->eeprompriv.EepromOrEfuse) 185 186 #define Rx_Pairwisekey 0x01 187 #define Rx_GTK 0x02 188 #define Rx_DisAssoc 0x04 189 #define Rx_DeAuth 0x08 190 #define Rx_ARPReq 0x09 191 #define FWDecisionDisconnect 0x10 192 #define Rx_MagicPkt 0x21 193 #define Rx_UnicastPkt 0x22 194 #define Rx_PatternPkt 0x23 195 #define RX_PNOWakeUp 0x55 196 #define AP_WakeUp 0x66 197 198 void rtw_hal_def_value_init(struct adapter *padapter); 199 200 void rtw_hal_free_data(struct adapter *padapter); 201 202 void rtw_hal_dm_init(struct adapter *padapter); 203 void rtw_hal_dm_deinit(struct adapter *padapter); 204 205 uint rtw_hal_init(struct adapter *padapter); 206 uint rtw_hal_deinit(struct adapter *padapter); 207 void rtw_hal_stop(struct adapter *padapter); 208 void rtw_hal_set_hwreg(struct adapter *padapter, u8 variable, u8 *val); 209 void rtw_hal_get_hwreg(struct adapter *padapter, u8 variable, u8 *val); 210 211 void rtw_hal_set_hwreg_with_buf(struct adapter *padapter, u8 variable, u8 *pbuf, int len); 212 213 void rtw_hal_chip_configure(struct adapter *padapter); 214 void rtw_hal_read_chip_info(struct adapter *padapter); 215 void rtw_hal_read_chip_version(struct adapter *padapter); 216 217 u8 rtw_hal_set_def_var(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue); 218 u8 rtw_hal_get_def_var(struct adapter *padapter, enum hal_def_variable eVariable, void *pValue); 219 220 void rtw_hal_set_odm_var(struct adapter *padapter, enum hal_odm_variable eVariable, void *pValue1, bool bSet); 221 222 void rtw_hal_enable_interrupt(struct adapter *padapter); 223 void rtw_hal_disable_interrupt(struct adapter *padapter); 224 225 u8 rtw_hal_check_ips_status(struct adapter *padapter); 226 227 s32 rtw_hal_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe); 228 s32 rtw_hal_xmit(struct adapter *padapter, struct xmit_frame *pxmitframe); 229 s32 rtw_hal_mgnt_xmit(struct adapter *padapter, struct xmit_frame *pmgntframe); 230 231 s32 rtw_hal_init_xmit_priv(struct adapter *padapter); 232 void rtw_hal_free_xmit_priv(struct adapter *padapter); 233 234 s32 rtw_hal_init_recv_priv(struct adapter *padapter); 235 void rtw_hal_free_recv_priv(struct adapter *padapter); 236 237 void rtw_hal_update_ra_mask(struct sta_info *psta, u8 rssi_level); 238 void rtw_hal_add_ra_tid(struct adapter *padapter, u32 bitmap, u8 *arg, u8 rssi_level); 239 240 void rtw_hal_start_thread(struct adapter *padapter); 241 void rtw_hal_stop_thread(struct adapter *padapter); 242 243 void beacon_timing_control(struct adapter *padapter); 244 245 u32 rtw_hal_read_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask); 246 void rtw_hal_write_bbreg(struct adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data); 247 u32 rtw_hal_read_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask); 248 void rtw_hal_write_rfreg(struct adapter *padapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); 249 250 #define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtw_hal_read_bbreg((Adapter), (RegAddr), (BitMask)) 251 #define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtw_hal_write_bbreg((Adapter), (RegAddr), (BitMask), (Data)) 252 #define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtw_hal_read_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask)) 253 #define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtw_hal_write_rfreg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) 254 255 #define PHY_SetMacReg PHY_SetBBReg 256 #define PHY_QueryMacReg PHY_QueryBBReg 257 258 void rtw_hal_set_chan(struct adapter *padapter, u8 channel); 259 void rtw_hal_set_chnl_bw(struct adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80); 260 void rtw_hal_dm_watchdog(struct adapter *padapter); 261 void rtw_hal_dm_watchdog_in_lps(struct adapter *padapter); 262 263 s32 rtw_hal_xmit_thread_handler(struct adapter *padapter); 264 265 void rtw_hal_notch_filter(struct adapter *adapter, bool enable); 266 void rtw_hal_reset_security_engine(struct adapter *adapter); 267 268 bool rtw_hal_c2h_valid(struct adapter *adapter, u8 *buf); 269 s32 rtw_hal_c2h_handler(struct adapter *adapter, u8 *c2h_evt); 270 c2h_id_filter rtw_hal_c2h_id_filter_ccx(struct adapter *adapter); 271 272 s32 rtw_hal_macid_sleep(struct adapter *padapter, u32 macid); 273 s32 rtw_hal_macid_wakeup(struct adapter *padapter, u32 macid); 274 275 s32 rtw_hal_fill_h2c_cmd(struct adapter *, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer); 276 277 void SetHwReg8723BS(struct adapter *padapter, u8 variable, u8 *val); 278 void GetHwReg8723BS(struct adapter *padapter, u8 variable, u8 *val); 279 void SetHwRegWithBuf8723B(struct adapter *padapter, u8 variable, u8 *pbuf, int len); 280 u8 GetHalDefVar8723BSDIO(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue); 281 u8 SetHalDefVar8723BSDIO(struct adapter *Adapter, enum hal_def_variable eVariable, void *pValue); 282 void UpdateHalRAMask8723B(struct adapter *padapter, u32 mac_id, u8 rssi_level); 283 void rtl8723b_SetBeaconRelatedRegisters(struct adapter *padapter); 284 void Hal_EfusePowerSwitch(struct adapter *padapter, u8 bWrite, u8 PwrState); 285 void Hal_ReadEFuse(struct adapter *padapter, u8 efuseType, u16 _offset, 286 u16 _size_byte, u8 *pbuf, bool bPseudoTest); 287 void Hal_GetEfuseDefinition(struct adapter *padapter, u8 efuseType, u8 type, 288 void *pOut, bool bPseudoTest); 289 u16 Hal_EfuseGetCurrentSize(struct adapter *padapter, u8 efuseType, bool bPseudoTest); 290 #endif /* __HAL_INTF_H__ */ 291