1 /** 2 * \file 3 * 4 * \brief Parallel Input/Output (PIO) Controller driver for SAM. 5 * 6 * Copyright (c) 2011-2015 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 /* 44 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> 45 */ 46 47 #ifndef PIO_H_INCLUDED 48 #define PIO_H_INCLUDED 49 50 #include "compiler.h" 51 52 #ifdef __cplusplus 53 extern "C" { 54 #endif 55 56 /* Compute PIO register length */ 57 #define PIO_DELTA ((uint32_t) PIOB - (uint32_t) PIOA) 58 59 /* GPIO Support */ 60 #define PIO_TYPE_Pos 27 61 /* PIO Type Mask */ 62 #define PIO_TYPE_Msk (0xFu << PIO_TYPE_Pos) 63 /* The pin is not a function pin. */ 64 #define PIO_TYPE_NOT_A_PIN (0x0u << PIO_TYPE_Pos) 65 /* The pin is controlled by the peripheral A. */ 66 #define PIO_TYPE_PIO_PERIPH_A (0x1u << PIO_TYPE_Pos) 67 /* The pin is controlled by the peripheral B. */ 68 #define PIO_TYPE_PIO_PERIPH_B (0x2u << PIO_TYPE_Pos) 69 /* The pin is controlled by the peripheral C. */ 70 #define PIO_TYPE_PIO_PERIPH_C (0x3u << PIO_TYPE_Pos) 71 /* The pin is controlled by the peripheral D. */ 72 #define PIO_TYPE_PIO_PERIPH_D (0x4u << PIO_TYPE_Pos) 73 /* The pin is an input. */ 74 #define PIO_TYPE_PIO_INPUT (0x5u << PIO_TYPE_Pos) 75 /* The pin is an output and has a default level of 0. */ 76 #define PIO_TYPE_PIO_OUTPUT_0 (0x6u << PIO_TYPE_Pos) 77 /* The pin is an output and has a default level of 1. */ 78 #define PIO_TYPE_PIO_OUTPUT_1 (0x7u << PIO_TYPE_Pos) 79 80 typedef enum _pio_type { 81 PIO_NOT_A_PIN = PIO_TYPE_NOT_A_PIN, 82 PIO_PERIPH_A = PIO_TYPE_PIO_PERIPH_A, 83 PIO_PERIPH_B = PIO_TYPE_PIO_PERIPH_B, 84 #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 85 PIO_PERIPH_C = PIO_TYPE_PIO_PERIPH_C, 86 PIO_PERIPH_D = PIO_TYPE_PIO_PERIPH_D, 87 #endif 88 PIO_INPUT = PIO_TYPE_PIO_INPUT, 89 PIO_OUTPUT_0 = PIO_TYPE_PIO_OUTPUT_0, 90 PIO_OUTPUT_1 = PIO_TYPE_PIO_OUTPUT_1 91 } pio_type_t; 92 93 /* Default pin configuration (no attribute). */ 94 #define PIO_DEFAULT (0u << 0) 95 /* The internal pin pull-up is active. */ 96 #define PIO_PULLUP (1u << 0) 97 /* The internal glitch filter is active. */ 98 #define PIO_DEGLITCH (1u << 1) 99 /* The pin is open-drain. */ 100 #define PIO_OPENDRAIN (1u << 2) 101 102 /* The internal debouncing filter is active. */ 103 #define PIO_DEBOUNCE (1u << 3) 104 105 /* Enable additional interrupt modes. */ 106 #define PIO_IT_AIME (1u << 4) 107 108 /* Interrupt High Level/Rising Edge detection is active. */ 109 #define PIO_IT_RE_OR_HL (1u << 5) 110 /* Interrupt Edge detection is active. */ 111 #define PIO_IT_EDGE (1u << 6) 112 113 /* Low level interrupt is active */ 114 #define PIO_IT_LOW_LEVEL (0 | 0 | PIO_IT_AIME) 115 /* High level interrupt is active */ 116 #define PIO_IT_HIGH_LEVEL (PIO_IT_RE_OR_HL | 0 | PIO_IT_AIME) 117 /* Falling edge interrupt is active */ 118 #define PIO_IT_FALL_EDGE (0 | PIO_IT_EDGE | PIO_IT_AIME) 119 /* Rising edge interrupt is active */ 120 #define PIO_IT_RISE_EDGE (PIO_IT_RE_OR_HL | PIO_IT_EDGE | PIO_IT_AIME) 121 122 /* 123 * The #attribute# field is a bitmask that can either be set to PIO_DEFAULT, 124 * or combine (using bitwise OR '|') any number of the following constants: 125 * - PIO_PULLUP 126 * - PIO_DEGLITCH 127 * - PIO_DEBOUNCE 128 * - PIO_OPENDRAIN 129 * - PIO_IT_LOW_LEVEL 130 * - PIO_IT_HIGH_LEVEL 131 * - PIO_IT_FALL_EDGE 132 * - PIO_IT_RISE_EDGE 133 */ 134 void pio_pull_up(Pio *p_pio, const uint32_t ul_mask, 135 const uint32_t ul_pull_up_enable); 136 void pio_set_debounce_filter(Pio *p_pio, const uint32_t ul_mask, 137 const uint32_t ul_cut_off); 138 void pio_set(Pio *p_pio, const uint32_t ul_mask); 139 void pio_clear(Pio *p_pio, const uint32_t ul_mask); 140 uint32_t pio_get(Pio *p_pio, const pio_type_t ul_type, 141 const uint32_t ul_mask); 142 void pio_set_peripheral(Pio *p_pio, const pio_type_t ul_type, 143 const uint32_t ul_mask); 144 void pio_set_input(Pio *p_pio, const uint32_t ul_mask, 145 const uint32_t ul_attribute); 146 void pio_set_output(Pio *p_pio, const uint32_t ul_mask, 147 const uint32_t ul_default_level, 148 const uint32_t ul_multidrive_enable, 149 const uint32_t ul_pull_up_enable); 150 uint32_t pio_configure(Pio *p_pio, const pio_type_t ul_type, 151 const uint32_t ul_mask, const uint32_t ul_attribute); 152 uint32_t pio_get_output_data_status(const Pio *p_pio, 153 const uint32_t ul_mask); 154 void pio_set_multi_driver(Pio *p_pio, const uint32_t ul_mask, 155 const uint32_t ul_multi_driver_enable); 156 uint32_t pio_get_multi_driver_status(const Pio *p_pio); 157 158 #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 159 void pio_pull_down(Pio *p_pio, const uint32_t ul_mask, 160 const uint32_t ul_pull_down_enable); 161 #endif 162 163 void pio_enable_output_write(Pio *p_pio, const uint32_t ul_mask); 164 void pio_disable_output_write(Pio *p_pio, const uint32_t ul_mask); 165 uint32_t pio_get_output_write_status(const Pio *p_pio); 166 void pio_sync_output_write(Pio *p_pio, const uint32_t ul_mask); 167 168 #if (SAM3S || SAM3N || SAM4S || SAM4E || SAM4N || SAM4C || SAMG || SAM4CP || SAM4CM || SAMV71 || SAMV70 || SAME70 || SAMS70) 169 void pio_set_schmitt_trigger(Pio *p_pio, const uint32_t ul_mask); 170 uint32_t pio_get_schmitt_trigger(const Pio *p_pio); 171 #endif 172 173 void pio_configure_interrupt(Pio *p_pio, const uint32_t ul_mask, 174 const uint32_t ul_attr); 175 void pio_enable_interrupt(Pio *p_pio, const uint32_t ul_mask); 176 void pio_disable_interrupt(Pio *p_pio, const uint32_t ul_mask); 177 uint32_t pio_get_interrupt_status(const Pio *p_pio); 178 uint32_t pio_get_interrupt_mask(const Pio *p_pio); 179 void pio_set_additional_interrupt_mode(Pio *p_pio, 180 const uint32_t ul_mask, const uint32_t ul_attribute); 181 void pio_set_writeprotect(Pio *p_pio, const uint32_t ul_enable); 182 uint32_t pio_get_writeprotect_status(const Pio *p_pio); 183 184 #if (SAM3S || SAM4S || SAM4E || SAMV71 || SAMV70 || SAME70 || SAMS70) 185 void pio_capture_set_mode(Pio *p_pio, uint32_t ul_mode); 186 void pio_capture_enable(Pio *p_pio); 187 void pio_capture_disable(Pio *p_pio); 188 uint32_t pio_capture_read(const Pio *p_pio, uint32_t * pul_data); 189 void pio_capture_enable_interrupt(Pio *p_pio, const uint32_t ul_mask); 190 void pio_capture_disable_interrupt(Pio * p_pio, const uint32_t ul_mask); 191 uint32_t pio_capture_get_interrupt_status(const Pio *p_pio); 192 uint32_t pio_capture_get_interrupt_mask(const Pio *p_pio); 193 #if !(SAMV71 || SAMV70 || SAME70 || SAMS70) 194 Pdc *pio_capture_get_pdc_base(const Pio *p_pio); 195 #endif 196 #endif 197 198 /* GPIO Support */ 199 uint32_t pio_get_pin_value(uint32_t pin); 200 void pio_set_pin_high(uint32_t pin); 201 void pio_set_pin_low(uint32_t pin); 202 void pio_toggle_pin(uint32_t pin); 203 void pio_enable_pin_interrupt(uint32_t pin); 204 void pio_disable_pin_interrupt(uint32_t pin); 205 Pio *pio_get_pin_group(uint32_t pin); 206 uint32_t pio_get_pin_group_id(uint32_t pin); 207 uint32_t pio_get_pin_group_mask(uint32_t pin); 208 uint32_t pio_configure_pin(uint32_t ul_pin, const uint32_t ul_flags); 209 void pio_set_pin_group_high(Pio *p_pio, uint32_t ul_mask); 210 void pio_set_pin_group_low(Pio *p_pio, uint32_t ul_mask); 211 void pio_toggle_pin_group(Pio *p_pio, uint32_t ul_mask); 212 uint32_t pio_configure_pin_group(Pio *p_pio, uint32_t ul_mask, 213 const uint32_t ul_flags); 214 215 #if (SAM4C || SAM4CP || SAM4CM || SAMG55) 216 enum pio_io_drive_mode { 217 PIO_IO_DRIVE_LOW = 0, 218 PIO_IO_DRIVE_HIGH, 219 }; 220 void pio_set_io_drive(Pio *p_pio, uint32_t ul_line, 221 enum pio_io_drive_mode mode); 222 #endif 223 224 #if (SAMV71 || SAMV70 || SAME70 || SAMS70) 225 void pio_keypad_enable(Pio *p_pio); 226 void pio_keypad_disable(Pio *p_pio); 227 void pio_keypad_set_row_num(Pio *p_pio, uint8_t num); 228 uint8_t pio_keypad_get_row_num(const Pio *p_pio); 229 void pio_keypad_set_column_num(Pio *p_pio, uint8_t num); 230 uint8_t pio_keypad_get_column_num(const Pio *p_pio); 231 void pio_keypad_set_debouncing_value(Pio *p_pio, uint16_t value); 232 uint16_t pio_keypad_get_debouncing_value(const Pio *p_pio); 233 void pio_keypad_enable_interrupt(Pio *p_pio, uint32_t ul_mask); 234 void pio_keypad_disable_interrupt(Pio *p_pio, uint32_t ul_mask); 235 uint32_t pio_keypad_get_interrupt_mask(const Pio *p_pio); 236 uint32_t pio_keypad_get_press_status(const Pio *p_pio); 237 uint32_t pio_keypad_get_release_status(const Pio *p_pio); 238 uint8_t pio_keypad_get_simult_press_num(const Pio *p_pio); 239 uint8_t pio_keypad_get_simult_release_num(const Pio *p_pio); 240 uint8_t pio_keypad_get_press_row_index(const Pio *p_pio, uint8_t queue); 241 uint8_t pio_keypad_get_press_column_index(const Pio *p_pio, uint8_t queue); 242 uint8_t pio_keypad_get_release_row_index(const Pio *p_pio, uint8_t queue); 243 uint8_t pio_keypad_get_release_column_index(const Pio *p_pio, uint8_t queue); 244 #endif 245 /** 246 * \page sam_pio_quickstart Quick Start Guide for the SAM PIO driver 247 * 248 * This is the quick start guide for the \ref sam_drivers_pio_group "PIO Driver", 249 * with step-by-step instructions on how to configure and use the driver for 250 * specific use cases. 251 * 252 * The section described below can be compiled into e.g. the main application 253 * loop or any other function that will need to interface with the IO port. 254 * 255 * \section sam_pio_usecases PIO use cases 256 * - \ref sam_pio_quickstart_basic 257 * - \ref sam_pio_quickstart_use_case_2 258 * 259 * \section sam_pio_quickstart_basic Basic usage of the PIO driver 260 * This section will present a basic use case for the PIO driver. This use case 261 * will configure pin 23 on port A as output and pin 16 as an input with pullup, 262 * and then toggle the output pin's value to match that of the input pin. 263 * 264 * \subsection sam_pio_quickstart_use_case_1_prereq Prerequisites 265 * - \ref group_pmc "Power Management Controller driver" 266 * 267 * \subsection sam_pio_quickstart_use_case_1_setup_steps Initialization code 268 * Add to the application initialization code: 269 * \code 270 pmc_enable_periph_clk(ID_PIOA); 271 272 pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); 273 pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); 274 \endcode 275 * 276 * \subsection sam_pio_quickstart_use_case_1_setup_steps_workflow Workflow 277 * -# Enable the module clock to the PIOA peripheral: 278 * \code pmc_enable_periph_clk(ID_PIOA); \endcode 279 * -# Set pin 23 direction on PIOA as output, default low level: 280 * \code pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); \endcode 281 * -# Set pin 16 direction on PIOA as input, with pullup: 282 * \code pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); \endcode 283 * 284 * \subsection sam_pio_quickstart_use_case_1_example_code Example code 285 * Set the state of output pin 23 to match input pin 16: 286 * \code 287 if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 288 pio_clear(PIOA, PIO_PA23); 289 else 290 pio_set(PIOA, PIO_PA23); 291 \endcode 292 * 293 * \subsection sam_pio_quickstart_use_case_1_example_workflow Workflow 294 * -# We check the value of the pin: 295 * \code 296 if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 297 \endcode 298 * -# Then we set the new output value based on the read pin value: 299 * \code 300 pio_clear(PIOA, PIO_PA23); 301 else 302 pio_set(PIOA, PIO_PA23); 303 \endcode 304 */ 305 306 /** 307 * \page sam_pio_quickstart_use_case_2 Advanced use case - Interrupt driven edge detection 308 * 309 * \section sam_pio_quickstart_use_case_2 Advanced Use Case 1 310 * This section will present a more advanced use case for the PIO driver. This use case 311 * will configure pin 23 on port A as output and pin 16 as an input with pullup, 312 * and then toggle the output pin's value to match that of the input pin using the interrupt 313 * controller within the device. 314 * 315 * \subsection sam_pio_quickstart_use_case_2_prereq Prerequisites 316 * - \ref group_pmc "Power Management Controller driver" 317 * 318 * \subsection sam_pio_quickstart_use_case_2_setup_steps Initialization code 319 * Add to the application initialization code: 320 * \code 321 pmc_enable_periph_clk(ID_PIOA); 322 323 pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); 324 pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); 325 326 pio_handler_set(PIOA, ID_PIOA, PIO_PA16, PIO_IT_EDGE, pin_edge_handler); 327 pio_enable_interrupt(PIOA, PIO_PA16); 328 329 NVIC_EnableIRQ(PIOA_IRQn); 330 \endcode 331 * 332 * \subsection sam_pio_quickstart_use_case_2_setup_steps_workflow Workflow 333 * -# Enable the module clock to the PIOA peripheral: 334 * \code pmc_enable_periph_clk(ID_PIOA); \endcode 335 * -# Set pin 23 direction on PIOA as output, default low level: 336 * \code pio_set_output(PIOA, PIO_PA23, LOW, DISABLE, ENABLE); \endcode 337 * -# Set pin 16 direction on PIOA as input, with pullup: 338 * \code pio_set_input(PIOA, PIO_PA16, PIO_PULLUP); \endcode 339 * -# Configure the input pin 16 interrupt mode and handler: 340 * \code pio_handler_set(PIOA, ID_PIOA, PIO_PA16, PIO_IT_EDGE, pin_edge_handler); \endcode 341 * -# Enable the interrupt for the configured input pin: 342 * \code pio_enable_interrupt(PIOA, PIO_PA16); \endcode 343 * -# Enable interrupt handling from the PIOA module: 344 * \code NVIC_EnableIRQ(PIOA_IRQn); \endcode 345 * 346 * \subsection sam_pio_quickstart_use_case_2_example_code Example code 347 * Add the following function to your application: 348 * \code 349 void pin_edge_handler(const uint32_t id, const uint32_t index) 350 { 351 if ((id == ID_PIOA) && (index == PIO_PA16)){ 352 if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 353 pio_clear(PIOA, PIO_PA23); 354 else 355 pio_set(PIOA, PIO_PA23); 356 } 357 } 358 \endcode 359 * 360 * \subsection sam_pio_quickstart_use_case_2_example_workflow Workflow 361 * -# We check the value of the pin: 362 * \code 363 if (pio_get(PIOA, PIO_TYPE_PIO_INPUT, PIO_PA16)) 364 \endcode 365 * -# Then we set the new output value based on the read pin value: 366 * \code 367 pio_clear(PIOA, PIO_PA23); 368 else 369 pio_set(PIOA, PIO_PA23); 370 \endcode 371 */ 372 373 #ifdef __cplusplus 374 } 375 #endif 376 377 #endif /* PIO_H_INCLUDED */ 378