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Searched defs:PLLR (Results 1 – 11 of 11) sorted by relevance

/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/STM32WBxx_HAL_Driver/Inc/
H A Dstm32wbxx_ll_utils.h109 uint32_t PLLR; /*!< Division for the main system clock. member
H A Dstm32wbxx_hal_rcc_ex.h253 uint32_t PLLR; /*!< PLLR: specifies the division factor for ADC clock. member
H A Dstm32wbxx_ll_rcc.h2967 …LINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLL_ConfigDomain_SYS()
3523 … void LL_RCC_PLLSAI1_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLLSAI1_ConfigDomain_ADC()
H A Dstm32wbxx_hal_rcc.h231 uint32_t PLLR; /*!< PLLR: Division for the main system clock. member
/btstack/port/stm32-l451-miromico-sx1280/Drivers/STM32L4xx_HAL_Driver/Inc/
H A Dstm32l4xx_ll_utils.h109 uint32_t PLLR; /*!< Division for the main system clock. member
H A Dstm32l4xx_ll_rcc.h3798 …LINE void LL_RCC_PLL_ConfigDomain_SYS(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLL_ConfigDomain_SYS()
4535 … void LL_RCC_PLLSAI1_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLLSAI1_ConfigDomain_ADC()
4574 … void LL_RCC_PLLSAI1_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLLSAI1_ConfigDomain_ADC()
5079 …SAI2_ConfigDomain_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLD… in LL_RCC_PLLSAI2_ConfigDomain_LTDC()
5119 … void LL_RCC_PLLSAI2_ConfigDomain_ADC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLLSAI2_ConfigDomain_ADC()
H A Dstm32l4xx_hal_rcc.h70 uint32_t PLLR; /*!< PLLR: Division for the main system clock. member
/btstack/port/stm32-f4discovery-usb/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_ll_rcc.h4505 …LINE void LL_RCC_PLL_ConfigDomain_DSI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLL_ConfigDomain_DSI()
4599 …LINE void LL_RCC_PLL_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLL_ConfigDomain_I2S()
4693 … void LL_RCC_PLL_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLL_ConfigDomain_SPDIFRX()
4824 …C_PLL_ConfigDomain_SAI(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLD… in LL_RCC_PLL_ConfigDomain_SAI()
5663 …E void LL_RCC_PLLI2S_ConfigDomain_I2S(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR) in LL_RCC_PLLI2S_ConfigDomain_I2S()
6312 …LSAI_ConfigDomain_LTDC(uint32_t Source, uint32_t PLLM, uint32_t PLLN, uint32_t PLLR, uint32_t PLLD… in LL_RCC_PLLSAI_ConfigDomain_LTDC()
H A Dstm32f4xx_hal_rcc_ex.h70 uint32_t PLLR; /*!< PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks. member
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/STM32L4xx_HAL_Driver/Inc/
H A Dstm32l4xx_hal_rcc.h70 uint32_t PLLR; /*!< PLLR: Division for the main system clock. member
/btstack/port/stm32-f4discovery-cc256x/Drivers/STM32F4xx_HAL_Driver/Inc/
H A Dstm32f4xx_hal_rcc_ex.h70 uint32_t PLLR; /*!< PLLR: PLL division factor for I2S, SAI, SYSTEM, SPDIFRX clocks. member