1 /*
2 * Copyright © 2012 Rob Clark <[email protected]>
3 * SPDX-License-Identifier: MIT
4 */
5
6 #ifndef REDUMP_H_
7 #define REDUMP_H_
8
9 #include <unistd.h>
10
11 enum rd_sect_type {
12 RD_NONE,
13 RD_TEST, /* ascii text */
14 RD_CMD, /* ascii text */
15 RD_GPUADDR, /* u32 gpuaddr, u32 size */
16 RD_CONTEXT, /* raw dump */
17 RD_CMDSTREAM, /* raw dump */
18 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
19 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
20 RD_FLUSH, /* empty, clear previous params */
21 RD_PROGRAM, /* shader program, raw dump */
22 RD_VERT_SHADER,
23 RD_FRAG_SHADER,
24 RD_BUFFER_CONTENTS,
25 RD_GPU_ID,
26 RD_CHIP_ID,
27 RD_SHADER_LOG_BUFFER, /* Specifies buffer which has logs from shaders */
28 RD_CP_LOG_BUFFER, /* Specifies buffer which has logs from CP */
29 RD_WRBUFFER, /* Specifies buffer which has data that needs to be written out to a file */
30 };
31
32 /* RD_PARAM types: */
33 enum rd_param_type {
34 RD_PARAM_SURFACE_WIDTH,
35 RD_PARAM_SURFACE_HEIGHT,
36 RD_PARAM_SURFACE_PITCH,
37 RD_PARAM_COLOR,
38 RD_PARAM_BLIT_X,
39 RD_PARAM_BLIT_Y,
40 RD_PARAM_BLIT_WIDTH,
41 RD_PARAM_BLIT_HEIGHT,
42 RD_PARAM_BLIT_X2, /* BLIT_X + BLIT_WIDTH */
43 RD_PARAM_BLIT_Y2, /* BLIT_Y + BLIT_WIDTH */
44 };
45
46 static inline void
rd_write_section(int fd,enum rd_sect_type type,const void * buf,int sz)47 rd_write_section(int fd, enum rd_sect_type type, const void *buf, int sz)
48 {
49 write(fd, &type, 4);
50 write(fd, &sz, 4);
51 write(fd, buf, sz);
52 }
53
54 #endif /* REDUMP_H_ */
55