/aosp_15_r20/external/arm-trusted-firmware/drivers/arm/gic/v3/ |
H A D | gicv3_private.h | 28 #define BIT_NUM(REG, id) \ argument 37 #define GICD_OFFSET_8(REG, id) \ argument 42 #define GICD_OFFSET(REG, id) \ argument 48 #define GICD_OFFSET_64(REG, id) \ argument 55 #define GICD_OFFSET_8(REG, id) \ argument 58 #define GICD_OFFSET(REG, id) \ argument 61 #define GICD_OFFSET_64(REG, id) \ argument 69 #define GICD_READ(REG, base, id) \ argument 72 #define GICD_READ_64(REG, base, id) \ argument 75 #define GICD_WRITE_8(REG, base, id, val) \ argument [all …]
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H A D | gicv3_main.c | 48 #define RESTORE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument 58 #define SAVE_GICD_REGS(base, ctx, intr_num, reg, REG) \ argument 68 #define RESTORE_GICD_EREGS(base, ctx, intr_num, reg, REG) \ argument 79 #define SAVE_GICD_EREGS(base, ctx, intr_num, reg, REG) \ argument 89 #define SAVE_GICD_EREGS(base, ctx, intr_num, reg, REG) argument 90 #define RESTORE_GICD_EREGS(base, ctx, intr_num, reg, REG) argument
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/aosp_15_r20/external/trusty/arm-trusted-firmware/drivers/arm/gic/v3/ |
D | gicv3_private.h | 29 #define BIT_NUM(REG, id) \ argument 38 #define GICD_OFFSET_8(REG, id) \ argument 43 #define GICD_OFFSET(REG, id) \ argument 49 #define GICD_OFFSET_64(REG, id) \ argument 56 #define GICD_OFFSET_8(REG, id) \ argument 59 #define GICD_OFFSET(REG, id) \ argument 62 #define GICD_OFFSET_64(REG, id) \ argument 70 #define GICD_READ(REG, base, id) \ argument 73 #define GICD_READ_64(REG, base, id) \ argument 76 #define GICD_WRITE_8(REG, base, id, val) \ argument [all …]
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/aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L4A6RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
H A D | stm32l4xx.h | 216 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) argument 218 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) argument 220 #define READ_BIT(REG, BIT) ((REG) & (BIT)) argument 222 #define CLEAR_REG(REG) ((REG) = (0x0)) argument 224 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) argument 226 #define READ_REG(REG) ((REG)) argument 228 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |… argument
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/aosp_15_r20/external/ms-tpm-20-ref/Samples/Nucleo-TPM/L476RG/Drivers/CMSIS/Device/ST/STM32L4xx/Include/ |
H A D | stm32l4xx.h | 216 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) argument 218 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) argument 220 #define READ_BIT(REG, BIT) ((REG) & (BIT)) argument 222 #define CLEAR_REG(REG) ((REG) = (0x0)) argument 224 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) argument 226 #define READ_REG(REG) ((REG)) argument 228 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) |… argument
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/aosp_15_r20/prebuilts/go/linux-x86/src/crypto/sha1/ |
D | sha1block_amd64.s | 288 #define PRECALC_16(REG_SUB_16,REG_SUB_12,REG_SUB_4,REG) \ argument 292 #define PRECALC_17(REG_SUB_16,REG_SUB_8,REG) \ argument 296 #define PRECALC_18(REG) \ argument 300 #define PRECALC_19(REG) \ argument 304 #define PRECALC_20(REG) \ argument 308 #define PRECALC_21(REG) \ argument 312 #define PRECALC_23(REG,K_OFFSET,OFFSET) \ argument 327 #define PRECALC_16_31(REG,REG_SUB_4,REG_SUB_8,REG_SUB_12,REG_SUB_16,K_OFFSET,OFFSET) \ argument 341 #define PRECALC_33(REG_SUB_28,REG) \ argument 347 #define PRECALC_35(REG) \ argument [all …]
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/aosp_15_r20/external/linux-kselftest/tools/testing/selftests/powerpc/nx-gzip/include/ |
H A D | nxu.h | 428 #define getnn(ST, REG) ((be32toh(ST.REG) >> (31-REG##_offset)) \ argument 430 #define getpnn(ST, REG) ((be32toh((ST)->REG) >> (31-REG##_offset)) \ argument 432 #define get32(ST, REG) (be32toh(ST.REG)) argument 433 #define getp32(ST, REG) (be32toh((ST)->REG)) argument 434 #define get64(ST, REG) (be64toh(ST.REG)) argument 435 #define getp64(ST, REG) (be64toh((ST)->REG)) argument 437 #define unget32(ST, REG) (get32(ST, REG) & ~((REG##_mask) \ argument 441 #define ungetp32(ST, REG) (getp32(ST, REG) & ~((REG##_mask) \ argument 452 #define putnn(ST, REG, X) (ST.REG = htobe32(unget32(ST, REG) | (((X) \ argument 454 #define putpnn(ST, REG, X) ((ST)->REG = htobe32(ungetp32(ST, REG) \ argument [all …]
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/aosp_15_r20/external/coreboot/src/vendorcode/cavium/include/bdk/libbdk-hal/device/ |
H A D | bdk-device.h | 200 #define BDK_BAR_DEFINE(name, REG) typedef_##REG name argument 206 #define BDK_BAR_INIT(name, device, REG) typedef_##REG name = {.u = bdk_bar_read(device, device_bar_… argument 211 #define BDK_BAR_READ(device, REG) bdk_bar_read(device, device_bar_##REG, sizeof(typedef_##REG), REG) argument 216 #define BDK_BAR_WRITE(device, REG, value) bdk_bar_write(device, device_bar_##REG, sizeof(typedef_##… argument 223 #define BDK_BAR_MODIFY(name, device, REG, code_block) do { \ argument 240 #define BDK_BAR_WAIT_FOR_FIELD(device, REG, field, op, value, timeout_usec) \ argument
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/aosp_15_r20/external/arm-optimized-routines/string/arm/ |
H A D | strcpy.c | 18 #define magic1(REG) "#0x01010101" argument 19 #define magic2(REG) "#0x80808080" argument 21 #define magic1(REG) #REG argument 22 #define magic2(REG) #REG ", lsl #7" argument
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/aosp_15_r20/art/runtime/arch/x86/ |
H A D | memcmp16_x86.S | 27 #define CFI_PUSH(REG) \ argument 31 #define CFI_POP(REG) \ argument 35 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 36 #define POP(REG) popl REG; CFI_POP (REG) argument
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/aosp_15_r20/bionic/libc/arch-x86/string/ |
H A D | sse2-strlen-slm.S | 74 #define CFI_PUSH(REG) \ argument 78 #define CFI_POP(REG) \ argument 82 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 83 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-strrchr-atom.S | 70 #define CFI_PUSH(REG) \ argument 74 #define CFI_POP(REG) \ argument 78 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 79 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-memset-slm.S | 43 #define CFI_PUSH(REG) \ argument 47 #define CFI_POP(REG) \ argument 51 #define PUSH(REG) pushl REG; CFI_PUSH(REG) argument 52 #define POP(REG) popl REG; CFI_POP(REG) argument
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H A D | sse2-strchr-atom.S | 70 #define CFI_PUSH(REG) \ argument 74 #define CFI_POP(REG) \ argument 78 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 79 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-strlen-atom.S | 86 # define CFI_PUSH(REG) \ argument 90 # define CFI_POP(REG) \ argument 94 # define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 95 # define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-memchr-atom.S | 70 #define CFI_PUSH(REG) \ argument 74 #define CFI_POP(REG) \ argument 78 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 79 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | ssse3-memcmp-atom.S | 82 #define CFI_PUSH(REG) \ argument 86 #define CFI_POP(REG) \ argument 90 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 91 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | ssse3-strcat-atom.S | 78 #define CFI_PUSH(REG) \ argument 82 #define CFI_POP(REG) \ argument 86 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 87 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | ssse3-strcmp-atom.S | 78 #define CFI_PUSH(REG) \ argument 82 #define CFI_POP(REG) \ argument 86 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 87 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-memmove-slm.S | 80 #define CFI_PUSH(REG) \ argument 84 #define CFI_POP(REG) \ argument 88 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 89 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | ssse3-strcpy-atom.S | 72 # define CFI_PUSH(REG) \ argument 76 # define CFI_POP(REG) \ argument 80 # define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 81 # define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse4-memcmp-slm.S | 82 #define CFI_PUSH(REG) \ argument 86 #define CFI_POP(REG) \ argument 90 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 91 #define POP(REG) popl REG; CFI_POP (REG) argument
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H A D | sse2-strcpy-slm.S | 70 #define CFI_PUSH(REG) \ argument 74 #define CFI_POP(REG) \ argument 78 #define PUSH(REG) pushl REG; CFI_PUSH (REG) argument 79 #define POP(REG) popl REG; CFI_POP (REG) argument
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/aosp_15_r20/bionic/libc/arch-x86_64/string/ |
H A D | sse2-memmove-slm.S | 81 #define CFI_PUSH(REG) \ argument 85 #define CFI_POP(REG) \ argument 89 #define PUSH(REG) push REG; argument 90 #define POP(REG) pop REG; argument
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/aosp_15_r20/external/trusty/arm-trusted-firmware/plat/mediatek/mt8195/drivers/apusys/ |
D | apupwr_clkctl_def.h | 71 #define apupwr_writel(VAL, REG) mmio_write_32((uintptr_t)REG, VAL) argument 72 #define apupwr_writel_relax(VAL, REG) mmio_write_32_relax((uintptr_t)REG, VAL) argument 73 #define apupwr_readl(REG) mmio_read_32((uintptr_t)REG) argument 74 #define apupwr_clrbits(VAL, REG) mmio_clrbits_32((uintptr_t)REG, VAL) argument 75 #define apupwr_setbits(VAL, REG) mmio_setbits_32((uintptr_t)REG, VAL) argument 76 #define apupwr_clrsetbits(CLR_VAL, SET_VAL, REG) \ argument
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