| /aosp_15_r20/prebuilts/go/linux-x86/src/reflect/ |
| D | visiblefields_test.go | 269 type RS1 struct { struct
270 i int
274 RS1 anonMember
279 RS1 anonMember
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 126 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
138 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
144 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
150 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
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| /aosp_15_r20/external/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 130 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
142 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
148 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
154 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Sparc/ |
| H A D | SparcAsmPrinter.cpp | 126 MCOperand &RS1, MCOperand &Src2, MCOperand &RD, in EmitBinary()
138 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitOR()
144 MCOperand &RS1, MCOperand &RS2, MCOperand &RD, in EmitADD()
150 MCOperand &RS1, MCOperand &Imm, MCOperand &RD, in EmitSHL()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 129 static void emitLEAzii(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, in emitLEAzii()
141 static void emitLEASLrri(MCStreamer &OutStreamer, MCOperand &RS1, in emitLEASLrri()
153 static void emitBinary(MCStreamer &OutStreamer, unsigned Opcode, MCOperand &RS1, in emitBinary()
164 static void emitANDrm(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm, in emitANDrm()
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| /aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 882 unsigned RS1 = getRegState(Op1); in splitAslOr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 918 unsigned RS1 = getRegState(Op1); in splitAslOr() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitDouble.cpp | 922 unsigned RS1 = getRegState(Op1); in splitAslOr() local
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| /aosp_15_r20/external/pcre/src/sljit/ |
| H A D | sljitNativeRISCV_common.c | 66 #define RS1(rs1) ((sljit_ins)reg_map[rs1] << 15) macro
|