| /aosp_15_r20/art/compiler/utils/ |
| H A D | assembler_test.h | 236 std::string RepeatTemplatedRegistersImmBits(void (Ass::*f)(Reg1, Reg2, Reg3, ImmType), in RepeatTemplatedRegistersImmBits() argument
243 std::string (AssemblerTest::*GetName3)(const Reg3&), in RepeatTemplatedRegistersImmBits()
1414 std::string RepeatTemplatedRegisters(void (Ass::*f)(Reg1, Reg2, Reg3), in RepeatTemplatedRegisters() argument
1420 std::string (AssemblerTest::*GetName3)(const Reg3&), in RepeatTemplatedRegisters()
1444 std::string RepeatTemplatedRegisters(void (Ass::*f)(Reg1, Reg2, Reg3, Reg4), in RepeatTemplatedRegisters() argument
1451 std::string (AssemblerTest::*GetName3)(const Reg3&), in RepeatTemplatedRegisters()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 191 Register Reg3 = MI.getOperand(3).getReg(); in processBlock() local
|
| /aosp_15_r20/external/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 190 unsigned Reg3 = MI->getOperand(3).getReg(); in processBlock() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXFMAMutate.cpp | 191 Register Reg3 = MI.getOperand(3).getReg(); in processBlock() local
|
| /aosp_15_r20/external/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 790 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 895 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsAsmPrinter.cpp | 896 unsigned Reg2, unsigned Reg3) { in EmitInstrRegRegReg()
|
| /aosp_15_r20/art/compiler/utils/riscv64/ |
| H A D | assembler_riscv64_test.cc | 1656 void (Riscv64Assembler::*f)(Reg1, Reg2, Reg3, Riscv64Assembler::VM), in RepeatTemplatedRegistersVmFiltered() argument
1662 std::string (AssemblerTest::*GetName3)(const Reg3&), in RepeatTemplatedRegistersVmFiltered()
1815 std::string RepeatTemplatedRegistersFiltered(void (Riscv64Assembler::*f)(Reg1, Reg2, Reg3), in RepeatTemplatedRegistersFiltered() argument
1821 std::string (AssemblerTest::*GetName3)(const Reg3&), in RepeatTemplatedRegistersFiltered()
2102 return [](VRegister vd, VRegister vs2, Reg3, Riscv64Assembler::VM vm) { in VXVVmSkipV0VmAndNoR1R2Overlap() argument
2121 return [](VRegister vd, Reg2, Reg3, Riscv64Assembler::VM vm) { return IsVdAllowed(vd, vm); }; in SkipV0Vm() argument
2135 return [](VRegister vd, Reg2, Reg3) { return vd != V0; }; in SkipV0() argument
|
| /aosp_15_r20/external/llvm/utils/TableGen/ |
| H A D | CodeGenRegisters.cpp | 1140 CodeGenRegister *Reg3 = i2->second; in computeComposites() local
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 784 unsigned Reg0, unsigned Reg1, unsigned Reg2, unsigned Reg3, in buildEXP()
|