| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceRegistersMIPS32.h | 68 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
74 static inline bool isGPRReg(RegNumT RegNum) { in isGPRReg()
82 static inline FPRRegister getEncodedFPR(RegNumT RegNum) { in getEncodedFPR()
88 static inline bool isFPRReg(RegNumT RegNum) { in isFPRReg()
93 static inline FPRRegister getEncodedFPR64(RegNumT RegNum) { in getEncodedFPR64()
99 static inline bool isFPR64Reg(RegNumT RegNum) { in isFPR64Reg()
106 static inline RegNumT get64PairFirstRegNum(RegNumT RegNum) { in get64PairFirstRegNum()
109 if (unsigned(RegNum) >= Reg_F64PAIR_First && in get64PairFirstRegNum() local
113 if (unsigned(RegNum) >= Reg_I64PAIR_First && unsigned(RegNum) <= Reg_T8T9) in get64PairFirstRegNum() local
119 static inline RegNumT get64PairSecondRegNum(RegNumT RegNum) { in get64PairSecondRegNum()
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| H A D | IceRegistersARM32.h | 105 static inline void assertValidRegNum(RegNumT RegNum) { in assertValidRegNum()
110 static inline bool isGPRegister(RegNumT RegNum) { in isGPRegister()
125 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
140 static inline bool isGPR(RegNumT RegNum) { in isGPR()
145 static inline GPRRegister getI64PairFirstGPRNum(RegNumT RegNum) { in getI64PairFirstGPRNum()
150 static inline GPRRegister getI64PairSecondGPRNum(RegNumT RegNum) { in getI64PairSecondGPRNum()
155 static inline bool isI64RegisterPair(RegNumT RegNum) { in isI64RegisterPair()
160 static inline bool isEncodedSReg(RegNumT RegNum) { in isEncodedSReg()
175 static inline SRegister getEncodedSReg(RegNumT RegNum) { in getEncodedSReg()
180 static inline bool isEncodedDReg(RegNumT RegNum) { in isEncodedDReg()
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| H A D | IceRegAlloc.cpp | 434 const RegNumT RegNum = *RegNumBVIter(Iter.RegMask).begin(); in addSpillFill() local
621 const auto RegNum = Cur->getRegNum(); in allocatePrecoloredRegister() local
648 const RegNumT RegNum = in allocateFreeRegister() local
741 const auto RegNum = Item->getRegNumTmp(); in handleNoFreeRegisters() local
786 const auto RegNum = Item->getRegNumTmp(); in assignFinalRegisters() local
891 const RegNumT RegNum = Item->getRegNumTmp(); in scan() local
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| H A D | IceRegistersX8632.h | 95 static inline const char *getRegName(RegNumT RegNum) { in getRegName()
108 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
122 static inline ByteRegister getEncodedByteReg(RegNumT RegNum) { in getEncodedByteReg()
136 static inline bool isXmm(RegNumT RegNum) { in isXmm()
148 static inline XmmRegister getEncodedXmm(RegNumT RegNum) { in getEncodedXmm()
162 static inline uint32_t getEncoding(RegNumT RegNum) { in getEncoding()
175 static inline RegNumT getBaseReg(RegNumT RegNum) { in getBaseReg()
205 static inline RegNumT getGprForType(Type Ty, RegNumT RegNum) { in getGprForType()
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| H A D | IceRegistersX8664.h | 80 static inline const char *getRegName(RegNumT RegNum) { in getRegName()
93 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
107 static inline ByteRegister getEncodedByteReg(RegNumT RegNum) { in getEncodedByteReg()
121 static inline bool isXmm(RegNumT RegNum) { in isXmm()
133 static inline XmmRegister getEncodedXmm(RegNumT RegNum) { in getEncodedXmm()
147 static inline uint32_t getEncoding(RegNumT RegNum) { in getEncoding()
160 static inline RegNumT getBaseReg(RegNumT RegNum) { in getBaseReg()
191 static inline RegNumT getGprForType(Type Ty, RegNumT RegNum) { in getGprForType()
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| H A D | IceTargetLoweringX8664.cpp | 778 Variable *TargetX8664::getPhysicalRegister(RegNumT RegNum, Type Ty) { in getPhysicalRegister()
800 const char *TargetX8664::getRegName(RegNumT RegNum, Type Ty) const { in getRegName()
934 for (RegNumT RegNum : RegNumBVIter(Pushed)) { in addProlog() local
1178 const auto RegNum = RegNumT::fromInt(i); in addEpilog() local
1189 const auto RegNum = RegNumT::fromInt(i); in addEpilog() local
1286 RegNumT RegNum; in lowerArguments() local
6401 Variable *TargetX8664::makeZeroedRegister(Type Ty, RegNumT RegNum) { in makeZeroedRegister()
6434 Variable *TargetX8664::makeVectorOfZeros(Type Ty, RegNumT RegNum) { in makeVectorOfZeros()
6438 Variable *TargetX8664::makeVectorOfMinusOnes(Type Ty, RegNumT RegNum) { in makeVectorOfMinusOnes()
6453 Variable *TargetX8664::makeVectorOfOnes(Type Ty, RegNumT RegNum) { in makeVectorOfOnes()
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| H A D | IceTargetLoweringX8632.cpp | 768 Variable *TargetX8632::getPhysicalRegister(RegNumT RegNum, Type Ty) { in getPhysicalRegister()
790 const char *TargetX8632::getRegName(RegNumT RegNum, Type Ty) const { in getRegName()
922 for (RegNumT RegNum : RegNumBVIter(Pushed)) { in addProlog() local
1196 const auto RegNum = RegNumT::fromInt(i); in addEpilog() local
1207 const auto RegNum = RegNumT::fromInt(i); in addEpilog() local
1370 RegNumT RegNum; in lowerArguments() local
7139 Variable *TargetX8632::makeZeroedRegister(Type Ty, RegNumT RegNum) { in makeZeroedRegister()
7172 Variable *TargetX8632::makeVectorOfZeros(Type Ty, RegNumT RegNum) { in makeVectorOfZeros()
7176 Variable *TargetX8632::makeVectorOfMinusOnes(Type Ty, RegNumT RegNum) { in makeVectorOfMinusOnes()
7191 Variable *TargetX8632::makeVectorOfOnes(Type Ty, RegNumT RegNum) { in makeVectorOfOnes()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 32 unsigned RegNum) { in printRegister()
62 UnwindLocation::createIsRegisterPlusOffset(uint32_t RegNum, int32_t Offset, in createIsRegisterPlusOffset()
68 UnwindLocation::createAtRegisterPlusOffset(uint32_t RegNum, int32_t Offset, in createAtRegisterPlusOffset()
325 auto RegNum = Data.getULEB128(C); in parse() local
372 uint64_t RegNum = Data.getULEB128(C); in parse() local
572 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); in parseRows() local
586 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); in parseRows() local
650 for (uint32_t RegNum = 16; RegNum < 32; ++RegNum) { in parseRows() local
668 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); in parseRows() local
677 llvm::Expected<uint64_t> RegNum = Inst.getOperandAsUnsigned(CFIP, 0); in parseRows() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 205 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
216 CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) { in CreateMemri()
337 int RegNum = matchFn(Name); in parseRegisterName() local
354 int RegNum = parseRegisterName(&MatchRegisterName); in parseRegisterName() local
363 int RegNum = AVR::NoRegister; in parseRegister() local
703 int64_t RegNum = Const->getValue(); in validateTargetOperandClass() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 214 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
225 CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) { in CreateMemri()
353 int RegNum = matchFn(Name); in parseRegisterName() local
370 int RegNum = parseRegisterName(&MatchRegisterName); in parseRegisterName() local
379 int RegNum = AVR::NoRegister; in parseRegister() local
749 int64_t RegNum = Const->getValue(); in validateTargetOperandClass() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 201 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
211 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem()
217 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg()
222 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 197 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
207 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem()
213 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg()
218 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 377 unsigned RegNum; member
403 unsigned RegNum; member
413 unsigned RegNum; member
2169 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx, in CreateReg()
2188 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg()
2204 CreateVectorList(unsigned RegNum, unsigned Count, unsigned Stride, in CreateVectorList()
2398 CreateMatrixRegister(unsigned RegNum, unsigned ElementWidth, MatrixKind Kind, in CreateMatrixRegister()
2857 unsigned RegNum = 0; in matchRegisterNameAlias() local
2882 if (auto RegNum = StringSwitch<unsigned>(Name.lower()) in matchRegisterNameAlias() local
2924 AArch64AsmParser::tryParseScalarRegister(MCRegister &RegNum) { in tryParseScalarRegister()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 311 unsigned RegNum; member
337 unsigned RegNum; member
1814 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx, in CreateReg()
1833 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg()
1848 CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, in CreateVectorList()
2255 unsigned RegNum = 0; in matchRegisterNameAlias() local
2271 if (auto RegNum = StringSwitch<unsigned>(Name.lower()) in matchRegisterNameAlias() local
2297 AArch64AsmParser::tryParseScalarRegister(unsigned &RegNum) { in tryParseScalarRegister()
3146 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind); in tryParseVectorRegister() local
3171 unsigned RegNum; in tryParseSVEPredicateVector() local
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation()
204 void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) { in setRegisterLocation()
212 void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); } in removeRegisterLocation()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation()
204 void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) { in setRegisterLocation()
212 void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); } in removeRegisterLocation()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation()
204 void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) { in setRegisterLocation()
212 void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); } in removeRegisterLocation()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation()
204 void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) { in setRegisterLocation()
212 void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); } in removeRegisterLocation()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.h | 68 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
192 std::optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation()
204 void setRegisterLocation(uint32_t RegNum, const UnwindLocation &Location) { in setRegisterLocation()
212 void removeRegisterLocation(uint32_t RegNum) { Locations.erase(RegNum); } in removeRegisterLocation()
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| /aosp_15_r20/external/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 61 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum()
72 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { in getLLVMRegNum()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum()
81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum()
81 std::optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InstructionSelectorImpl.h | 829 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
840 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
851 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
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