| /aosp_15_r20/system/extras/simpleperf/ |
| H A D | perf_regs.h | 96 struct RegSet { struct
103 RegSet(int abi, uint64_t valid_mask, const uint64_t* valid_regs); argument
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| H A D | perf_regs_test.cpp | 24 TEST(RegSet, arch) { in TEST() argument
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| H A D | perf_regs.cpp | 211 RegSet::RegSet(int abi, uint64_t valid_mask, const uint64_t* valid_regs) : valid_mask(valid_mask) { in RegSet() function in simpleperf::RegSet
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| /aosp_15_r20/system/extras/simpleperf/nonlinux_support/ |
| H A D | nonlinux_support.cpp | 63 bool UnwindCallChain(const ThreadEntry&, const RegSet&, const char*, size_t, in UnwindCallChain()
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| /aosp_15_r20/external/capstone/ |
| H A D | MCRegisterInfo.h | 31 const uint8_t *RegSet; member
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 253 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet()
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| /aosp_15_r20/external/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 257 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| H A D | LanaiDelaySlotFiller.cpp | 255 bool Filler::isRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) { in isRegInSet()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 343 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet()
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| /aosp_15_r20/external/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 346 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 344 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) in IsRegInSet()
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 275 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 273 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 275 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567b/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 275 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/CodeGen/ |
| D | RegisterPressure.h | 275 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| H A D | RegisterPressure.h | 274 using RegSet = SparseSet<IndexMaskPair>; variable
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| /aosp_15_r20/external/swiftshader/third_party/subzero/src/ |
| H A D | IceTargetLowering.h | 282 enum RegSet { enum
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| /aosp_15_r20/external/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 36 const uint8_t *const RegSet; variable
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r536225/include/llvm/MC/ |
| D | MCRegisterInfo.h | 41 const uint8_t *const RegSet; variable
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 445 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet() argument
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r522817/include/llvm/MC/ |
| D | MCRegisterInfo.h | 41 const uint8_t *const RegSet; variable
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 37 const uint8_t *const RegSet; variable
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| /aosp_15_r20/prebuilts/clang/host/linux-x86/clang-r530567/include/llvm/MC/ |
| D | MCRegisterInfo.h | 41 const uint8_t *const RegSet; variable
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 448 bool RegDefsUses::isRegInSet(const BitVector &RegSet, unsigned Reg) const { in isRegInSet() argument
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